mtk-20170518 - MTK 20170518 : Mediatek SDK based on OpenWRT Barrier Breaker

	Commit message (Collapse)	Author	Age	Files	Lines
*	ar71xx: remove linux 4.1 support	Felix Fietkau	2016-05-21	1	-744/+0
\| \| \| \|	Signed-off-by: Felix Fietkau <nbd@nbd.name>
*	ar71xx: Add QCA955X GPIO mux and function definitions	John Crispin	2016-03-23	1	-4/+4
\| \| \| \| \| \|	Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com> SVN-Revision: 49075
*	ar71xx: refresh patches	John Crispin	2015-12-23	1	-1/+1
\| \| \| \| \| \|	Signed-off-by: Roman Yeryomin <roman@advem.lv> SVN-Revision: 47983
*	ar71xx: update QCA956x support	John Crispin	2015-12-23	1	-44/+87
\| \| \| \| \| \| \| \| \| \| \|	- separate qca956x and tp9343 (they use different IDs) - rename qca9561->qca956x for consistency - add missing bits (device reset, gpio output select) - fix wmac setup Signed-off-by: Roman Yeryomin <roman@advem.lv> SVN-Revision: 47981
*	ar71xx: use correct PLL configuration register bitmask for QCA956x SoC.	Felix Fietkau	2015-11-02	1	-2/+2
\| \| \| \| \| \| \| \| \|	Incorrect value causes clock inaccuracy as huge as 1/60. Signed-off-by: Dmitry Ivanov <dima@ubnt.com> Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 47363
*	ar71xx: fix ath79_soc_rev value for QCA9531 ver. 2	John Crispin	2015-10-26	1	-7/+8
\| \| \| \| \| \| \| \| \| \| \| \| \| \|	ath9k expects to get revision id 2 for the QCA9531 ver. 2 rev. 0. This fixes the very low TX power on some devices like the TP-LINK TL-WR841ND v10. As ath79_soc_rev is only used to get the revision number to ath9k on the QCA9533, just set it to the expected value on the ver. 2. Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net> Tested-by: Felix Kaechele <felix@kaechele.ca> SVN-Revision: 47262
*	ar71xx: reorganize 4.1 patch directory layout	Felix Fietkau	2015-07-19	1	-0/+700
	Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 46430