| Commit message (Collapse) | Author | Age | Files | Lines |
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Signed-off-by: Florian Eckert <Eckert.Florian@googlemail.com>
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This patch was introduced in commit r16412 for the brcm47xx target only
and then moved to generic in commit r32395. It was initially added
because of ticket #5186 and should fix some problems with fuse file
systems and MIPS caches. The commit comment in r32395 says that this a
generic problem in MIPS CPUs, but does not name any specifics about
that. There was a fix added to kernel 2.6.21 in commit commit
7575a49f20 "[MIPS] Implement flush_anon_page()." that should fix this
problem, but that was already available before both commits were done
to OpenWrt.
I just tested fuse with ntfs.3g without this patch on a BCM4704
(BMIPS3300 V0.6) SoC and haven't seen any problems. Someone reported
that removing this patch improves some fuse operations by 5 times on
some modern MIPS cores.
My test was only a simple "dd if=/dev/zero of=/mnt/zero bs=5000" to an
USB stick.
This patch removes the patch to OpenWrt, because I assume that it is
not needed any more and Felix, the orginal author, also thinks so.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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Changelog: https://cdn.kernel.org/pub/linux/kernel/v4.x/ChangeLog-4.4.14
Some manual changes to target/linux/generic/patches-4.4/610-
netfilter_match_bypass_default_checks.patch were needed.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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The lantiq kernel arch code selects CONFIG_RESET_CONTROLLER always, so
it is always selected when the lantiq target is build. we do not need
support for unselected CONFIG_RESET_CONTROLLER option.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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Signed-off-by: Felix Fietkau <nbd@nbd.name>
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Signed-off-by: John Crispin <john@phrozen.org>
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Signed-off-by: John Crispin <john@phrozen.org>
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this broke uhci pci support on some arv units
Signed-off-by: John Crispin <john@phrozen.org>
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Signed-off-by: John Crispin <john@phrozen.org>
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this worked in 3.18 but broke at some point. the old code that loaded a
irq table was incorrewct anyhow as it mapped the irqs int he domain which
should really be done when the driver using them loads them and not the
irq driver itself.
Signed-off-by: John Crispin <john@phrozen.org>
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Signed-off-by: Felix Fietkau <nbd@nbd.name>
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0025-NET-MIPS-lantiq-adds-xrx200-net.patch
Signed-off-by: Felix Fietkau <nbd@nbd.name>
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packet loss issues
Signed-off-by: Felix Fietkau <nbd@nbd.name>
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Signed-off-by: Felix Fietkau <nbd@nbd.name>
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Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
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They can be added using the phy led device tree bindings if required.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 49283
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brnboot based devices can have two Image partitions. When flashing
images via the brnboot recovery web interface, the Image partitions are
written alternating.
The current active Image partition is stored in the first byte of the
Primary_Setting partition by using 0x00 for Code_Image_0 and 0x01 for
Code_Image_1.
By using the information about the active "Code Image", it is possible
to ensure that the rootfs belongs to the current booted Image/Kernel.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 49281
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The VGV7510KW22 has the leds for LAN1-3 connected to pin1 of the phys
and the led for LAN4 connect to pin0 of the phy. This results with the
current configuration in a fast flashing LAN4 led as soon as a network
cable is connected. Something similar was reported on the forum[1] for
the VGV7519 as well.
Since it isn't predicable to which pin a (single) phy led is connected,
use the (default) pin1 functionality
Constant On: 10/100/1000MBit
Blink Fast: None
Blink Slow: None
Pulse: TX/RX
for all ethernet phy leds.
After checking pictures of all vr9 boards, it looks like only the VG3503J
has more than one led connected per phy. Using the phy led device tree
bindings to assign the functionality to the "additional" leds, the
VG3503J phy leds should behave as before.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
[1] https://forum.openwrt.org/viewtopic.php?pid=321523
SVN-Revision: 49270
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Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 49269
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Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 49176
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Instead of using our patch-dtb program just place the device tree
behind the kernel binary and then let the in kernel mechanism fetch it.
This also adds support for having the device tree file in the boot
loader.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 49050
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 48783
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Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 48656
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 48546
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The following patches were dropped because they are already applied
upstream:
- 0038-MIPS-lantiq-fpi-on-ar9.patch
- 0039-MIPS-lantiq-initialize-usb-on-boot.patch
- 0042-USB-DWC2-big-endian-support.patch
- 0043-gpio-stp-xway-fix-phy-mask.patch
All other patches were simply refreshed, except the following:
- 0001-MIPS-lantiq-add-pcie-driver.patch
Changes to arch/mips/lantiq/xway/sysctrl.c (these changes disabled
some PMU gates for the vrx200 / VR9 SoCs) were removed since the
upstream kernel disables unused PMU gates automatically (since
95135bfa7ead1becc2879230f72583dde2b71a0c
"MIPS: Lantiq: Deactivate most of the devices by default").
- 0025-NET-MIPS-lantiq-adds-xrx200-net.patch
Since OpenWrt commit 55ba20afcc2fe785146316e5be2c2473cb329885 drivers
should use of_get_mac_address(). of_get_mac_address_mtd is not
available for drivers anymore since it's called automatically within
of_get_mac_address().
- 0028-NET-lantiq-various-etop-fixes.patch
Same changes as in 0025-NET-MIPS-lantiq-adds-xrx200-net.patch
While refreshing the kernel configuration SPI support had to be moved to
config-4.4 because otherwise M25P80 was disabled.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48307
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