| Commit message (Collapse) | Author | Age | Files | Lines |
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this allows using the codec even if it is not listed in the DTS
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 47256
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Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 47238
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add the SDK alsa driver. this has only been tested on mt7628/88 and wm8960.
mt7620 is only compile tested.
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 47205
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When talking to an atmel controller we need 9600 or 250000 baud.
as 250000 does not exist we use 2500000.
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 47204
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Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 47203
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dtb complained about those lines
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 47151
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mt7620 + mt7612)
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 47146
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 47137
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when sleep mode is disable use MIPS as clocksource and clockevent instead of systick.
because MIPS timer has higher resolution 5ns less than systick 20us and
larger counter bits 32 > 16.
clean interrupt by write compare register at isr.
fix typo cause sleep mode not enable.
Signed-off-by: Michael Lee <igvtee@gmail.com>
SVN-Revision: 47122
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Signed-off-by: Michael Lee <igvtee@gmail.com>
SVN-Revision: 47121
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Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
SVN-Revision: 47120
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Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
SVN-Revision: 47119
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Due to datasheet of rt3883 SoC rgmii1 port handles pins 84-95 and rgmii2 port handles pins 72-83. When this function ports gets added to rt3883_pinmux_data there's wrong pinmux bits set (RT3883_GPIO_MODE_GE1 manages 84-95 pins and RT3883_GPIO_MODE_GE2 manages 72-83). So when enabling rgmii2 as GPIO driver confuses hardware and nothing work, neither rgmii nor gpio.
Also in '0030-pinctrl-ralink-add-pinctrl-driver.patch' typo in name of rgmii2 port.
Signed-off-by: Nick Leiten <nickleiten@gmail.com>
SVN-Revision: 47118
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The default switch frame size (with FCS + header) is 1536 bytes. But the
GMAC only accepted frames up to 1522 bytes. Setting it to 1536 allows to
receive ethernet frames using the full of MTU 1500 + an extra VLAN header +
VLAN header added by the switch.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 47117
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The driver assumes that the maximum received buffer for non-jumbo frames is
1536 bytes. But the allocation of the rx fragment doesn't reflect that. It
currently allocates fragments which will only be large enough to be used as
rx buffer with the size of 1534 bytes. This is problematic because the GMAC
will now try to write to 2 bytes which don't belong to its receive buffer
when a large enough ethernet frame is received.
This may already be a problem on existing chips but will at least become a
problem when the 1536 byte rx modus is enabled on MT7621a. It is required
on this SoC to receive ethernet frames which use their full 1500 bytes MTU
and a VLAN header next to the switch VLAN tag.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 47116
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The length of the DMA rx buffer was always set to 0 because the function
for extracting the length was used to calculate the value for setting it.
Instead the macro has to be split in a get and set function similar to the
TX_DMA_(GET_|)PLEN(0|1) macro.
No problem was noticed on MT7621a before this was changed and thus maybe it
was hidden by different problem which is not yet fixed.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 47115
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The MT7530 switch driver with enable_vlan set will automatically set all
ports to the user port mode. The hardware will remove the incoming vlan tag
on these ports and use it for its internal vlan. This is usually not wanted
and makes it impossible to communicate via vlan over the switch in both
directions.
It is possible to configure a switch port to "transparent mode" when this
port is only used as untag in the switch VLANs. This will disable the VLAN
untagging of packets when they were received on this port. The tagging on
"tag" ports based on the vlan id is still working.
The transparent port mode cannot be used when a port is both used in a VLAN
as "tag" and in another one as "untag" port.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 47114
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HiWiFi HC5661/5761/5861 models are manufactured by http://www.hiwifi.com <http://www.hiwifi.com/>. These models have similar hardware specs(MT7620A + 128M DDR2 + 16M flash). This patch adds support for them.
The original author is Justin Liu (rssnsj@gmail.com). I ported the patch to trunk and submitted it here with his approval.
v3 fix
1: Spaces -> Tabs
2: Removed some packages
Signed-off-by: Xiaoning Kang <kangxn@163.com>
SVN-Revision: 47113
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HiWiFi HC5661/5761/5861 models are manufactured by http://www.hiwifi.com. These models have similar hardware specs(MT7620A + 128M DDR2 + 16M flash). This patch adds support for them.
The original author is Justin Liu (rssnsj@gmail.com). I ported the patch to trunk and submitted it here with his approval.
v3 fix
1: Merged most stuff into dtsi file
2: Remove unnecessary empty lines.
Signed-off-by: Xiaoning Kang <kangxn@163.com>
SVN-Revision: 47112
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HiWiFi HC5661/5761/5861 models are manufactured by http://www.hiwifi.com. These models have similar hardware specs(MT7620A + 128M DDR2 + 16M flash). This patch adds support for them.
The original author is Justin Liu (rssnsj@gmail.com). I ported the patch to trunk and submitted it here with his approval.
v3 fix
1: Fixed model order
2: Remove manufacturer name from model name
3: Use a hacky but prettier way to get mac address.
Signed-off-by: Xiaoning Kang <kangxn@163.com>
SVN-Revision: 47111
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Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 47076
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Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 47074
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Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 47073
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The pinctrl-rt2880 code doesn't support multiple functions with the same
name. This will result in a incorrect pinmux configuration.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 46963
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Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 46959
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Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 46958
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Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 46957
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Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 46956
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Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 46955
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Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 46954
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Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 46953
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newer socs have 2 mux registers
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 46952
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Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 46951
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only tested on mt7628
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 46950
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This patch is to add the WIZnet WizFi630A board as a new platform. The board is in mini pci express form factor.
Signed-off-by: Tobias Welz <tw@wiznet.eu>
SVN-Revision: 46921
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This patch add support for Planex DB-WRT01. DANBOARD route on
the MT7620A SoC with two Ethernet port and a 802.11n 2.4 GHz radio.
DANBOARD is Cartoon character.
Signed-off-by: YuheiOKAWA <tochiro.srchack@gmail.com>
SVN-Revision: 46918
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 46904
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Attempt to boost the 2.4 GHz signal, currently very low.
Signed-off-by: D. Andrei Măceș <dmaces@nd.edu>
SVN-Revision: 46891
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The PBR-M1 and other upcoming MT7621 boards have RTC chips on them. The
PBR-M1 also selects the kmod-rtc-pcf8563 by default. But the module itself
will not be build because CONFIG_RTC_CLASS is currently not enabled for its
kernel.
Enabling this option should fix the problem of the missing rtc device on
these boards.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 46857
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Changelog:
* https://www.kernel.org/pub/linux/kernel/v3.x/ChangeLog-3.18.21
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 46768
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not ready at boot
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 46766
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We don't make use of it, so no need to have it enabled.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 46759
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0073 needs to applied afert 0102
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 46667
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Instead of using board name provided explicitly as text in LED name, ex.:
[...]
mlwg2)
status_led="mlwg2:blue:system"
[...]
use $board variable, which allows to combine together multiple boards with same color and LED names, ex:
[...]
mlw221|\
mlwg2)
status_led="$board:blue:system"
[...]
The above approach allows to shrink size of code in base-files/etc/board.d/01_leds and base-files/etc/diag.sh scripts dramatically.
One thing to keep in mind here is that we assume to use proper and consistent LED naming scheme ("device:color:led-name").
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
SVN-Revision: 46665
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The upstream LED naming convention is "device:color:led-name", but it seems that many of supported boards in OpenWrt don't follow this approach.
The following patch fixes this inconsistency in dts{,i} files and updates base-files scripts for ramips target:
* fixes wrong indentation
* keeps case statements structure in same convention as in other scripts (no empty line after ";;", no indentation for case...esac body)
* fixes wrong LED names for some of boards (makes them the same as in dts{,i} files)
* combines boards with same configuration (ex. set_wifi_led "rt2800pci-phy0::radio" in 01_leds)
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
SVN-Revision: 46664
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Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 46660
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Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 46659
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The MT7621 uses a 2 bit wide configuration of the sdhci, spi, mdio, pcie,
wdt, uart2 and uart3 in the GPIO_MODE register. It was correctly done
for sdhci, spi, pcie and wdt, The same has to be done for uart3, uart2
and mdio.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 46645
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The PINS conntrolled by the SPI bits in the GPIO_MODE register is always
7 and not 8 for nand mode.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 46644
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The uart3 setting in GPIO_MODE register is before the uart2 setting. Also
don't mix uart2 and uart3 function/groups.
Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 46643
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