From 01dda0659eb7d029672af3bd3b590d98e2ee0a5d Mon Sep 17 00:00:00 2001 From: Piotr Dymacz Date: Thu, 6 Oct 2016 02:19:17 +0200 Subject: ar71xx: add support for YunCore AP90Q YunCore AP90Q is an outdoor CPE/AP based on Qualcomm/Atheros QCA9531 v2. Short specification: - 650/600/216 MHz (CPU/DDR/AHB) - 2x 10/100 Mbps Ethernet, passive PoE support - 64/128 MB of RAM (DDR2) - 16 MB of FLASH - 2T2R 2.4 GHz with external PA, up to 29 dBm - 2x internal 5 dBi omni antennas - 4x LED, 1x button - UART (JP1) header on PCB Flash instruction under U-Boot, using UART: 1. tftp 0x80060000 lede-ar71xx-generic-ap90q-squashfs-sysupgrade 2. erase 0x9f050000 +$filesize 3. cp.b $fileaddr 0x9f050000 $filesize 4. setenv bootcmd "bootm 0x9f050000" 5. saveenv && reset Flash instruction under vendor fimrware, using telnet/SSH: 1. Connect PC with 192.168.1.x address to WAN port 2. Power up device, enter failsafe mode with button (no LED indicator!) 3. Change root password and reboot (mount_root, passwd ..., reboot -f) 4. Upload lede-ar71xx-generic-ap90q-squashfs-sysupgrade.bin to /tmp using SCP 5. Connect PC with 192.168.188.x address to LAN port, SSH to 192.168.188.253 6. Invoke: - cd /tmp - fw_setenv bootcmd "bootm 0x9f050000" - mtd erase firmware - mtd -r write lede-ar71xx-generic-ap90q-squashfs-sysupgrade.bin firmware Signed-off-by: Piotr Dymacz --- .../ar71xx/files/arch/mips/ath79/Kconfig.openwrt | 9 ++ target/linux/ar71xx/files/arch/mips/ath79/Makefile | 1 + .../ar71xx/files/arch/mips/ath79/mach-ap90q.c | 123 +++++++++++++++++++++ .../linux/ar71xx/files/arch/mips/ath79/machtypes.h | 1 + 4 files changed, 134 insertions(+) create mode 100644 target/linux/ar71xx/files/arch/mips/ath79/mach-ap90q.c (limited to 'target/linux/ar71xx/files/arch') diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt index 3a3ed14..e9431f1 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt +++ b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt @@ -174,6 +174,15 @@ config ATH79_MACH_AP83 select ATH79_DEV_USB select ATH79_DEV_WMAC +config ATH79_MACH_AP90Q + bool "YunCore AP90Q support" + select SOC_QCA953X + select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_M25P80 + select ATH79_DEV_WMAC + config ATH79_MACH_AP96 bool "Atheros AP96 board support" select SOC_AR71XX diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Makefile b/target/linux/ar71xx/files/arch/mips/ath79/Makefile index 1924179..c0caccd 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/Makefile +++ b/target/linux/ar71xx/files/arch/mips/ath79/Makefile @@ -55,6 +55,7 @@ obj-$(CONFIG_ATH79_MACH_AP147) += mach-ap147.o obj-$(CONFIG_ATH79_MACH_AP152) += mach-ap152.o obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o obj-$(CONFIG_ATH79_MACH_AP83) += mach-ap83.o +obj-$(CONFIG_ATH79_MACH_AP90Q) += mach-ap90q.o obj-$(CONFIG_ATH79_MACH_AP96) += mach-ap96.o obj-$(CONFIG_ATH79_MACH_ARCHER_C7) += mach-archer-c7.o obj-$(CONFIG_ATH79_MACH_ARDUINO_YUN) += mach-arduino-yun.o diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-ap90q.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-ap90q.c new file mode 100644 index 0000000..35e5781 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-ap90q.c @@ -0,0 +1,123 @@ +/* + * YunCore AP90Q board support + * + * Copyright (C) 2016 Piotr Dymacz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include +#include + +#include "common.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define AP90Q_GPIO_LED_WAN 4 +#define AP90Q_GPIO_LED_WLAN 12 +#define AP90Q_GPIO_LED_LAN 16 + +#define AP90Q_GPIO_BTN_RESET 17 + +#define AP90Q_KEYS_POLL_INTERVAL 20 +#define AP90Q_KEYS_DEBOUNCE_INTERVAL (3 * AP90Q_KEYS_POLL_INTERVAL) + +static struct gpio_led ap90q_leds_gpio[] __initdata = { + { + .name = "ap90q:green:lan", + .gpio = AP90Q_GPIO_LED_LAN, + .active_low = 1, + }, + { + .name = "ap90q:green:wan", + .gpio = AP90Q_GPIO_LED_WAN, + .active_low = 1, + }, + { + .name = "ap90q:green:wlan", + .gpio = AP90Q_GPIO_LED_WLAN, + .active_low = 1, + }, +}; + +static struct gpio_keys_button ap90q_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = AP90Q_KEYS_DEBOUNCE_INTERVAL, + .gpio = AP90Q_GPIO_BTN_RESET, + .active_low = 1, + }, +}; + +static void __init ap90q_gpio_setup(void) +{ + /* For LED on GPIO4 */ + ath79_gpio_function_disable(AR934X_GPIO_FUNC_CLK_OBS4_EN); + + ath79_gpio_direction_select(AP90Q_GPIO_LED_LAN, true); + ath79_gpio_direction_select(AP90Q_GPIO_LED_WAN, true); + ath79_gpio_direction_select(AP90Q_GPIO_LED_WLAN, true); + + /* Mute LEDs on boot */ + gpio_set_value(AP90Q_GPIO_LED_LAN, 1); + gpio_set_value(AP90Q_GPIO_LED_WAN, 1); + + ath79_gpio_output_select(AP90Q_GPIO_LED_LAN, 0); + ath79_gpio_output_select(AP90Q_GPIO_LED_WAN, 0); + ath79_gpio_output_select(AP90Q_GPIO_LED_WLAN, 0); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(ap90q_leds_gpio), + ap90q_leds_gpio); + + ath79_register_gpio_keys_polled(-1, AP90Q_KEYS_POLL_INTERVAL, + ARRAY_SIZE(ap90q_gpio_keys), + ap90q_gpio_keys); +} + +static void __init ap90q_setup(void) +{ + u8 *art = (u8 *) KSEG1ADDR(0x1fff1000); + u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); + + ath79_register_m25p80(NULL); + + ap90q_gpio_setup(); + + ath79_setup_ar933x_phy4_switch(false, false); + + ath79_register_mdio(0, 0x0); + + ath79_switch_data.phy4_mii_en = 1; + ath79_switch_data.phy_poll_mask |= BIT(4); + + /* LAN */ + ath79_eth1_data.duplex = DUPLEX_FULL; + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; + ath79_eth1_data.speed = SPEED_1000; + ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); + ath79_register_eth(1); + + /* WAN */ + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; + ath79_eth0_data.speed = SPEED_100; + ath79_eth0_data.phy_mask = BIT(4); + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + ath79_register_eth(0); + + ath79_register_wmac(art, NULL); +} + +MIPS_MACHINE(ATH79_MACH_AP90Q, "AP90Q", "YunCore AP90Q", ap90q_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h index 5e504b1..e69cf3b 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h +++ b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h @@ -38,6 +38,7 @@ enum ath79_mach_type { ATH79_MACH_AP152, /* Atheros AP152 reference board */ ATH79_MACH_AP81, /* Atheros AP81 reference board */ ATH79_MACH_AP83, /* Atheros AP83 */ + ATH79_MACH_AP90Q, /* YunCore AP90Q */ ATH79_MACH_AP96, /* Atheros AP96 */ ATH79_MACH_ARCHER_C5, /* TP-LINK Archer C5 board */ ATH79_MACH_ARCHER_C7, /* TP-LINK Archer C7 board */ -- cgit v1.1