From d2c9b169b3a3c43e66648590a9d0f1a12becebcf Mon Sep 17 00:00:00 2001 From: Piotr Dymacz Date: Fri, 8 Jul 2016 15:03:00 +0200 Subject: ar71xx: add support for jjPlus JWAP230 jjPlus JWAP230 is based on Qualcomm Atheros QCA9558 + QCA8337. Short specification: - 720/600/200 MHz (CPU/DDR/AHB) - 2x 10/100/1000 Mbps Ethernet - 128 MB of RAM (DDR2) - 16 MB of FLASH - 3T3R 2.4 GHz with external PA (SST12LP15A), up to 28 dBm - 3x MMCX connectors - power input: 802.3at PoE or wide range DC (36-57 V) - optional 802.3af PSE - 1x mini-PCIe connector with PCIe, USB buses and SIM slot - 1x mini-PCIe connector with PCIe bus - 1x USB type-A connector - 6x LED, 1x button (hardware reset) - RS232 (MAX3223) and (E)JTAG headers Default configuration: - WAN on eth1 (RJ45 near LEDs with PoE input) - LAN on eth0 (RJ45 near DC jack) - left top LED set to be status LED - all LEDs configurable form user space Flash instruction (do it under U-Boot, using RS232): 1. tftp 0x80060000 lede-ar71xx-generic-jwap230-squashfs-sysupgrade.bin 2. erase 0x9f050000 +$filesize 3. cp.b $fileaddr 0x9f050000 $filesize 4. setenv bootcmd "bootm 0x9f050000" 5. saveenv && reset Signed-off-by: Piotr Dymacz --- .../ar71xx/files/arch/mips/ath79/Kconfig.openwrt | 9 ++ target/linux/ar71xx/files/arch/mips/ath79/Makefile | 1 + .../ar71xx/files/arch/mips/ath79/mach-jwap230.c | 158 +++++++++++++++++++++ .../linux/ar71xx/files/arch/mips/ath79/machtypes.h | 1 + 4 files changed, 169 insertions(+) create mode 100644 target/linux/ar71xx/files/arch/mips/ath79/mach-jwap230.c (limited to 'target/linux/ar71xx/files/arch') diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt index 9ab6fed..b0eada1 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt +++ b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt @@ -680,6 +680,15 @@ config ATH79_MACH_JWAP003 select ATH79_DEV_M25P80 select ATH79_DEV_USB +config ATH79_MACH_JWAP230 + bool "jjPlus JWAP230 board support" + select SOC_QCA955X + select ATH79_DEV_ETH + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_M25P80 + select ATH79_DEV_USB + select ATH79_DEV_WMAC + config ATH79_MACH_WRT160NL bool "Linksys WRT160NL board support" select SOC_AR913X diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Makefile b/target/linux/ar71xx/files/arch/mips/ath79/Makefile index 33c274f..390b17d 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/Makefile +++ b/target/linux/ar71xx/files/arch/mips/ath79/Makefile @@ -100,6 +100,7 @@ obj-$(CONFIG_ATH79_MACH_GS_OOLITE) += mach-gs-oolite.o obj-$(CONFIG_ATH79_MACH_HIWIFI_HC6361) += mach-hiwifi-hc6361.o obj-$(CONFIG_ATH79_MACH_JA76PF) += mach-ja76pf.o obj-$(CONFIG_ATH79_MACH_JWAP003) += mach-jwap003.o +obj-$(CONFIG_ATH79_MACH_JWAP230) += mach-jwap230.o obj-$(CONFIG_ATH79_MACH_HORNET_UB) += mach-hornet-ub.o obj-$(CONFIG_ATH79_MACH_MC_MAC1200R) += mach-mc-mac1200r.o obj-$(CONFIG_ATH79_MACH_MR12) += mach-mr12.o diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-jwap230.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-jwap230.c new file mode 100644 index 0000000..f94e5b4 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-jwap230.c @@ -0,0 +1,158 @@ +/* + * jjPlus JWAP230 board support + * + * Copyright (C) 2016 Piotr Dymacz + * + * Based on mach-wpj558.c and mach-tl-wr1043nd-v2.c + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include + +#include +#include + +#include "common.h" +#include "dev-ap9x-pci.h" +#include "dev-eth.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "dev-wmac.h" +#include "machtypes.h" +#include "pci.h" + +#define JWAP230_GPIO_LED_LED1 23 +#define JWAP230_GPIO_LED_LED2 22 +#define JWAP230_GPIO_LED_LED3 21 + +#define JWAP230_MAC0_OFFSET 0x0 +#define JWAP230_MAC1_OFFSET 0x6 +#define JWAP230_WMAC_CALDATA_OFFSET 0x1000 + +static struct gpio_led jwap230_leds_gpio[] __initdata = { + { + .name = "jwap230:green:led1", + .gpio = JWAP230_GPIO_LED_LED1, + .active_low = 1, + }, + { + .name = "jwap230:green:led2", + .gpio = JWAP230_GPIO_LED_LED2, + .active_low = 1, + }, + { + .name = "jwap230:green:led3", + .gpio = JWAP230_GPIO_LED_LED3, + .active_low = 1, + } +}; + +static const struct ar8327_led_info jwap230_leds_qca8337[] = { + AR8327_LED_INFO(PHY0_0, HW, "jwap230:green:lan"), + AR8327_LED_INFO(PHY4_0, HW, "jwap230:green:wan"), +}; + +/* Blink rate: 1 Gbps -> 8 hz, 100 Mbs -> 4 Hz, 10 Mbps -> 2 Hz */ +static struct ar8327_led_cfg jwap230_qca8337_led_cfg = { + .led_ctrl0 = 0xcf37cf37, + .led_ctrl1 = 0xcf37cf37, + .led_ctrl2 = 0xcf37cf37, + .led_ctrl3 = 0x0, + .open_drain = true, +}; + +/* QCA8337 GMAC0 is connected with QCA9558 over RGMII */ +static struct ar8327_pad_cfg jwap230_qca8337_pad0_cfg = { + .mode = AR8327_PAD_MAC_RGMII, + .txclk_delay_en = true, + .rxclk_delay_en = true, + .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, + .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, + .mac06_exchange_dis = true, +}; + +/* QCA8337 GMAC6 is connected with QCA9558 over SGMII */ +static struct ar8327_pad_cfg jwap230_qca8337_pad6_cfg = { + .mode = AR8327_PAD_MAC_SGMII, + .sgmii_delay_en = true, + .rxclk_delay_sel = AR8327_CLK_DELAY_SEL0, +}; + +static struct ar8327_platform_data jwap230_qca8337_data = { + .pad0_cfg = &jwap230_qca8337_pad0_cfg, + .pad6_cfg = &jwap230_qca8337_pad6_cfg, + .port0_cfg = { + .force_link = 1, + .speed = AR8327_PORT_SPEED_1000, + .duplex = 1, + .txpause = 1, + .rxpause = 1, + }, + .port6_cfg = { + .force_link = 1, + .speed = AR8327_PORT_SPEED_1000, + .duplex = 1, + .txpause = 1, + .rxpause = 1, + }, + .led_cfg = &jwap230_qca8337_led_cfg, + .num_leds = ARRAY_SIZE(jwap230_leds_qca8337), + .leds = jwap230_leds_qca8337, +}; + +static struct mdio_board_info jwap230_mdio0_info[] = { + { + .bus_id = "ag71xx-mdio.0", + .phy_addr = 0, + .platform_data = &jwap230_qca8337_data, + }, +}; + +static void __init jwap230_setup(void) +{ + u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); + + ath79_register_m25p80(NULL); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(jwap230_leds_gpio), + jwap230_leds_gpio); + + mdiobus_register_board_info(jwap230_mdio0_info, + ARRAY_SIZE(jwap230_mdio0_info)); + ath79_register_mdio(0, 0x0); + + ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); + + /* QCA9558 GMAC0 is connected to RMGII interface */ + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth0_data.phy_mask = BIT(0); + ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; + ath79_eth0_pll_data.pll_1000 = 0xa6000000; + + ath79_init_mac(ath79_eth0_data.mac_addr, art + JWAP230_MAC0_OFFSET, 0); + ath79_register_eth(0); + + /* QCA9558 GMAC1 is connected to SGMII interface */ + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; + ath79_eth1_data.speed = SPEED_1000; + ath79_eth1_data.duplex = DUPLEX_FULL; + ath79_eth1_pll_data.pll_1000 = 0x03000101; + + ath79_init_mac(ath79_eth1_data.mac_addr, art + JWAP230_MAC1_OFFSET, 0); + ath79_register_eth(1); + + ath79_register_wmac(art + JWAP230_WMAC_CALDATA_OFFSET, NULL); + + ath79_register_pci(); + ath79_register_usb(); +} + +MIPS_MACHINE(ATH79_MACH_JWAP230, "JWAP230", "jjPlus JWAP230", jwap230_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h index 3425ce9..7dd60ac 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h +++ b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h @@ -94,6 +94,7 @@ enum ath79_mach_type { ATH79_MACH_JA76PF, /* jjPlus JA76PF */ ATH79_MACH_JA76PF2, /* jjPlus JA76PF2 */ ATH79_MACH_JWAP003, /* jjPlus JWAP003 */ + ATH79_MACH_JWAP230, /* jjPlus JWAP230 */ ATH79_MACH_HORNET_UB, /* ALFA Networks Hornet-UB */ ATH79_MACH_MR12, /* Cisco Meraki MR12 */ ATH79_MACH_MR16, /* Cisco Meraki MR16 */ -- cgit v1.1