From e07ee06aad412fe417c6b50bba8ba2f723cd1433 Mon Sep 17 00:00:00 2001 From: Henryk Heisig Date: Fri, 6 Jan 2017 21:21:11 +0100 Subject: ar71xx: QCA956X: add missing register Signed-off-by: Henryk Heisig --- .../linux/ar71xx/files/arch/mips/ath79/dev-eth.c | 23 +++++++++++++++++++++- .../linux/ar71xx/files/arch/mips/ath79/dev-eth.h | 1 + .../mips/include/asm/mach-ath79/ag71xx_platform.h | 2 ++ 3 files changed, 25 insertions(+), 1 deletion(-) (limited to 'target/linux/ar71xx/files/arch') diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c index 790c2d3..a8b19b6 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c @@ -686,7 +686,6 @@ static int __init ath79_setup_phy_if_mode(unsigned int id, case ATH79_SOC_AR7241: case ATH79_SOC_AR9330: case ATH79_SOC_AR9331: - case ATH79_SOC_QCA956X: case ATH79_SOC_TP9343: pdata->phy_if_mode = PHY_INTERFACE_MODE_GMII; break; @@ -698,6 +697,7 @@ static int __init ath79_setup_phy_if_mode(unsigned int id, case ATH79_SOC_AR9342: case ATH79_SOC_AR9344: case ATH79_SOC_QCA9533: + case ATH79_SOC_QCA956X: switch (pdata->phy_if_mode) { case PHY_INTERFACE_MODE_MII: case PHY_INTERFACE_MODE_GMII: @@ -814,6 +814,27 @@ void __init ath79_setup_qca955x_eth_cfg(u32 mask) iounmap(base); } +void __init ath79_setup_qca956x_eth_cfg(u32 mask) +{ + void __iomem *base; + u32 t; + + base = ioremap(QCA956X_GMAC_BASE, QCA956X_GMAC_SIZE); + + t = __raw_readl(base + QCA956X_GMAC_REG_ETH_CFG); + + t &= ~(QCA956X_ETH_CFG_SW_ONLY_MODE | + QCA956X_ETH_CFG_SW_PHY_SWAP); + + t |= mask; + + __raw_writel(t, base + QCA956X_GMAC_REG_ETH_CFG); + /* flush write */ + __raw_readl(base + QCA956X_GMAC_REG_ETH_CFG); + + iounmap(base); +} + static int ath79_eth_instance __initdata; void __init ath79_register_eth(unsigned int id) { diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h index 5a226e4..fb9e4f6 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h @@ -49,5 +49,6 @@ void ath79_setup_ar933x_phy4_switch(bool mac, bool mdio); void ath79_setup_ar934x_eth_cfg(u32 mask); void ath79_setup_ar934x_eth_rx_delay(unsigned int rxd, unsigned int rxdv); void ath79_setup_qca955x_eth_cfg(u32 mask); +void ath79_setup_qca956x_eth_cfg(u32 mask); #endif /* _ATH79_DEV_ETH_H */ diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h index 5fd352c..078fa15 100644 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h +++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h @@ -37,11 +37,13 @@ struct ag71xx_platform_data { u8 is_ar724x:1; u8 has_ar8216:1; u8 use_flow_control:1; + u8 is_qca956x:1; struct ag71xx_switch_platform_data *switch_data; void (*ddr_flush)(void); void (*set_speed)(int speed); + void (*update_pll)(u32 pll_10, u32 pll_100, u32 pll_1000); u32 fifo_cfg1; u32 fifo_cfg2; -- cgit v1.1