From cd6a4cde130027b77f17ae5da758944f9de7f583 Mon Sep 17 00:00:00 2001 From: Gabor Juhos Date: Tue, 13 Mar 2012 17:29:37 +0000 Subject: ar71xx: ag71xx: start aneg on switch PHYs after reset SVN-Revision: 30925 --- .../files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'target/linux/ar71xx/files/drivers') diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c index f14b231..9faed21 100644 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c @@ -596,6 +596,16 @@ static int ar7240sw_reset(struct ar7240sw *as) ret = ar7240sw_reg_wait(mii, AR7240_REG_MASK_CTRL, AR7240_MASK_CTRL_SOFT_RESET, 0, 1000); + /* setup PHYs */ + for (i = 0; i < AR7240_NUM_PHYS; i++) { + ar7240sw_phy_write(mii, i, MII_ADVERTISE, + ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | + ADVERTISE_PAUSE_ASYM); + ar7240sw_phy_write(mii, i, MII_BMCR, + BMCR_RESET | BMCR_ANENABLE); + } + msleep(1000); + ar7240sw_setup(as); return ret; } -- cgit v1.1