From fcfbbfc3859723dbc27dcf211d0e12eef30f38f8 Mon Sep 17 00:00:00 2001 From: Luka Perkov Date: Sat, 7 Feb 2015 20:53:16 +0000 Subject: ar71xx: merge board specific patches into one Signed-off-by: Luka Perkov SVN-Revision: 44309 --- .../patches-3.14/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'target/linux/ar71xx/patches-3.14/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch') diff --git a/target/linux/ar71xx/patches-3.14/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch b/target/linux/ar71xx/patches-3.14/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch index fdfd7f8..7fcfb02 100644 --- a/target/linux/ar71xx/patches-3.14/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch +++ b/target/linux/ar71xx/patches-3.14/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch @@ -22,7 +22,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. --- a/arch/mips/ath79/Kconfig +++ b/arch/mips/ath79/Kconfig -@@ -948,6 +948,10 @@ config SOC_AR934X +@@ -1165,6 +1165,10 @@ config SOC_AR934X select PCI_AR724X if PCI def_bool n @@ -33,7 +33,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. config SOC_QCA955X select USB_ARCH_HAS_EHCI select HW_HAS_PCI -@@ -991,7 +995,7 @@ config ATH79_DEV_USB +@@ -1208,7 +1212,7 @@ config ATH79_DEV_USB def_bool n config ATH79_DEV_WMAC -- cgit v1.1