From fc0da6852e9b0586d6cd1ea79378824639b56e01 Mon Sep 17 00:00:00 2001 From: Gabor Juhos Date: Mon, 17 Dec 2012 22:28:09 +0000 Subject: ar71xx: nuke 3.3 support Signed-off-by: Gabor Juhos SVN-Revision: 34743 --- ...th79-add-PCI-registration-code-for-AR934X.patch | 62 ---------------------- 1 file changed, 62 deletions(-) delete mode 100644 target/linux/ar71xx/patches-3.3/130-MIPS-ath79-add-PCI-registration-code-for-AR934X.patch (limited to 'target/linux/ar71xx/patches-3.3/130-MIPS-ath79-add-PCI-registration-code-for-AR934X.patch') diff --git a/target/linux/ar71xx/patches-3.3/130-MIPS-ath79-add-PCI-registration-code-for-AR934X.patch b/target/linux/ar71xx/patches-3.3/130-MIPS-ath79-add-PCI-registration-code-for-AR934X.patch deleted file mode 100644 index bd9386d..0000000 --- a/target/linux/ar71xx/patches-3.3/130-MIPS-ath79-add-PCI-registration-code-for-AR934X.patch +++ /dev/null @@ -1,62 +0,0 @@ -From 902b348cdddd4c858993e02aced615aa6caf04d0 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos -Date: Wed, 14 Mar 2012 10:45:30 +0100 -Subject: [PATCH 35/47] MIPS: ath79: add PCI registration code for AR934X - -Signed-off-by: Gabor Juhos -Acked-by: Luis R. Rodriguez -Cc: linux-mips@linux-mips.org -Cc: mcgrof@infradead.org -Patchwork: https://patchwork.linux-mips.org/patch/3516/ -Signed-off-by: Ralf Baechle ---- - arch/mips/ath79/Kconfig | 2 ++ - arch/mips/ath79/pci.c | 13 ++++++++++++- - 2 files changed, 14 insertions(+), 1 deletions(-) - ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -72,6 +72,8 @@ config SOC_AR933X - - config SOC_AR934X - select USB_ARCH_HAS_EHCI -+ select HW_HAS_PCI -+ select PCI_AR724X if PCI - def_bool n - - config PCI_AR724X ---- a/arch/mips/ath79/pci.c -+++ b/arch/mips/ath79/pci.c -@@ -14,6 +14,7 @@ - - #include - #include -+#include - #include - #include - #include -@@ -57,7 +58,9 @@ int __init pcibios_map_irq(const struct - if (soc_is_ar71xx()) { - ath79_pci_irq_map = ar71xx_pci_irq_map; - ath79_pci_nr_irqs = ARRAY_SIZE(ar71xx_pci_irq_map); -- } else if (soc_is_ar724x()) { -+ } else if (soc_is_ar724x() || -+ soc_is_ar9342() || -+ soc_is_ar9344()) { - ath79_pci_irq_map = ar724x_pci_irq_map; - ath79_pci_nr_irqs = ARRAY_SIZE(ar724x_pci_irq_map); - } else { -@@ -115,5 +118,13 @@ int __init ath79_register_pci(void) - if (soc_is_ar724x()) - return ar724x_pcibios_init(ATH79_CPU_IRQ_IP2); - -+ if (soc_is_ar9342() || soc_is_ar9344()) { -+ u32 bootstrap; -+ -+ bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); -+ if (bootstrap & AR934X_BOOTSTRAP_PCIE_RC) -+ return ar724x_pcibios_init(ATH79_IP2_IRQ(0)); -+ } -+ - return -ENODEV; - } -- cgit v1.1