From 512e0fca81dc4c6d554292eeae76d1162cb4197d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= Date: Thu, 28 Jan 2016 07:01:17 +0000 Subject: bcm53xx: replace iproc regression fix with the final one MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Rafał Miłecki SVN-Revision: 48518 --- ...roc-Fix-BCMA-PCIe-bus-scanning-regression.patch | 73 ++++++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 target/linux/bcm53xx/patches-4.4/088-PCI-iproc-Fix-BCMA-PCIe-bus-scanning-regression.patch (limited to 'target/linux/bcm53xx/patches-4.4/088-PCI-iproc-Fix-BCMA-PCIe-bus-scanning-regression.patch') diff --git a/target/linux/bcm53xx/patches-4.4/088-PCI-iproc-Fix-BCMA-PCIe-bus-scanning-regression.patch b/target/linux/bcm53xx/patches-4.4/088-PCI-iproc-Fix-BCMA-PCIe-bus-scanning-regression.patch new file mode 100644 index 0000000..d35287f --- /dev/null +++ b/target/linux/bcm53xx/patches-4.4/088-PCI-iproc-Fix-BCMA-PCIe-bus-scanning-regression.patch @@ -0,0 +1,73 @@ +From c43e4b52cbf2267047f67c9f65de18ee1ab8bfa2 Mon Sep 17 00:00:00 2001 +From: Ray Jui +Date: Wed, 27 Jan 2016 16:52:24 -0600 +Subject: [PATCH] PCI: iproc: Fix BCMA PCIe bus scanning regression + +Commit 943ebae781f5 ("PCI: iproc: Add PAXC interface support") causes +regression on EP device detection on BCMA based platforms. + +Fix the issue by allowing multiple devices to be configured on the same +bus, for all PAXB based child buses. In addition, add a check to prevent +non-zero function from being used on bus 0 (root bus). + +Fixes: 943ebae781f5 ("PCI: iproc: Add PAXC interface support") +Reported-by: Rafal Milecki +Signed-off-by: Ray Jui +Signed-off-by: Bjorn Helgaas +--- + drivers/pci/host/pcie-iproc.c | 28 +++++++++++----------------- + 1 file changed, 11 insertions(+), 17 deletions(-) + +--- a/drivers/pci/host/pcie-iproc.c ++++ b/drivers/pci/host/pcie-iproc.c +@@ -170,20 +170,6 @@ static inline void iproc_pcie_ob_write(s + writel(val, pcie->base + offset + (window * 8)); + } + +-static inline bool iproc_pcie_device_is_valid(struct iproc_pcie *pcie, +- unsigned int slot, +- unsigned int fn) +-{ +- if (slot > 0) +- return false; +- +- /* PAXC can only support limited number of functions */ +- if (pcie->type == IPROC_PCIE_PAXC && fn >= MAX_NUM_PAXC_PF) +- return false; +- +- return true; +-} +- + /** + * Note access to the configuration registers are protected at the higher layer + * by 'pci_lock' in drivers/pci/access.c +@@ -199,11 +185,11 @@ static void __iomem *iproc_pcie_map_cfg_ + u32 val; + u16 offset; + +- if (!iproc_pcie_device_is_valid(pcie, slot, fn)) +- return NULL; +- + /* root complex access */ + if (busno == 0) { ++ if (slot > 0 || fn > 0) ++ return NULL; ++ + iproc_pcie_write_reg(pcie, IPROC_PCIE_CFG_IND_ADDR, + where & CFG_IND_ADDR_MASK); + offset = iproc_pcie_reg_offset(pcie, IPROC_PCIE_CFG_IND_DATA); +@@ -213,6 +199,14 @@ static void __iomem *iproc_pcie_map_cfg_ + return (pcie->base + offset); + } + ++ /* ++ * PAXC is connected to an internally emulated EP within the SoC. It ++ * allows only one device and supports a limited number of functions. ++ */ ++ if (pcie->type == IPROC_PCIE_PAXC) ++ if (slot > 0 || fn >= MAX_NUM_PAXC_PF) ++ return NULL; ++ + /* EP device access */ + val = (busno << CFG_ADDR_BUS_NUM_SHIFT) | + (slot << CFG_ADDR_DEV_NUM_SHIFT) | -- cgit v1.1