From 0aa6c7df60d0d4a4fa01dc1b185df31ffb2c53f6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Sun, 12 Jun 2016 11:49:46 +0200 Subject: kernel: update kernel 4.4 to version 4.4.13 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Álvaro Fernández Rojas --- .../0265-clk-bcm2835-add-missing-osc-and-per-clocks.patch | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'target/linux/brcm2708/patches-4.4/0265-clk-bcm2835-add-missing-osc-and-per-clocks.patch') diff --git a/target/linux/brcm2708/patches-4.4/0265-clk-bcm2835-add-missing-osc-and-per-clocks.patch b/target/linux/brcm2708/patches-4.4/0265-clk-bcm2835-add-missing-osc-and-per-clocks.patch index d9943ac..8be0dce 100644 --- a/target/linux/brcm2708/patches-4.4/0265-clk-bcm2835-add-missing-osc-and-per-clocks.patch +++ b/target/linux/brcm2708/patches-4.4/0265-clk-bcm2835-add-missing-osc-and-per-clocks.patch @@ -26,7 +26,7 @@ Reviewed-by: Eric Anholt #define CM_EMMCCTL 0x1c0 #define CM_EMMCDIV 0x1c4 -@@ -1606,6 +1608,12 @@ static const struct bcm2835_clk_desc clk +@@ -1610,6 +1612,12 @@ static const struct bcm2835_clk_desc clk .div_reg = CM_TSENSDIV, .int_bits = 5, .frac_bits = 0), @@ -39,7 +39,7 @@ Reviewed-by: Eric Anholt /* clocks with vpu parent mux */ [BCM2835_CLOCK_H264] = REGISTER_VPU_CLK( -@@ -1620,6 +1628,7 @@ static const struct bcm2835_clk_desc clk +@@ -1624,6 +1632,7 @@ static const struct bcm2835_clk_desc clk .div_reg = CM_ISPDIV, .int_bits = 4, .frac_bits = 8), @@ -47,7 +47,7 @@ Reviewed-by: Eric Anholt /* * Secondary SDRAM clock. Used for low-voltage modes when the PLL * in the SDRAM controller can't be used. -@@ -1651,6 +1660,36 @@ static const struct bcm2835_clk_desc clk +@@ -1655,6 +1664,36 @@ static const struct bcm2835_clk_desc clk .is_vpu_clock = true), /* clocks with per parent mux */ @@ -84,7 +84,7 @@ Reviewed-by: Eric Anholt /* Arasan EMMC clock */ [BCM2835_CLOCK_EMMC] = REGISTER_PER_CLK( -@@ -1659,6 +1698,29 @@ static const struct bcm2835_clk_desc clk +@@ -1663,6 +1702,29 @@ static const struct bcm2835_clk_desc clk .div_reg = CM_EMMCDIV, .int_bits = 4, .frac_bits = 8), @@ -114,7 +114,7 @@ Reviewed-by: Eric Anholt /* HDMI state machine */ [BCM2835_CLOCK_HSM] = REGISTER_PER_CLK( .name = "hsm", -@@ -1680,12 +1742,26 @@ static const struct bcm2835_clk_desc clk +@@ -1684,12 +1746,26 @@ static const struct bcm2835_clk_desc clk .int_bits = 12, .frac_bits = 12, .is_mash_clock = true), @@ -141,7 +141,7 @@ Reviewed-by: Eric Anholt /* TV encoder clock. Only operating frequency is 108Mhz. */ [BCM2835_CLOCK_VEC] = REGISTER_PER_CLK( .name = "vec", -@@ -1694,6 +1770,20 @@ static const struct bcm2835_clk_desc clk +@@ -1698,6 +1774,20 @@ static const struct bcm2835_clk_desc clk .int_bits = 4, .frac_bits = 0), -- cgit v1.1