From 3fc661a98c8046a27dcf45a63049ee6605ebd364 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Wed, 8 Jun 2016 11:59:37 +0200 Subject: brcm2708: update linux 4.4 patches to latest version MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit As usual these patches were extracted from the raspberry pi repo: https://github.com/raspberrypi/linux/tree/rpi-4.4.y Also alphabetically order sound-soc kernel packages. Signed-off-by: Álvaro Fernández Rojas --- ...x-setting-of-vertical-timings-in-the-CRTC.patch | 34 ++++++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 target/linux/brcm2708/patches-4.4/0291-drm-vc4-Fix-setting-of-vertical-timings-in-the-CRTC.patch (limited to 'target/linux/brcm2708/patches-4.4/0291-drm-vc4-Fix-setting-of-vertical-timings-in-the-CRTC.patch') diff --git a/target/linux/brcm2708/patches-4.4/0291-drm-vc4-Fix-setting-of-vertical-timings-in-the-CRTC.patch b/target/linux/brcm2708/patches-4.4/0291-drm-vc4-Fix-setting-of-vertical-timings-in-the-CRTC.patch new file mode 100644 index 0000000..319fc16 --- /dev/null +++ b/target/linux/brcm2708/patches-4.4/0291-drm-vc4-Fix-setting-of-vertical-timings-in-the-CRTC.patch @@ -0,0 +1,34 @@ +From c6f8dd873098c2c41e97606d55b806a8c5965b3e Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Mon, 15 Feb 2016 17:31:41 -0800 +Subject: [PATCH 291/381] drm/vc4: Fix setting of vertical timings in the CRTC. + +It looks like when I went to add the interlaced bits, I just took the +existing PV_VERT* block and indented it, instead of copy and pasting +it first. Without this, changing resolution never worked. + +Signed-off-by: Eric Anholt +(cherry picked from commit a7c5047d1ce178dd2b1fa577fc8909ad663d56d5) +--- + drivers/gpu/drm/vc4/vc4_crtc.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +--- a/drivers/gpu/drm/vc4/vc4_crtc.c ++++ b/drivers/gpu/drm/vc4/vc4_crtc.c +@@ -217,6 +217,16 @@ static void vc4_crtc_mode_set_nofb(struc + PV_HORZB_HFP) | + VC4_SET_FIELD(mode->hdisplay, PV_HORZB_HACTIVE)); + ++ CRTC_WRITE(PV_VERTA, ++ VC4_SET_FIELD(mode->vtotal - mode->vsync_end, ++ PV_VERTA_VBP) | ++ VC4_SET_FIELD(mode->vsync_end - mode->vsync_start, ++ PV_VERTA_VSYNC)); ++ CRTC_WRITE(PV_VERTB, ++ VC4_SET_FIELD(mode->vsync_start - mode->vdisplay, ++ PV_VERTB_VFP) | ++ VC4_SET_FIELD(vactive, PV_VERTB_VACTIVE)); ++ + if (interlace) { + CRTC_WRITE(PV_VERTA_EVEN, + VC4_SET_FIELD(mode->vtotal - mode->vsync_end - 1, -- cgit v1.1