From e39414ed07e03c8cd1aecd1874acf40d6d8a8d93 Mon Sep 17 00:00:00 2001 From: Koen Vandeputte Date: Thu, 24 May 2018 10:08:20 +0200 Subject: kernel: bump 4.14 to 4.14.43 for 18.06 Refreshed all patches Dropped upstreamed patches: 522-PCI-aardvark-fix-logic-in-PCI-configuration-read-write-functions.patch 523-PCI-aardvark-set-PIO_ADDR_LS-correctly-in-advk_pcie_rd_conf.patch 525-PCI-aardvark-use-isr1-instead-of-isr0-interrupt-in-legacy-irq-mode.patch 527-PCI-aardvark-fix-PCIe-max-read-request-size-setting.patch updated patches: 524-PCI-aardvark-set-host-and-device-to-the-same-MAX-payload-size.patch 030-USB-serial-option-fix-dwm-158-3g-modem-interface.patch Added new ARM64 symbol: CONFIG_ARM64_ERRATUM_1024718 Compile-tested on: cns3xxx, imx6, mvebu (arm64), x86_64 Runtime-tested on: cns3xxx, imx6, x86_64 Signed-off-by: Koen Vandeputte --- ...-MIPS-c-r4k-fix-data-corruption-related-to-cache-coherence.patch | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) mode change 100755 => 100644 target/linux/generic/pending-4.14/103-MIPS-c-r4k-fix-data-corruption-related-to-cache-coherence.patch (limited to 'target/linux/generic/pending-4.14/103-MIPS-c-r4k-fix-data-corruption-related-to-cache-coherence.patch') diff --git a/target/linux/generic/pending-4.14/103-MIPS-c-r4k-fix-data-corruption-related-to-cache-coherence.patch b/target/linux/generic/pending-4.14/103-MIPS-c-r4k-fix-data-corruption-related-to-cache-coherence.patch old mode 100755 new mode 100644 index 3cfbd2c..69d926b --- a/target/linux/generic/pending-4.14/103-MIPS-c-r4k-fix-data-corruption-related-to-cache-coherence.patch +++ b/target/linux/generic/pending-4.14/103-MIPS-c-r4k-fix-data-corruption-related-to-cache-coherence.patch @@ -62,11 +62,9 @@ Signed-off-by: NeilBrown arch/mips/mm/c-r4k.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) -diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c -index 6f534b209971..e12dfa48b478 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c -@@ -851,9 +851,12 @@ static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size) +@@ -851,9 +851,12 @@ static void r4k_dma_cache_wback_inv(unsi /* * Either no secondary cache or the available caches don't have the * subset property so we have to flush the primary caches @@ -81,7 +79,7 @@ index 6f534b209971..e12dfa48b478 100644 r4k_blast_dcache(); } else { R4600_HIT_CACHEOP_WAR_IMPL; -@@ -890,7 +893,7 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size) +@@ -890,7 +893,7 @@ static void r4k_dma_cache_inv(unsigned l return; } -- cgit v1.1