From 0f7de49fa37859b46de8d4e25163cfebe3db3a96 Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Tue, 4 Aug 2015 23:10:03 +0000 Subject: ipq806x: fix freeze in PCIe code when booting with an old u-boot Old bootloader (same ones which have DT disabled) don't perform any PCIe initialization. The consequence is a freeze during PCIe bring-up on these old u-boot. Same kernel with a newer bootloaders works fine as they contain the corresponding PCIe init code. In this change, we'll add the missing init and make sure the kernel doesn't rely on some preexisting init to get PCIe to work. That includes the following changes: *GPIOs: set function & drive strength *Clocks: add init code for aux & ref clocks *PCIe driver: additional init of the hardware controller Tested 3.18 and 4.1 on an AP148 with bootloader branch 0.0.1 Signed-off-by: Mathieu Olivari SVN-Revision: 46557 --- ...-qcom-add-pcie-nodes-to-ipq806x-platforms.patch | 23 +++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) (limited to 'target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch') diff --git a/target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch b/target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch index df96ad5..fc2fe0a 100644 --- a/target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch +++ b/target/linux/ipq806x/patches-4.1/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch @@ -15,14 +15,15 @@ Signed-off-by: Mathieu Olivari --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts -@@ -35,6 +35,22 @@ +@@ -35,6 +35,24 @@ bias-disable; }; + pcie0_pins: pcie0_pinmux { + mux { + pins = "gpio3"; -+ drive-strength = <2>; ++ function = "pcie1_rst"; ++ drive-strength = <12>; + bias-disable; + }; + }; @@ -30,7 +31,8 @@ Signed-off-by: Mathieu Olivari + pcie1_pins: pcie1_pinmux { + mux { + pins = "gpio48"; -+ drive-strength = <2>; ++ function = "pcie2_rst"; ++ drive-strength = <12>; + bias-disable; + }; + }; @@ -38,7 +40,7 @@ Signed-off-by: Mathieu Olivari spi_pins: spi_pins { mux { pins = "gpio18", "gpio19", "gpio21"; -@@ -114,5 +130,19 @@ +@@ -114,5 +132,19 @@ sata@29000000 { status = "ok"; }; @@ -60,14 +62,15 @@ Signed-off-by: Mathieu Olivari }; --- a/arch/arm/boot/dts/qcom-ipq8064-db149.dts +++ b/arch/arm/boot/dts/qcom-ipq8064-db149.dts -@@ -30,6 +30,30 @@ +@@ -30,6 +30,33 @@ bias-disable; }; + pcie0_pins: pcie0_pinmux { + mux { + pins = "gpio3"; -+ drive-strength = <2>; ++ function = "pcie1_rst"; ++ drive-strength = <12>; + bias-disable; + }; + }; @@ -75,7 +78,8 @@ Signed-off-by: Mathieu Olivari + pcie1_pins: pcie1_pinmux { + mux { + pins = "gpio48"; -+ drive-strength = <2>; ++ function = "pcie2_rst"; ++ drive-strength = <12>; + bias-disable; + }; + }; @@ -83,7 +87,8 @@ Signed-off-by: Mathieu Olivari + pcie2_pins: pcie2_pinmux { + mux { + pins = "gpio63"; -+ drive-strength = <2>; ++ function = "pcie3_rst"; ++ drive-strength = <12>; + bias-disable; + }; + }; @@ -91,7 +96,7 @@ Signed-off-by: Mathieu Olivari spi_pins: spi_pins { mux { pins = "gpio18", "gpio19", "gpio21"; -@@ -128,5 +152,26 @@ +@@ -128,5 +155,26 @@ usb30@1 { status = "ok"; }; -- cgit v1.1