From 88ddb3746188037afd38d631f7a893587fa8bdf0 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Wed, 11 Feb 2015 10:09:23 +0000 Subject: ipq806x: update target to v3.18 Patches in the ipq806x/patches folder were out of tree in v3.14. The newest patch at the time was from June, so we can safely assume that either the patches have been merged, or they have been rejected for a good reason. If patches are seen missing, we'll cherry-pick them on a per-needed basis. This new kernel have been tested on AP148, which seems to works fine. Signed-off-by: Mathieu Olivari SVN-Revision: 44386 --- ...qcom-Add-device-tree-bindings-information.patch | 40 ---------------------- 1 file changed, 40 deletions(-) delete mode 100644 target/linux/ipq806x/patches/0145-phy-qcom-Add-device-tree-bindings-information.patch (limited to 'target/linux/ipq806x/patches/0145-phy-qcom-Add-device-tree-bindings-information.patch') diff --git a/target/linux/ipq806x/patches/0145-phy-qcom-Add-device-tree-bindings-information.patch b/target/linux/ipq806x/patches/0145-phy-qcom-Add-device-tree-bindings-information.patch deleted file mode 100644 index bd5e5d4..0000000 --- a/target/linux/ipq806x/patches/0145-phy-qcom-Add-device-tree-bindings-information.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 37258bc8fe832e4c681593a864686f627f6d3455 Mon Sep 17 00:00:00 2001 -From: Kumar Gala -Date: Tue, 10 Jun 2014 13:09:01 -0500 -Subject: [PATCH 145/182] phy: qcom: Add device tree bindings information - -Add binding spec for Qualcomm SoC PHYs, starting with the SATA PHY on -the IPQ806x family of SoCs. - -Signed-off-by: Kumar Gala ---- - Documentation/devicetree/bindings/phy/qcom-phy.txt | 23 ++++++++++++++++++++ - 1 file changed, 23 insertions(+) - create mode 100644 Documentation/devicetree/bindings/phy/qcom-phy.txt - ---- /dev/null -+++ b/Documentation/devicetree/bindings/phy/qcom-phy.txt -@@ -0,0 +1,23 @@ -+Qualcomm IPQ806x SATA PHY Controller -+------------------------------------ -+ -+SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers. -+Each SATA PHY controller should have its own node. -+ -+Required properties: -+- compatible: compatible list, contains "qcom,ipq806x-sata-phy" -+- reg: offset and length of the SATA PHY register set; -+- #phy-cells: must be zero -+- clocks: must be exactly one entry -+- clock-names: must be "cfg" -+ -+Example: -+ sata_phy: sata-phy@1b400000 { -+ compatible = "qcom,ipq806x-sata-phy"; -+ reg = <0x1b400000 0x200>; -+ -+ clocks = <&gcc SATA_PHY_CFG_CLK>; -+ clock-names = "cfg"; -+ -+ #phy-cells = <0>; -+ }; -- cgit v1.1