From da8fc1511fc83f6ba2cf0e1e1feadbe1b9b58f4d Mon Sep 17 00:00:00 2001 From: John Crispin Date: Mon, 7 May 2018 12:07:32 +0200 Subject: mediatek: backport upstream mediatek patches Signed-off-by: John Crispin (cherry picked from commit 050da2107a7eb2a571a8a3d0cee21cc6a44b72b8) --- .../0158-mmc-mediatek-add-latch-ck-support.patch | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 target/linux/mediatek/patches-4.14/0158-mmc-mediatek-add-latch-ck-support.patch (limited to 'target/linux/mediatek/patches-4.14/0158-mmc-mediatek-add-latch-ck-support.patch') diff --git a/target/linux/mediatek/patches-4.14/0158-mmc-mediatek-add-latch-ck-support.patch b/target/linux/mediatek/patches-4.14/0158-mmc-mediatek-add-latch-ck-support.patch new file mode 100644 index 0000000..c2c00e8 --- /dev/null +++ b/target/linux/mediatek/patches-4.14/0158-mmc-mediatek-add-latch-ck-support.patch @@ -0,0 +1,50 @@ +From de14d1d0dc7ecf5c3e7e2a591b4f14e688fa52e6 Mon Sep 17 00:00:00 2001 +From: Chaotian Jing +Date: Mon, 16 Oct 2017 09:46:37 +0800 +Subject: [PATCH 158/224] mmc: mediatek: add latch-ck support + +some platform(eg.mt2701) does not support "stop clk fix", in +this case, need set correct latch-ck to avoid crc error caused +by stop clock block-internally. + +Signed-off-by: Chaotian Jing +Tested-by: Sean Wang +Signed-off-by: Ulf Hansson +--- + drivers/mmc/host/mtk-sd.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c +index a2f26c9b17b4..d75a93d6803f 100644 +--- a/drivers/mmc/host/mtk-sd.c ++++ b/drivers/mmc/host/mtk-sd.c +@@ -378,6 +378,7 @@ struct msdc_host { + u32 sclk; /* SD/MS bus clock frequency */ + unsigned char timing; + bool vqmmc_enabled; ++ u32 latch_ck; + u32 hs400_ds_delay; + u32 hs200_cmd_int_delay; /* cmd internal delay for HS200/SDR104 */ + u32 hs400_cmd_int_delay; /* cmd internal delay for HS400 */ +@@ -1661,6 +1662,8 @@ static int msdc_tune_data(struct mmc_host *mmc, u32 opcode) + u32 tune_reg = host->dev_comp->pad_tune_reg; + int i, ret; + ++ sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_INT_DAT_LATCH_CK_SEL, ++ host->latch_ck); + sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL); + sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL); + for (i = 0 ; i < PAD_DELAY_MAX; i++) { +@@ -1773,6 +1776,9 @@ static const struct mmc_host_ops mt_msdc_ops = { + static void msdc_of_property_parse(struct platform_device *pdev, + struct msdc_host *host) + { ++ of_property_read_u32(pdev->dev.of_node, "mediatek,latch-ck", ++ &host->latch_ck); ++ + of_property_read_u32(pdev->dev.of_node, "hs400-ds-delay", + &host->hs400_ds_delay); + +-- +2.11.0 + -- cgit v1.1