From f5f173e2b794bd996fa6171bb6b18f13c4ed1e90 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Mon, 23 May 2016 11:20:20 +0200 Subject: mediatek: update patches * fixes NAND * adds latest ethernet patches Signed-off-by: John Crispin --- ...diatek-add-next-data-pointer-coherency-pr.patch | 46 ++++++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 target/linux/mediatek/patches-4.4/0086-net-next-mediatek-add-next-data-pointer-coherency-pr.patch (limited to 'target/linux/mediatek/patches-4.4/0086-net-next-mediatek-add-next-data-pointer-coherency-pr.patch') diff --git a/target/linux/mediatek/patches-4.4/0086-net-next-mediatek-add-next-data-pointer-coherency-pr.patch b/target/linux/mediatek/patches-4.4/0086-net-next-mediatek-add-next-data-pointer-coherency-pr.patch new file mode 100644 index 0000000..0d2fc46 --- /dev/null +++ b/target/linux/mediatek/patches-4.4/0086-net-next-mediatek-add-next-data-pointer-coherency-pr.patch @@ -0,0 +1,46 @@ +From 5077ac38a86023124ebbe24cd1b7ecbd0f8edaff Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Tue, 3 May 2016 03:06:59 +0200 +Subject: [PATCH 086/102] net-next: mediatek: add next data pointer coherency + protection + +The QDMA engine can fail to update the register pointing to the next TX +descriptor if this bit does not get set in the QDMA configuration register. +Not setting this bit can result in invalid values inside the TX rings +registers which will causes TX stalls. + +Signed-off-by: Sean Wang +Signed-off-by: John Crispin +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 2 +- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 1 + + 2 files changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +index aadd748..72908b2 100644 +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -1292,7 +1292,7 @@ static int mtk_start_dma(struct mtk_eth *eth) + mtk_w32(eth, + MTK_TX_WB_DDONE | MTK_RX_DMA_EN | MTK_TX_DMA_EN | + MTK_RX_2B_OFFSET | MTK_DMA_SIZE_16DWORDS | +- MTK_RX_BT_32DWORDS, ++ MTK_RX_BT_32DWORDS | MTK_NDP_CO_PRO, + MTK_QDMA_GLO_CFG); + + return 0; +diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +index 57f7e8a..a5eb7c6 100644 +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -91,6 +91,7 @@ + #define MTK_QDMA_GLO_CFG 0x1A04 + #define MTK_RX_2B_OFFSET BIT(31) + #define MTK_RX_BT_32DWORDS (3 << 11) ++#define MTK_NDP_CO_PRO BIT(10) + #define MTK_TX_WB_DDONE BIT(6) + #define MTK_DMA_SIZE_16DWORDS (2 << 4) + #define MTK_RX_DMA_BUSY BIT(3) +-- +1.7.10.4 + -- cgit v1.1