From 1175e83f5050aae6c421b4c8b272deef1a61e7f6 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Tue, 24 Feb 2015 11:59:35 +0000 Subject: mpc85xx: add 3.19 support It took very little to make the TL-WDR4900 work under 3.19: - config is the same as for 3.18 - only patch 210 had to be refreshed, the other patches are the same as for 3.18 - in /etc/config/wireless the path options need to be prefixed with "platform/" ('platform/ffe09000.pci/...') Signed-off-by: Heiner Kallweit SVN-Revision: 44517 --- .../patches-3.19/100-fix_mpc8568e_mds.patch | 32 ++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 target/linux/mpc85xx/patches-3.19/100-fix_mpc8568e_mds.patch (limited to 'target/linux/mpc85xx/patches-3.19/100-fix_mpc8568e_mds.patch') diff --git a/target/linux/mpc85xx/patches-3.19/100-fix_mpc8568e_mds.patch b/target/linux/mpc85xx/patches-3.19/100-fix_mpc8568e_mds.patch new file mode 100644 index 0000000..993b5f7 --- /dev/null +++ b/target/linux/mpc85xx/patches-3.19/100-fix_mpc8568e_mds.patch @@ -0,0 +1,32 @@ +--- a/arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi ++++ b/arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi +@@ -134,17 +134,8 @@ + + }; + +- duart-sleep-nexus { +- #address-cells = <1>; +- #size-cells = <1>; +- compatible = "simple-bus"; +- sleep = <&pmc 0x00000002>; +- ranges; +- + /include/ "pq3-duart-0.dtsi" + +- }; +- + L2: l2-cache-controller@20000 { + compatible = "fsl,mpc8568-l2-cache-controller"; + reg = <0x20000 0x1000>; +--- a/arch/powerpc/boot/dts/mpc8568mds.dts ++++ b/arch/powerpc/boot/dts/mpc8568mds.dts +@@ -309,6 +309,9 @@ + gpios = <&bcsr5 3 0>; + }; + }; ++ chosen { ++ linux,stdout-path = "/soc8568@e0000000/serial@4500"; ++ }; + }; + + /include/ "fsl/mpc8568si-post.dtsi" -- cgit v1.1