From 7b0ec8a5dba7da95294237d327815ca3f730e363 Mon Sep 17 00:00:00 2001
From: Felix Fietkau <nbd@openwrt.org>
Date: Thu, 10 Jul 2014 19:28:37 +0000
Subject: octeon: backport a few upstream fixes
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 41568
---
...-Add-twsi-interrupt-initialization-for-OC.patch | 47 ++++++++++++++++++++++
1 file changed, 47 insertions(+)
create mode 100644 target/linux/octeon/patches-3.10/0011-MIPS-Octeon-Add-twsi-interrupt-initialization-for-OC.patch
(limited to 'target/linux/octeon/patches-3.10/0011-MIPS-Octeon-Add-twsi-interrupt-initialization-for-OC.patch')
diff --git a/target/linux/octeon/patches-3.10/0011-MIPS-Octeon-Add-twsi-interrupt-initialization-for-OC.patch b/target/linux/octeon/patches-3.10/0011-MIPS-Octeon-Add-twsi-interrupt-initialization-for-OC.patch
new file mode 100644
index 0000000..382410f
--- /dev/null
+++ b/target/linux/octeon/patches-3.10/0011-MIPS-Octeon-Add-twsi-interrupt-initialization-for-OC.patch
@@ -0,0 +1,47 @@
+From a53825ef4e9b2f42a21ad2b903f4d0ce691a5d63 Mon Sep 17 00:00:00 2001
+From: Eunbong Song <eunb.song@samsung.com>
+Date: Tue, 22 Apr 2014 06:16:15 +0000
+Subject: [PATCH] MIPS: Octeon: Add twsi interrupt initialization for OCTEON
+ 3XXX, 5XXX, 63XX
+
+In octeon_3xxx.dts file, there is a definiton for twsi/twsi2 interrupts.
+But there is no code for initialization of this interrupts. This patch adds
+code for initialization of twsi interrupts.
+
+Signed-off-by: Eunbong Song <eunb.song@samsung.com>
+Cc: linux-kernel@vger.kernel.org
+Cc: linux-mips@linux-mips.org
+Patchwork: https://patchwork.linux-mips.org/patch/6816/
+Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
+---
+ arch/mips/cavium-octeon/octeon-irq.c | 2 ++
+ arch/mips/include/asm/mach-cavium-octeon/irq.h | 2 ++
+ 2 files changed, 4 insertions(+)
+
+--- a/arch/mips/cavium-octeon/octeon-irq.c
++++ b/arch/mips/cavium-octeon/octeon-irq.c
+@@ -1260,11 +1260,13 @@ static void __init octeon_irq_init_ciu(v
+ for (i = 0; i < 4; i++)
+ octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_PCI_MSI0, 0, i + 40);
+
++ octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_TWSI, 0, 45);
+ octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_RML, 0, 46);
+ for (i = 0; i < 4; i++)
+ octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_TIMER0, 0, i + 52);
+
+ octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_USB0, 0, 56);
++ octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_TWSI2, 0, 59);
+
+ /* CIU_1 */
+ for (i = 0; i < 16; i++)
+--- a/arch/mips/include/asm/mach-cavium-octeon/irq.h
++++ b/arch/mips/include/asm/mach-cavium-octeon/irq.h
+@@ -35,6 +35,8 @@ enum octeon_irq {
+ OCTEON_IRQ_PCI_MSI2,
+ OCTEON_IRQ_PCI_MSI3,
+
++ OCTEON_IRQ_TWSI,
++ OCTEON_IRQ_TWSI2,
+ OCTEON_IRQ_RML,
+ OCTEON_IRQ_TIMER0,
+ OCTEON_IRQ_TIMER1,
--
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