From c6fe325587b1955f84c339a2ae17da28dc4e6bec Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Fri, 21 Apr 2017 02:47:44 +0200 Subject: ramips: rename PSG1218 to match label Fix previous commit to be less ambigous: PSG1218 rev.A = 5 ports, external PA, heatsinks PSG1218 rev.B = 4 ports, internal PA, no heatsinks Signed-off-by: Daniel Golle --- target/linux/ramips/dts/PSG1218A.dts | 47 ++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 target/linux/ramips/dts/PSG1218A.dts (limited to 'target/linux/ramips/dts/PSG1218A.dts') diff --git a/target/linux/ramips/dts/PSG1218A.dts b/target/linux/ramips/dts/PSG1218A.dts new file mode 100644 index 0000000..e85ef70 --- /dev/null +++ b/target/linux/ramips/dts/PSG1218A.dts @@ -0,0 +1,47 @@ +/dts-v1/; + +#include "PSG1218.dtsi" + +/ { + compatible = "PSG1218A", "ralink,mt7620a-soc"; + model = "Phicomm PSG1218 rev.A"; + + gpio-leds { + compatible = "gpio-leds"; + blue { + label = "psg1218a:blue:status"; + gpios = <&gpio0 10 1>; + }; + + yellow { + label = "psg1218a:yellow:status"; + gpios = <&gpio0 11 1>; + }; + + red { + label = "psg1218a:red:status"; + gpios = <&gpio0 8 0>; + }; + }; +}; + +&pinctrl { + state_default: pinctrl0 { + gpio { + ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd"; + ralink,function = "gpio"; + }; + + pa { + ralink,group = "pa"; + ralink,function = "pa"; + }; + }; +}; + +ðernet { + pinctrl-names = "default"; + pinctrl-0 = <&ephy_pins>; + mtd-mac-address = <&factory 0x28>; + mediatek,portmap = "llllw"; +}; -- cgit v1.1