From f506e75eb0f13ffe757bd36580983648789710ff Mon Sep 17 00:00:00 2001 From: Gabor Juhos Date: Thu, 27 Nov 2008 22:40:34 +0000 Subject: ag71xx driver: add more register bit definitions SVN-Revision: 13387 --- target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) (limited to 'target/linux') diff --git a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h index d885116..cbc6f75 100644 --- a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h +++ b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h @@ -198,12 +198,14 @@ static inline int ag71xx_desc_pktlen(struct ag71xx_desc *desc) #define AG71XX_REG_INT_ENABLE 0x0198 #define AG71XX_REG_INT_STATUS 0x019c -#define MAC_CFG1_TXE BIT(0) -#define MAC_CFG1_STX BIT(1) -#define MAC_CFG1_RXE BIT(2) -#define MAC_CFG1_SRX BIT(3) -#define MAC_CFG1_LB BIT(8) -#define MAC_CFG1_SR BIT(31) +#define MAC_CFG1_TXE BIT(0) /* Tx Enable */ +#define MAC_CFG1_STX BIT(1) /* Synchronize Tx Enable */ +#define MAC_CFG1_RXE BIT(2) /* Rx Enable */ +#define MAC_CFG1_SRX BIT(3) /* Synchronize Rx Enable */ +#define MAC_CFG1_TFC BIT(4) /* Tx Flow Control Enable */ +#define MAC_CFG1_RFC BIT(5) /* Rx Flow Control Enable */ +#define MAC_CFG1_LB BIT(8) /* Loopback mode */ +#define MAC_CFG1_SR BIT(31) /* Soft Reset */ #define MAC_CFG2_FDX BIT(0) #define MAC_CFG2_CRC_EN BIT(1) -- cgit v1.1