From 54dea0c74f09b73d4143956bce1fbed54cc3ca4d Mon Sep 17 00:00:00 2001 From: Imre Kaloz Date: Thu, 4 Nov 2010 14:17:06 +0000 Subject: add avr32 support to gcc 4.3.5 SVN-Revision: 23865 --- .../gcc/patches/4.3.5/944-avr32_fix_f64_div.patch | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 toolchain/gcc/patches/4.3.5/944-avr32_fix_f64_div.patch (limited to 'toolchain/gcc/patches/4.3.5/944-avr32_fix_f64_div.patch') diff --git a/toolchain/gcc/patches/4.3.5/944-avr32_fix_f64_div.patch b/toolchain/gcc/patches/4.3.5/944-avr32_fix_f64_div.patch new file mode 100644 index 0000000..fda520b --- /dev/null +++ b/toolchain/gcc/patches/4.3.5/944-avr32_fix_f64_div.patch @@ -0,0 +1,20 @@ +--- a/gcc/config/avr32/lib1funcs.S ++++ b/gcc/config/avr32/lib1funcs.S +@@ -1733,7 +1733,7 @@ __avr32_f64_div_round_subnormal: + brne 16f /* Return NaN if op1 is NaN */ + /* Op1 is inf check op2 */ + lsr r6, r9, 20 /* Extract exponent */ +- cbr r6, 8 /* Clear sign bit */ ++ cbr r6, 11 /* Clear sign bit */ + cp r6, 0x7ff + brne 17f /* Inf/number gives inf, return inf */ + rjmp 16f /* The rest gives NaN*/ +@@ -1849,7 +1849,7 @@ __avr32_f64_div_res_subnormal:/* Divide + + 16: /* Return NaN. */ + mov r11, -1 +- mov r10, -1 ++ mov r10, 0 + ldm sp++, r0, r1, r2, r3, r4, r5, r6, r7,pc + + 17: /* Return INF. */ -- cgit v1.1