bcm53xx: initial support for the BCM5301/BCM470X SoC with ARM CPU This patch adds support for the BCM5301/BCM470X SoCs with an ARM CPU. Currently just booting to a shell is working and nothing else, no Ethernet, wifi, flash, ... Signed-off-by: Hauke Mehrtens --- arch/arm/Kconfig | 2 + arch/arm/Kconfig.debug | 5 ++ arch/arm/Makefile | 1 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/bcm5301-netgear-r6250.dts | 20 +++++++ arch/arm/boot/dts/bcm5301.dtsi | 83 +++++++++++++++++++++++++++ arch/arm/include/debug/bcm53xx.S | 19 ++++++ arch/arm/mach-bcm53xx/Kconfig | 15 +++++ arch/arm/mach-bcm53xx/Makefile | 1 + arch/arm/mach-bcm53xx/bcm53xx.c | 69 ++++++++++++++++++++++ 10 files changed, 216 insertions(+) create mode 100644 arch/arm/boot/dts/bcm5301-netgear-r6250.dts create mode 100644 arch/arm/boot/dts/bcm5301.dtsi create mode 100644 arch/arm/include/debug/bcm53xx.S create mode 100644 arch/arm/mach-bcm53xx/Kconfig create mode 100644 arch/arm/mach-bcm53xx/Makefile create mode 100644 arch/arm/mach-bcm53xx/bcm53xx.c --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -922,6 +922,8 @@ source "arch/arm/mach-bcm/Kconfig" source "arch/arm/mach-bcm2835/Kconfig" +source "arch/arm/mach-bcm53xx/Kconfig" + source "arch/arm/mach-clps711x/Kconfig" source "arch/arm/mach-cns3xxx/Kconfig" --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -93,6 +93,10 @@ choice bool "Kernel low-level debugging on BCM2835 PL011 UART" depends on ARCH_BCM2835 + config DEBUG_BCM_5301X + bool "Kernel low-level debugging on BCM53XX UART1" + depends on ARCH_BCM_5301X + config DEBUG_CLPS711X_UART1 bool "Kernel low-level debugging messages via UART1" depends on ARCH_CLPS711X @@ -620,6 +624,7 @@ endchoice config DEBUG_LL_INCLUDE string default "debug/bcm2835.S" if DEBUG_BCM2835 + default "debug/bcm53xx.S" if DEBUG_BCM_5301X default "debug/cns3xxx.S" if DEBUG_CNS3XXX default "debug/exynos.S" if DEBUG_EXYNOS_UART default "debug/highbank.S" if DEBUG_HIGHBANK_UART --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -145,6 +145,7 @@ textofs-$(CONFIG_ARCH_MSM8960) := 0x0020 machine-$(CONFIG_ARCH_AT91) += at91 machine-$(CONFIG_ARCH_BCM) += bcm machine-$(CONFIG_ARCH_BCM2835) += bcm2835 +machine-$(CONFIG_ARCH_BCM_5301X) += bcm53xx machine-$(CONFIG_ARCH_CLPS711X) += clps711x machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx machine-$(CONFIG_ARCH_DAVINCI) += davinci --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -209,6 +209,7 @@ dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07 wm8650-mid.dtb \ wm8850-w70v2.dtb dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb +dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb targets += dtbs targets += $(dtb-y) --- /dev/null +++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts @@ -0,0 +1,35 @@ +/* + * Broadcom BCM470X / BCM5301X arm platform code. + * DTS for Netgear R6250 V1 + * + * Copyright 2013 Hauke Mehrtens + * + * Licensed under the GNU/GPL. See COPYING for details. + */ + +/dts-v1/; + +#include "bcm4708.dtsi" + +/ { + compatible = "netgear,r6250v1", "brcm,bcm4708"; + model = "Netgear R6250 V1 (BCM4708)"; + + chosen { + bootargs = "console=ttyS0,115200"; + }; + + memory { + reg = <0x00000000 0x08000000>; + }; + + chipcommonA { + uart0: serial@0300 { + status = "okay"; + }; + + uart1: serial@0400 { + status = "okay"; + }; + }; +}; --- /dev/null +++ b/arch/arm/boot/dts/bcm4708.dtsi @@ -0,0 +1,34 @@ +/* + * Broadcom BCM470X / BCM5301X ARM platform code. + * DTS for BCM4708 SoC. + * + * Copyright 2013-2014 Hauke Mehrtens + * + * Licensed under the GNU/GPL. See COPYING for details. + */ + +#include "bcm5301x.dtsi" + +/ { + compatible = "brcm,bcm4708"; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + next-level-cache = <&L2>; + reg = <0x0>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + next-level-cache = <&L2>; + reg = <0x1>; + }; + }; + +}; --- /dev/null +++ b/arch/arm/boot/dts/bcm5301x.dtsi @@ -0,0 +1,95 @@ +/* + * Broadcom BCM470X / BCM5301X ARM platform code. + * Generic DTS part for all BCM53010, BCM53011, BCM53012, BCM53014, BCM53015, + * BCM53016, BCM53017, BCM53018, BCM4707, BCM4708 and BCM4709 SoCs + * + * Copyright 2013-2014 Hauke Mehrtens + * + * Licensed under the GNU/GPL. See COPYING for details. + */ + +#include +#include +#include "skeleton.dtsi" + +/ { + interrupt-parent = <&gic>; + + chipcommonA { + compatible = "simple-bus"; + ranges = <0x00000000 0x18000000 0x00001000>; + #address-cells = <1>; + #size-cells = <1>; + + uart0: serial@0300 { + compatible = "ns16550"; + reg = <0x0300 0x100>; + interrupts = ; + clock-frequency = <100000000>; + status = "disabled"; + }; + + uart1: serial@0400 { + compatible = "ns16550"; + reg = <0x0400 0x100>; + interrupts = ; + clock-frequency = <100000000>; + status = "disabled"; + }; + }; + + mpcore { + compatible = "simple-bus"; + ranges = <0x00000000 0x19020000 0x00003000>; + #address-cells = <1>; + #size-cells = <1>; + + scu@0000 { + compatible = "arm,cortex-a9-scu"; + reg = <0x0000 0x100>; + }; + + timer@0200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0x0200 0x100>; + interrupts = ; + clocks = <&clk_periph>; + }; + + local-timer@0600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0x0600 0x100>; + interrupts = ; + clocks = <&clk_periph>; + }; + + gic: interrupt-controller@1000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x1000 0x1000>, + <0x0100 0x100>; + }; + + L2: cache-controller@2000 { + compatible = "arm,pl310-cache"; + reg = <0x2000 0x1000>; + cache-unified; + cache-level = <2>; + }; + }; + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + /* As long as we do not have a real clock driver us this + * fixed clock */ + clk_periph: periph { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <400000000>; + }; + }; +}; --- /dev/null +++ b/arch/arm/include/debug/bcm53xx.S @@ -0,0 +1,19 @@ +/* + * Macros used for EARLY_PRINTK, in low-level UART debug console + * + * Copyright 2013 Hauke Mehrtens + * + * Licensed under the GNU/GPL. See COPYING for details. + */ + +#define BCM53XX_UART1_PHYS 0x18000300 +#define BCM53XX_UART1_VIRT 0xf1000300 +#define BCM53XX_UART1_SH 0 + + .macro addruart, rp, rv, tmp + ldr \rp, =BCM53XX_UART1_PHYS @ MMU off, Physical + ldr \rv, =BCM53XX_UART1_VIRT @ MMU on, Virtual + .endm + +#define UART_SHIFT BCM53XX_UART1_SH +#include --- /dev/null +++ b/arch/arm/mach-bcm53xx/Kconfig @@ -0,0 +1,25 @@ +config ARCH_BCM_5301X + bool "Broadcom BCM470X / BCM5301X ARM SoC" if ARCH_MULTI_V7 + depends on MMU + select ARM_GIC + select CACHE_L2X0 + select HAVE_ARM_SCU if SMP + select HAVE_ARM_TWD if SMP + select HAVE_SMP + select COMMON_CLK + select GENERIC_CLOCKEVENTS + select ARM_GLOBAL_TIMER + select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK + select MIGHT_HAVE_PCI + help + Support for Broadcom BCM470X and BCM5301X SoCs with ARM CPU cores. + + This is a network SoC line mostly used in home routers and + wifi access points. + This inclused the following SoC: BCM53010, BCM53011, BCM53012, + BCM53014, BCM53015, BCM53016, BCM53017, BCM53018, BCM4707, + BCM4708 and BCM4709. + + Do not confuse this with the BCM4760 which is a totally + different SoC or with the older BCM47XX and BCM53XX based + network SoC using a MIPS CPU, they are supported by arch/mips/bcm47xx --- /dev/null +++ b/arch/arm/mach-bcm53xx/Makefile @@ -0,0 +1 @@ +obj-y += bcm53xx.o --- /dev/null +++ b/arch/arm/mach-bcm53xx/bcm53xx.c @@ -0,0 +1,70 @@ +/* + * Broadcom BCM470X / BCM5301X ARM platform code. + * + * Copyright 2013 Hauke Mehrtens + * + * Licensed under the GNU/GPL. See COPYING for details. + */ +#include +#include +#include +#include + +#include +#include +#include + + +static bool first_fault = true; + +static int bcm5301x_abort_handler(unsigned long addr, unsigned int fsr, + struct pt_regs *regs) +{ + if (fsr == 0x1c06 && first_fault) { + first_fault = false; + + /* + * These faults with code 0x1c06 happens for no good reason, + * possibly left over from the CFE boot loader. + */ + pr_warn("External imprecise Data abort at addr=%#lx, fsr=%#x ignored.\n", + addr, fsr); + + /* Returning non-zero causes fault display and panic */ + return 0; + } + + /* Others should cause a fault */ + return 1; +} + +static void __init bcm5301x_init_early(void) +{ + /* Install our hook */ + hook_fault_code(16 + 6, bcm5301x_abort_handler, SIGBUS, BUS_OBJERR, + "imprecise external abort"); +} + +static void __init bcm5301x_timer_init(void) +{ + of_clk_init(NULL); + clocksource_of_init(); +} + +static void __init bcm5301x_dt_init(void) +{ + l2x0_of_init(0, ~0UL); + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); +} + +static const char __initconst *bcm5301x_dt_compat[] = { + "brcm,bcm4708", + NULL, +}; + +DT_MACHINE_START(BCM5301X, "BCM5301X") + .init_early = bcm5301x_init_early, + .init_time = bcm5301x_timer_init, + .init_machine = bcm5301x_dt_init, + .dt_compat = bcm5301x_dt_compat, +MACHINE_END