/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "brcm,bcm6318";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "brcm,bmips3300", "mips,mips4Kc";
			device_type = "cpu";
			reg = <0>;
		};
	};

	cpu_intc: interrupt-controller {
		#address-cells = <0>;
		compatible = "mti,cpu-interrupt-controller";

		interrupt-controller;
		#interrupt-cells = <1>;
	};

	memory { device_type = "memory"; reg = <0 0>; };

	ubus@10000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		compatible = "simple-bus";

		ext_intc: interrupt-controller@10000018 {
			compatible = "brcm,bcm6345-ext-intc";
			reg = <0x10000018 0x4>;

			interrupt-controller;
			#interrupt-cells = <2>;

			interrupt-parent = <&periph_intc>;
			interrupts = <24>, <25>, <26>, <27>;
		};

		periph_intc: interrupt-controller@10000020 {
			compatible = "brcm,bcm6345-l2-intc";
			reg = <0x10000020 0x20>;

			interrupt-controller;
			#interrupt-cells = <1>;

			interrupt-parent = <&cpu_intc>;
			interrupts = <2>;
		};
	};
};