blob: f1d432cc4c8352c6b70f6c15747099b49f74d196 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
|
--- a/drivers/net/ethernet/ti/cpmac.c
+++ b/drivers/net/ethernet/ti/cpmac.c
@@ -1146,6 +1146,8 @@ static int cpmac_probe(struct platform_d
goto out;
}
+ ar7_device_reset(pdata->reset_bit);
+
dev->irq = platform_get_irq_byname(pdev, "irq");
dev->netdev_ops = &cpmac_netdev_ops;
@@ -1227,7 +1229,7 @@ int cpmac_init(void)
cpmac_mii->reset = cpmac_mdio_reset;
cpmac_mii->irq = mii_irqs;
- cpmac_mii->priv = ioremap(AR7_REGS_MDIO, 256);
+ cpmac_mii->priv = ioremap(ar7_is_titan() ? TITAN_REGS_MDIO : AR7_REGS_MDIO, 256);
if (!cpmac_mii->priv) {
pr_err("Can't ioremap mdio registers\n");
@@ -1238,10 +1240,16 @@ int cpmac_init(void)
#warning FIXME: unhardcode gpio&reset bits
ar7_gpio_disable(26);
ar7_gpio_disable(27);
- ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
- ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
+
+ if (!ar7_is_titan()) {
+ ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
+ ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
+ }
ar7_device_reset(AR7_RESET_BIT_EPHY);
+ if (ar7_is_titan())
+ ar7_device_reset(TITAN_RESET_BIT_EPHY1);
+
cpmac_mii->reset(cpmac_mii);
for (i = 0; i < 300; i++) {
@@ -1258,7 +1266,11 @@ int cpmac_init(void)
mask = 0;
}
- cpmac_mii->phy_mask = ~(mask | 0x80000000);
+ if (ar7_is_titan())
+ cpmac_mii->phy_mask = ~(mask | 0x80000000 | 0x40000000);
+ else
+ cpmac_mii->phy_mask = ~(mask | 0x80000000);
+
snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "cpmac-1");
res = mdiobus_register(cpmac_mii);
|