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|
/include/ "vr9.dtsi"
/ {
chosen {
bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
};
memory@0 {
reg = <0x0 0x4000000>;
};
fpi@10000000 {
spi@E100800 {
compatible = "lantiq,spi-xway";
reg = <0xE100800 0x100>;
interrupt-parent = <&icu0>;
interrupts = <22 23 24>;
#address-cells = <1>;
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <3>;
spi-max-frequency = <20000000>;
partition@0 {
reg = <0x0 0x20000>;
label = "u-boot";
read-only;
};
partition@20000 {
reg = <0x20000 0x7a0000>;
label = "firmware";
};
partition@7c0000 {
reg = <0x7c0000 0x10000>;
label = "config";
read-only;
};
ath9k_cal: partition@7d0000 {
reg = <0x7d0000 0x30000>;
label = "boardconfig";
read-only;
};
};
};
gpio: pinmux@E100B10 {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
state_default: pinmux {
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
gphy-leds {
lantiq,groups = "gphy0 led1", "gphy1 led1";
lantiq,function = "gphy";
lantiq,pull = <2>;
lantiq,open-drain = <0>;
lantiq,output = <1>;
};
phy-rst {
lantiq,pins = "io42";
lantiq,pull = <0>;
lantiq,open-drain = <0>;
lantiq,output = <1>;
};
spi {
lantiq,groups = "spi", "spi_cs4";
lantiq,function = "spi";
};
pcie-rst {
lantiq,pins = "io38";
lantiq,pull = <0>;
lantiq,output = <1>;
};
};
};
eth@E108000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "lantiq,xrx200-net";
reg = < 0xE108000 0x3000 /* switch */
0xE10B100 0x70 /* mdio */
0xE10B1D8 0x30 /* mii */
0xE10B308 0x30 /* pmac */
>;
interrupt-parent = <&icu0>;
interrupts = <73 72>;
lan: interface@0 {
compatible = "lantiq,xrx200-pdi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
mtd-mac-address = <&ath9k_cal 0xf100>;
lantiq,switch;
ethernet@0 {
compatible = "lantiq,xrx200-pdi-port";
reg = <0>;
phy-mode = "rgmii";
phy-handle = <&phy0>;
// gpios = <&gpio 42 1>;
};
ethernet@5 {
compatible = "lantiq,xrx200-pdi-port";
reg = <5>;
phy-mode = "rgmii";
phy-handle = <&phy5>;
};
ethernet@2 {
compatible = "lantiq,xrx200-pdi-port";
reg = <2>;
phy-mode = "gmii";
phy-handle = <&phy11>;
};
ethernet@3 {
compatible = "lantiq,xrx200-pdi-port";
reg = <4>;
phy-mode = "gmii";
phy-handle = <&phy13>;
};
};
mdio@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "lantiq,xrx200-mdio";
phy0: ethernet-phy@0 {
reg = <0x0>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
};
phy5: ethernet-phy@5 {
reg = <0x5>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
};
phy11: ethernet-phy@11 {
reg = <0x11>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
};
phy13: ethernet-phy@13 {
reg = <0x13>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
};
};
};
ifxhcd@E101000 {
status = "okay";
gpios = <&gpio 33 0>;
lantiq,portmask = <0x3>;
};
ifxhcd@E106000 {
status = "okay";
gpios = <&gpio 33 0>;
};
};
gphy-xrx200 {
compatible = "lantiq,phy-xrx200";
firmware = "lantiq/vr9_phy11g_a2x.bin";
phys = [ 00 01 ];
};
pcie {
compatible = "lantiq,pcie-xway";
};
ath9k_eep {
compatible = "ath9k,eeprom";
ath,eep-flash = <&ath9k_cal 0x21000>;
ath,mac-offset = <0xf100>;
ath,mac-increment;
ath,led-pin = <0>;
ath,disable-5ghz;
ath,led-active-high;
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <100>;
reset {
label = "reset";
gpios = <&gpio 0 1>;
linux,code = <0x198>;
};
wifi {
label = "wifi";
gpios = <&gpio 9 0>;
linux,code = <0xf7>;
linux,input-type = <5>; /* EV_SW */
};
wps {
label = "wps";
gpios = <&gpio 39 1>;
linux,code = <0x211>;
};
};
gpio-leds {
compatible = "gpio-leds";
dsl {
label = "dsl";
gpios = <&gpio 4 0>;
};
internet {
label = "internet";
gpios = <&gpio 5 0>;
};
usb0 {
label = "usb";
gpios = <&gpio 19 0>;
};
usb2 {
label = "usb2";
gpios = <&gpio 20 0>;
};
wps {
label = "wps";
gpios = <&gpio 37 0>;
};
};
};
|
