summaryrefslogtreecommitdiff
path: root/target/linux/lantiq/patches-3.10/0202-lantiq_ath5k.patch
blob: 8ec9ff45cf0d7c0e155cb9544a87c9b26390c71e (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
--- a/arch/mips/lantiq/xway/ath_eep.c
+++ b/arch/mips/lantiq/xway/ath_eep.c
@@ -36,10 +36,11 @@ static int ath9k_pci_plat_dev_init(struc
 	return 0;
 }
 
+static int ath9k_eep_load;
 int __init of_ath9k_eeprom_probe(struct platform_device *pdev)
 {
 	struct device_node *np = pdev->dev.of_node, *mtd_np;
-	int mac_offset;
+	int mac_offset, led_pin;
 	u32 mac_inc = 0, pci_slot = 0;
 	int i;
 	struct mtd_info *the_mtd;
@@ -112,6 +113,18 @@ int __init of_ath9k_eeprom_probe(struct
 	if (!of_property_read_u32(np, "ath,pci-slot", &pci_slot)) {
 		ltq_pci_ath_fixup(pci_slot, ath9k_pdata.eeprom_data);
 		dev_info(&pdev->dev, "pci slot: %u\n", pci_slot);
+		if (ath9k_eep_load) {
+			struct pci_dev *d = NULL;
+			while ((d = pci_get_device(PCI_VENDOR_ID_ATHEROS,
+					PCI_ANY_ID, d)) != NULL)
+				pci_fixup_device(pci_fixup_early, d);
+		}
+	}
+
+	if (!of_property_read_u32(np, "ath,led-pin", &led_pin)) {
+		ath9k_pdata.led_pin = led_pin;
+
+		dev_info(&pdev->dev, "using led pin %d.\n", led_pin);
 	}
 
 	dev_info(&pdev->dev, "loaded ath9k eeprom\n");
@@ -132,20 +145,19 @@ static struct platform_driver ath9k_eepr
 	},
 };
 
-static int ath9k_eep_loaded;
 static int __init of_ath9k_eeprom_init(void)
 {
 	int ret = platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
 
-	if (!ret)
-		ath9k_eep_loaded = 1;
+	if (ret)
+		ath9k_eep_load = 1;
 
 	return ret;
 }
 
 static int __init of_ath9k_eeprom_init_late(void)
 {
-	if (ath9k_eep_loaded)
+	if (!ath9k_eep_load)
 		return 0;
 	return platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
 }
@@ -247,4 +259,4 @@ static int __init of_ath5k_eeprom_init(v
 {
 	return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
 }
-device_initcall(of_ath5k_eeprom_init);
+subsys_initcall(of_ath5k_eeprom_init);