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From 3a06c61b48fbc23046928275e37a693e1055ae74 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ezequiel=20Garc=C3=ADa?= <ezequiel@vanguardiasur.com.ar>
Date: Mon, 28 Dec 2015 17:54:51 -0300
Subject: [PATCH 086/113] mtd: spi-nor: wait until lock/unlock operations are
ready
On Micron and Numonyx devices, the status register write command
(WRSR), raises a work-in-progress bit (WIP) on the status register.
The datasheets for these devices specify that while the status
register write is in progress, the status register WIP bit can still
be read to check the end of the operation.
This commit adds a wait_till_ready call on lock/unlock operations,
which is required for Micron and Numonyx but should be harmless for
others. This is needed to prevent applications from issuing erase or
program operations before the unlock operation is completed.
Reported-by: Stas Sergeev <stsp@list.ru>
Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
---
drivers/mtd/spi-nor/spi-nor.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -481,6 +481,7 @@ static int stm_lock(struct spi_nor *nor,
int status_old, status_new;
u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
u8 shift = ffs(mask) - 1, pow, val;
+ int ret;
status_old = read_sr(nor);
if (status_old < 0)
@@ -519,7 +520,10 @@ static int stm_lock(struct spi_nor *nor,
return -EINVAL;
write_enable(nor);
- return write_sr(nor, status_new);
+ ret = write_sr(nor, status_new);
+ if (ret)
+ return ret;
+ return spi_nor_wait_till_ready(nor);
}
/*
@@ -533,6 +537,7 @@ static int stm_unlock(struct spi_nor *no
int status_old, status_new;
u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
u8 shift = ffs(mask) - 1, pow, val;
+ int ret;
status_old = read_sr(nor);
if (status_old < 0)
@@ -569,7 +574,10 @@ static int stm_unlock(struct spi_nor *no
return -EINVAL;
write_enable(nor);
- return write_sr(nor, status_new);
+ ret = write_sr(nor, status_new);
+ if (ret)
+ return ret;
+ return spi_nor_wait_till_ready(nor);
}
/*
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