blob: 0c4b3fdd773681c7229f1693c8c31c3f33fb4ed7 (
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--- a/drivers/net/ethernet/freescale/gianfar.c
+++ b/drivers/net/ethernet/freescale/gianfar.c
@@ -1050,10 +1050,16 @@ static int gfar_probe(struct platform_de
udelay(2);
tempval = 0;
- if (!priv->pause_aneg_en && priv->tx_pause_en)
- tempval |= MACCFG1_TX_FLOW;
- if (!priv->pause_aneg_en && priv->rx_pause_en)
- tempval |= MACCFG1_RX_FLOW;
+ /*
+ * Do not enable flow control on chips earlier than rev 1.1,
+ * because of the eTSEC27 erratum
+ */
+ if ((mfspr(SPRN_SVR) & 0xffff) >= 0x0011) {
+ if (!priv->pause_aneg_en && priv->tx_pause_en)
+ tempval |= MACCFG1_TX_FLOW;
+ if (!priv->pause_aneg_en && priv->rx_pause_en)
+ tempval |= MACCFG1_RX_FLOW;
+ }
/* the soft reset bit is not self-resetting, so we need to
* clear it before resuming normal operation
*/
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