target/linux/ramips/dts/XDXRN502J.dts


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92

/dts-v1/;

#include "rt3050.dtsi"

/ {
	compatible = "XDXRN502J", "ralink,rt3052-soc";
	model = "XDX RN502J";

	cfi@1f000000 {
		compatible = "cfi-flash";
		reg = <0x1f000000 0x800000>;
		bank-width = <2>;
		device-width = <2>;
		#address-cells = <1>;
		#size-cells = <1>;

		partition@0 {
			label = "u-boot";
			reg = <0x0 0x30000>;
			read-only;
		};

		partition@30000 {
			label = "u-boot-env";
			reg = <0x30000 0x10000>;
			read-only;
		};

		factory: partition@40000 {
			label = "factory";
			reg = <0x40000 0x10000>;
			read-only;
		};

		partition@50000 {
			label = "firmware";
			reg = <0x50000 0x3b0000>;
		};
	};

	gpio-leds {
		compatible = "gpio-leds";

		wifi {
			label = "xdxrn502j:green:wifi";
			gpios = <&gpio0 7 1>;
		};

		power {
			label = "xdxrn502j:green:power";
			gpios = <&gpio0 9 1>;
		};
	};

	gpio-keys-polled {
		compatible = "gpio-keys-polled";
		#address-cells = <1>;
		#size-cells = <0>;
		poll-interval = <20>;

		reset {
			label = "reset";
			gpios = <&gpio0 10 1>;
			linux,code = <0x198>;
		};
	};
};

&pinctrl {
	state_default: pinctrl0 {
		gpio {
			ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
			ralink,function = "gpio";
		};
	};
};

&ethernet {
	mtd-mac-address = <&factory 0x28>;
};

&esw {
	mediatek,portmap = <0x3e>;
};

&wmac {
	ralink,mtd-eeprom = <&factory 0>;
};

&otg {
	status = "okay";
};