1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
|
/dts-v1/;
#include "mt7620n.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "zbtlink,zbt-wr8305rt", "ralink,mt7620n-soc";
model = "Zbtlink ZBT-WR8305RT";
gpio-leds {
compatible = "gpio-leds";
sys {
label = "zbt-wr8305rt:green:sys";
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
};
lan {
label = "zbt-wr8305rt:green:usb";
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
};
wifi {
label = "zbt-wr8305rt:green:wifi";
gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
};
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <20>;
reset {
label = "reset";
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
};
&gpio1 {
status = "okay";
};
&gpio3 {
status = "okay";
};
&spi0 {
status = "okay";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
label = "firmware";
reg = <0x50000 0x7b0000>;
};
};
};
&ehci {
status = "okay";
};
&ohci {
status = "okay";
};
ðernet {
pinctrl-names = "default";
pinctrl-0 = <&ephy_pins>;
mtd-mac-address = <&factory 0x4>;
mediatek,portmap = "llllw";
};
&wmac {
ralink,mtd-eeprom = <&factory 0>;
};
&pinctrl {
state_default: pinctrl0 {
default {
ralink,group = "i2c", "uartf", "spi refclk", "wled";
ralink,function = "gpio";
};
};
};
|
