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From 90bc2022b61dcfd4d785416ee3aabc2157bfd57a Mon Sep 17 00:00:00 2001
From: arokux <arokux@gmail.com>
Date: Wed, 18 Sep 2013 00:30:04 +0200
Subject: [PATCH] ARM: sun4i: dt: Add USB EHCI bindings
---
arch/arm/boot/dts/sun4i-a10.dtsi | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 3033684..6c05264 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -15,6 +15,11 @@
/ {
interrupt-parent = <&intc>;
+ aliases {
+ ehci1 = &ehci0;
+ ehci2 = &ehci1;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -407,5 +412,33 @@
clock-frequency = <100000>;
status = "disabled";
};
+
+ usb_rst: reset@0x01c200cc {
+ #reset-cells = <1>;
+ compatible = "allwinner,sun4i-clock-reset";
+ reg = <0x01c200cc 0x4>;
+ };
+
+ ehci0: ehci0@0x01c14000 {
+ compatible = "allwinner,sunxi-ehci";
+ reg = <0x01c14000 0x400 0x01c14800 0x4 0x01c13404 0x4>;
+ interrupts = <39>;
+ resets = <&usb_rst 1>;
+ reset-names = "ehci_reset";
+ clocks = <&usb 8>, <&ahb_gates 1>;
+ clock-names = "usb_phy", "ahb_ehci";
+ status = "disabled";
+ };
+
+ ehci1: ehci1@0x01c1c000 {
+ compatible = "allwinner,sunxi-ehci";
+ reg = <0x01c1c000 0x400 0x01c1c800 0x4 0x01c13404 0x4>;
+ interrupts = <40>;
+ resets = <&usb_rst 2>;
+ reset-names = "ehci_reset";
+ clocks = <&usb 8>, <&ahb_gates 3>;
+ clock-names = "usb_phy", "ahb_ehci";
+ status = "disabled";
+ };
};
};
--
1.8.4
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