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authorGabor Juhos <juhosg@openwrt.org>2009-05-21 18:22:01 +0000
committerGabor Juhos <juhosg@openwrt.org>2009-05-21 18:22:01 +0000
commit220751e8ab5e4a805d0b7acebe1164d0c32e621b (patch)
treee7c6f9d295ea91d9b83712724502d2577cc27085
parent1165dfed6a757e9b5de34434621ee7d40d1501d0 (diff)
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fix typos in the PB42 support code
SVN-Revision: 15963
-rw-r--r--target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb44.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb44.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb44.c
index f6d7a2e..5d98ea5 100644
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb44.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb44.c
@@ -46,7 +46,7 @@ static struct ar71xx_pci_irq pb44_pci_irqs[] __initdata = {
}
};
-#define PB44_WAN_PHYMASK BIT(1)
+#define PB44_WAN_PHYMASK BIT(0)
#define PB44_LAN_PHYMASK 0
#define PB44_MDIO_PHYMASK (PB44_LAN_PHYMASK | PB44_WAN_PHYMASK)
@@ -63,7 +63,7 @@ static void __init pb44_init(void)
ar71xx_add_device_eth(0);
ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
- ar71xx_eth1_data.phy_mask = PB44_WAN_PHYMASK;
+ ar71xx_eth1_data.phy_mask = PB44_LAN_PHYMASK;
ar71xx_eth1_data.speed = SPEED_1000;
ar71xx_eth1_data.duplex = DUPLEX_FULL;