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authorGabor Juhos <juhosg@openwrt.org>2012-03-12 20:38:58 +0000
committerGabor Juhos <juhosg@openwrt.org>2012-03-12 20:38:58 +0000
commit66df117d1b16bebc15854639ac9710900ee0892c (patch)
tree165f8efcf5febb1ddfb505c10b0273bffdfa90de
parent8b2b37ae584238085d23c30163b96abf447846e4 (diff)
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ar71xx: use a dummy callback for interfaces with fixed speed
SVN-Revision: 30913
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c35
1 files changed, 7 insertions, 28 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
index 557457f..cae5af1 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
@@ -273,16 +273,6 @@ static void ath79_set_speed_ge1(int speed)
ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII1_CTRL, speed);
}
-static void ar724x_set_speed_ge0(int speed)
-{
- /* TODO */
-}
-
-static void ar724x_set_speed_ge1(int speed)
-{
- /* TODO */
-}
-
static void ar7242_set_speed_ge0(int speed)
{
u32 val = ath79_get_eth_pll(0, speed);
@@ -311,24 +301,13 @@ static void ar91xx_set_speed_ge1(int speed)
ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII1_CTRL, speed);
}
-static void ar933x_set_speed_ge0(int speed)
-{
- /* TODO */
-}
-
-static void ar933x_set_speed_ge1(int speed)
-{
- /* TODO */
-}
-
static void ar934x_set_speed_ge0(int speed)
{
/* TODO */
}
-static void ar934x_set_speed_ge1(int speed)
+static void ath79_set_speed_dummy(int speed)
{
- /* TODO */
}
static void ath79_ddr_no_flush(void)
@@ -703,7 +682,7 @@ void __init ath79_register_eth(unsigned int id)
pdata->reset_bit |= AR724X_RESET_GE1_MDIO |
AR71XX_RESET_GE1_PHY;
pdata->ddr_flush = ar724x_ddr_flush_ge1;
- pdata->set_speed = ar724x_set_speed_ge1;
+ pdata->set_speed = ath79_set_speed_dummy;
}
pdata->has_gbit = 1;
pdata->is_ar724x = 1;
@@ -726,13 +705,13 @@ void __init ath79_register_eth(unsigned int id)
if (id == 0) {
pdata->reset_bit |= AR71XX_RESET_GE0_PHY;
pdata->ddr_flush = ar724x_ddr_flush_ge0;
- pdata->set_speed = ar724x_set_speed_ge0;
+ pdata->set_speed = ath79_set_speed_dummy;
pdata->phy_mask = BIT(4);
} else {
pdata->reset_bit |= AR71XX_RESET_GE1_PHY;
pdata->ddr_flush = ar724x_ddr_flush_ge1;
- pdata->set_speed = ar724x_set_speed_ge1;
+ pdata->set_speed = ath79_set_speed_dummy;
pdata->speed = SPEED_1000;
pdata->duplex = DUPLEX_FULL;
@@ -780,14 +759,14 @@ void __init ath79_register_eth(unsigned int id)
pdata->reset_bit = AR933X_RESET_GE0_MAC |
AR933X_RESET_GE0_MDIO;
pdata->ddr_flush = ar933x_ddr_flush_ge0;
- pdata->set_speed = ar933x_set_speed_ge0;
+ pdata->set_speed = ath79_set_speed_dummy;
pdata->phy_mask = BIT(4);
} else {
pdata->reset_bit = AR933X_RESET_GE1_MAC |
AR933X_RESET_GE1_MDIO;
pdata->ddr_flush = ar933x_ddr_flush_ge1;
- pdata->set_speed = ar933x_set_speed_ge1;
+ pdata->set_speed = ath79_set_speed_dummy;
pdata->speed = SPEED_1000;
pdata->duplex = DUPLEX_FULL;
@@ -815,7 +794,7 @@ void __init ath79_register_eth(unsigned int id)
} else {
pdata->reset_bit = AR934X_RESET_GE1_MAC |
AR934X_RESET_GE1_MDIO;
- pdata->set_speed = ar934x_set_speed_ge1;
+ pdata->set_speed = ath79_set_speed_dummy;
pdata->switch_data = &ath79_switch_data;
}