diff options
| author | John Crispin <john@openwrt.org> | 2013-07-29 13:10:37 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2013-07-29 13:10:37 +0000 |
| commit | c3b5ee96b95bd261ff789625f324b1b7dec6a570 (patch) | |
| tree | 37d1fae61a683b6f970d8b26942c585bdde01b81 | |
| parent | 61e6be686fa986256b11625aad473cf46d3ffb9e (diff) | |
| download | mtk-20170518-c3b5ee96b95bd261ff789625f324b1b7dec6a570.zip mtk-20170518-c3b5ee96b95bd261ff789625f324b1b7dec6a570.tar.gz mtk-20170518-c3b5ee96b95bd261ff789625f324b1b7dec6a570.tar.bz2 | |
lantiq: add gphy pinmux definitions
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 37611
| -rw-r--r-- | target/linux/lantiq/patches-3.8/0043-PINCTRL-lantiq-add_gphy_led.patch | 88 |
1 files changed, 88 insertions, 0 deletions
diff --git a/target/linux/lantiq/patches-3.8/0043-PINCTRL-lantiq-add_gphy_led.patch b/target/linux/lantiq/patches-3.8/0043-PINCTRL-lantiq-add_gphy_led.patch new file mode 100644 index 0000000..1af3d47 --- /dev/null +++ b/target/linux/lantiq/patches-3.8/0043-PINCTRL-lantiq-add_gphy_led.patch @@ -0,0 +1,88 @@ +Index: linux-3.8.13/drivers/pinctrl/pinctrl-xway.c +=================================================================== +--- linux-3.8.13.orig/drivers/pinctrl/pinctrl-xway.c 2013-07-27 15:05:47.693196681 +0200 ++++ linux-3.8.13/drivers/pinctrl/pinctrl-xway.c 2013-07-29 14:43:05.237674357 +0200 +@@ -101,6 +101,7 @@ + XWAY_MUX_EPHY, + XWAY_MUX_DFE, + XWAY_MUX_SDIO, ++ XWAY_MUX_GPHY, + XWAY_MUX_NONE = 0xffff, + }; + +@@ -108,12 +109,12 @@ + /* pin f0 f1 f2 f3 */ + MFP_XWAY(GPIO0, GPIO, EXIN, NONE, TDM), + MFP_XWAY(GPIO1, GPIO, EXIN, NONE, NONE), +- MFP_XWAY(GPIO2, GPIO, CGU, EXIN, NONE), ++ MFP_XWAY(GPIO2, GPIO, CGU, EXIN, GPHY), + MFP_XWAY(GPIO3, GPIO, CGU, NONE, PCI), + MFP_XWAY(GPIO4, GPIO, STP, NONE, ASC), +- MFP_XWAY(GPIO5, GPIO, STP, NONE, NONE), ++ MFP_XWAY(GPIO5, GPIO, STP, NONE, GPHY), + MFP_XWAY(GPIO6, GPIO, STP, GPT, ASC), +- MFP_XWAY(GPIO7, GPIO, CGU, PCI, NONE), ++ MFP_XWAY(GPIO7, GPIO, CGU, PCI, GPHY), + MFP_XWAY(GPIO8, GPIO, CGU, NMI, NONE), + MFP_XWAY(GPIO9, GPIO, ASC, SPI, EXIN), + MFP_XWAY(GPIO10, GPIO, ASC, SPI, NONE), +@@ -150,10 +151,10 @@ + MFP_XWAY(GPIO41, GPIO, NONE, NONE, NONE), + MFP_XWAY(GPIO42, GPIO, MDIO, NONE, NONE), + MFP_XWAY(GPIO43, GPIO, MDIO, NONE, NONE), +- MFP_XWAY(GPIO44, GPIO, NONE, NONE, SIN), +- MFP_XWAY(GPIO45, GPIO, NONE, NONE, SIN), ++ MFP_XWAY(GPIO44, GPIO, NONE, GPHY, SIN), ++ MFP_XWAY(GPIO45, GPIO, NONE, GPHY, SIN), + MFP_XWAY(GPIO46, GPIO, NONE, NONE, EXIN), +- MFP_XWAY(GPIO47, GPIO, NONE, NONE, SIN), ++ MFP_XWAY(GPIO47, GPIO, NONE, GPHY, SIN), + MFP_XWAY(GPIO48, GPIO, EBU, NONE, NONE), + MFP_XWAY(GPIO49, GPIO, EBU, NONE, NONE), + MFP_XWAY(GPIO50, GPIO, NONE, NONE, NONE), +@@ -207,6 +208,13 @@ + static const unsigned pins_nmi[] = {GPIO8}; + static const unsigned pins_mdio[] = {GPIO42, GPIO43}; + ++static const unsigned pins_gphy0_led0[] = {GPIO5}; ++static const unsigned pins_gphy0_led1[] = {GPIO7}; ++static const unsigned pins_gphy0_led2[] = {GPIO2}; ++static const unsigned pins_gphy1_led0[] = {GPIO44}; ++static const unsigned pins_gphy1_led1[] = {GPIO45}; ++static const unsigned pins_gphy1_led2[] = {GPIO47}; ++ + static const unsigned pins_ebu_a24[] = {GPIO13}; + static const unsigned pins_ebu_clk[] = {GPIO21}; + static const unsigned pins_ebu_cs1[] = {GPIO23}; +@@ -321,6 +329,12 @@ + GRP_MUX("gnt4", PCI, pins_pci_gnt4), + GRP_MUX("req4", PCI, pins_pci_gnt4), + GRP_MUX("mdio", MDIO, pins_mdio), ++ GRP_MUX("gphy0 led0", GPHY, pins_gphy0_led0), ++ GRP_MUX("gphy0 led1", GPHY, pins_gphy0_led1), ++ GRP_MUX("gphy0 lde2", GPHY, pins_gphy0_led2), ++ GRP_MUX("gphy1 led0", GPHY, pins_gphy1_led0), ++ GRP_MUX("gphy1 led1", GPHY, pins_gphy1_led1), ++ GRP_MUX("gphy1 lde2", GPHY, pins_gphy1_led2), + }; + + static const struct ltq_pin_group ase_grps[] = { +@@ -364,6 +378,9 @@ + + /* ar9/vr9/gr9 */ + static const char * const xrx_mdio_grps[] = {"mdio"}; ++static const char * const xrx_gphy_grps[] = {"gphy0 led0", "gphy0 led1", ++ "gphy0 led2", "gphy1 led0", ++ "gphy1 led1", "gphy1 led2"}; + static const char * const xrx_ebu_grps[] = {"ebu a23", "ebu a24", + "ebu a25", "ebu cs1", + "ebu wait", "ebu clk", +@@ -413,6 +430,7 @@ + {"pci", ARRAY_AND_SIZE(xrx_pci_grps)}, + {"ebu", ARRAY_AND_SIZE(xrx_ebu_grps)}, + {"mdio", ARRAY_AND_SIZE(xrx_mdio_grps)}, ++ {"gphy", ARRAY_AND_SIZE(xrx_gphy_grps)}, + }; + + static const struct ltq_pmx_func ase_funcs[] = { + |