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authorYutang Jiang <yutang.jiang@nxp.com>2016-12-01 23:01:27 +0800
committerJohn Crispin <john@phrozen.org>2016-12-12 09:57:40 +0100
commitd5fc7430ca293213dd4f1de7f52446c17d4def6a (patch)
tree4d884312e45871f219a0f1993c80299cc1cc61a6 /package/boot/uboot-layerscape/patches/0047-Enable-second-SGMII-1G-interface.patch
parentb0ac825884e7bfe3f68385109df3234e37022c71 (diff)
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layerscape: uboot-layerscape: prefer github over git.freescale.com
In order to prevent the impact of the merger of the company and the potential rebase of the SDK repositories, migrate the u-boot source to github. Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
Diffstat (limited to 'package/boot/uboot-layerscape/patches/0047-Enable-second-SGMII-1G-interface.patch')
-rw-r--r--package/boot/uboot-layerscape/patches/0047-Enable-second-SGMII-1G-interface.patch61
1 files changed, 0 insertions, 61 deletions
diff --git a/package/boot/uboot-layerscape/patches/0047-Enable-second-SGMII-1G-interface.patch b/package/boot/uboot-layerscape/patches/0047-Enable-second-SGMII-1G-interface.patch
deleted file mode 100644
index 79e3f40..0000000
--- a/package/boot/uboot-layerscape/patches/0047-Enable-second-SGMII-1G-interface.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 61bb1dceefdb4c08ff69e7e40a766a404421206f Mon Sep 17 00:00:00 2001
-From: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
-Date: Fri, 27 May 2016 13:16:43 +0530
-Subject: [PATCH 47/93] Enable second SGMII 1G interface
-
-Enable second SGMII 1G interface on LS1012A Freedom Board
-
-Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
----
- board/freescale/ls1012afrdm/eth.c | 14 ++++++++++++++
- drivers/net/pfe_eth/pfe_eth.c | 2 +-
- 2 files changed, 15 insertions(+), 1 deletion(-)
-
-diff --git a/board/freescale/ls1012afrdm/eth.c b/board/freescale/ls1012afrdm/eth.c
-index 8ae3f45..90ed66b 100644
---- a/board/freescale/ls1012afrdm/eth.c
-+++ b/board/freescale/ls1012afrdm/eth.c
-@@ -19,6 +19,7 @@
- #include <asm/arch-fsl-layerscape/immap_lsch2.h>
-
- #define DEFAULT_PFE_MDIO_NAME "PFE_MDIO"
-+#define DEFAULT_PFE_MDIO1_NAME "PFE_MDIO1"
-
- #define MASK_ETH_PHY_RST 0x00000100
-
-@@ -71,6 +72,19 @@ int board_eth_init(bd_t *bis)
- return -1;
- }
-
-+ /*We don't really need this MDIO bus,
-+ * this is called just to initialize EMAC2 MDIO interface*/
-+ mac1_mdio_info.reg_base = (void *)0x04220000; /*EMAC2_BASE_ADDR*/
-+ mac1_mdio_info.name = DEFAULT_PFE_MDIO1_NAME;
-+
-+ bus = ls1012a_mdio_init(&mac1_mdio_info);
-+ if(!bus)
-+ {
-+ printf("Failed to register mdio \n");
-+ return -1;
-+ }
-+
-+
- /*MAC1 */
- ls1012a_set_mdio(0, miiphy_get_dev_by_name(DEFAULT_PFE_MDIO_NAME));
- ls1012a_set_phy_address_mode(0, EMAC1_PHY_ADDR, PHY_INTERFACE_MODE_SGMII);
-diff --git a/drivers/net/pfe_eth/pfe_eth.c b/drivers/net/pfe_eth/pfe_eth.c
-index 40f2c39..4aa318d 100644
---- a/drivers/net/pfe_eth/pfe_eth.c
-+++ b/drivers/net/pfe_eth/pfe_eth.c
-@@ -348,7 +348,7 @@ static void ls1012a_configure_serdes(struct ls1012a_eth_dev *priv)
-
- printf("%s %d\n", __func__, priv->gemac_port);
- /* PCS configuration done with corresponding GEMAC */
-- bus.priv = priv->gem->gemac_base;
-+ bus.priv = gem_info[priv->gemac_port].gemac_base;
-
- ls1012a_phy_read(&bus, 0, MDIO_DEVAD_NONE, 0x0);
- ls1012a_phy_read(&bus, 0, MDIO_DEVAD_NONE, 0x1);
---
-1.7.9.5
-