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authorFelix Fietkau <nbd@openwrt.org>2008-10-07 01:40:36 +0000
committerFelix Fietkau <nbd@openwrt.org>2008-10-07 01:40:36 +0000
commit27a9ac45835359d7f758f3017333ebb27350a47b (patch)
tree4f76de8bea2e04c83fe2822520167eddde81b806 /package/madwifi/patches/352-ani_fix.patch
parent822c05585018d3115b95cf64514a64785db10e89 (diff)
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madwifi: re-enable the MIB interrupt flood protection fix - apparently it's still necessary in some extreme cases
SVN-Revision: 12885
Diffstat (limited to 'package/madwifi/patches/352-ani_fix.patch')
-rw-r--r--package/madwifi/patches/352-ani_fix.patch39
1 files changed, 11 insertions, 28 deletions
diff --git a/package/madwifi/patches/352-ani_fix.patch b/package/madwifi/patches/352-ani_fix.patch
index 9845f78..981005f 100644
--- a/package/madwifi/patches/352-ani_fix.patch
+++ b/package/madwifi/patches/352-ani_fix.patch
@@ -23,24 +23,7 @@
return 0;
bad3:
ieee80211_ifdetach(ic);
-@@ -2349,16 +2352,6 @@
- }
- if (status & HAL_INT_MIB) {
- sc->sc_stats.ast_mib++;
-- /* When the card receives lots of PHY errors, the MIB
-- * interrupt will fire at a very rapid rate. We will use
-- * a timer to enforce at least 1 jiffy delay between
-- * MIB interrupts. This should be unproblematic, since
-- * the hardware will continue to update the counters in
-- * the mean time. */
-- sc->sc_imask &= ~HAL_INT_MIB;
-- ath_hal_intrset(ah, sc->sc_imask);
-- mod_timer(&sc->sc_mib_enable, jiffies + 1);
--
- /* Let the HAL handle the event. */
- ath_hal_mibevent(ah, &sc->sc_halstats);
- }
-@@ -2428,6 +2421,43 @@
+@@ -2428,6 +2431,43 @@
return flags;
}
@@ -84,7 +67,7 @@
/*
* Context: process context
*/
-@@ -2493,8 +2523,7 @@
+@@ -2493,8 +2533,7 @@
if (sc->sc_softled)
ath_hal_gpioCfgOutput(ah, sc->sc_ledpin);
@@ -94,7 +77,7 @@
/*
* This is needed only to setup initial state
-@@ -2530,7 +2559,7 @@
+@@ -2530,7 +2569,7 @@
* Enable MIB interrupts when there are hardware phy counters.
* Note we only do this (at the moment) for station mode.
*/
@@ -103,7 +86,7 @@
sc->sc_imask |= HAL_INT_MIB;
ath_hal_intrset(ah, sc->sc_imask);
-@@ -2787,9 +2816,7 @@
+@@ -2787,9 +2826,7 @@
EPRINTF(sc, "Unable to reset hardware: '%s' (HAL status %u)\n",
ath_get_hal_status_desc(status), status);
@@ -114,7 +97,7 @@
ath_update_txpow(sc); /* update tx power state */
ath_radar_update(sc);
ath_setdefantenna(sc, sc->sc_defant);
-@@ -4174,6 +4201,8 @@
+@@ -4174,6 +4211,8 @@
if (sc->sc_nmonvaps > 0)
rfilt |= (HAL_RX_FILTER_CONTROL | HAL_RX_FILTER_BEACON |
HAL_RX_FILTER_PROBEREQ | HAL_RX_FILTER_PROM);
@@ -123,7 +106,7 @@
if (sc->sc_curchan.privFlags & CHANNEL_DFS)
rfilt |= (HAL_RX_FILTER_PHYERR | HAL_RX_FILTER_PHYRADAR);
return rfilt;
-@@ -6524,9 +6553,6 @@
+@@ -6524,9 +6563,6 @@
rs->rs_rssi = 0;
len = rs->rs_datalen;
@@ -133,7 +116,7 @@
if (rs->rs_more) {
/*
-@@ -8874,9 +8900,7 @@
+@@ -8874,9 +8910,7 @@
if (sc->sc_softled)
ath_hal_gpioCfgOutput(ah, sc->sc_ledpin);
@@ -144,7 +127,7 @@
sc->sc_curchan = hchan;
ath_update_txpow(sc); /* update tx power state */
ath_radar_update(sc);
-@@ -10653,9 +10677,54 @@
+@@ -10653,9 +10687,54 @@
ATH_RP_IGNORED = 24,
ATH_RADAR_IGNORED = 25,
ATH_MAXVAPS = 26,
@@ -199,7 +182,7 @@
ATH_SYSCTL_DECL(ath_sysctl_halparam, ctl, write, filp, buffer, lenp, ppos)
{
struct ath_softc *sc = ctl->extra1;
-@@ -10841,6 +10910,11 @@
+@@ -10841,6 +10920,11 @@
case ATH_RADAR_IGNORED:
sc->sc_radar_ignored = val;
break;
@@ -211,7 +194,7 @@
default:
ret = -EINVAL;
break;
-@@ -10907,6 +10981,11 @@
+@@ -10907,6 +10991,11 @@
case ATH_RADAR_IGNORED:
val = sc->sc_radar_ignored;
break;
@@ -223,7 +206,7 @@
default:
ret = -EINVAL;
break;
-@@ -11084,6 +11163,24 @@
+@@ -11084,6 +11173,24 @@
.proc_handler = ath_sysctl_halparam,
.extra2 = (void *)ATH_RADAR_IGNORED,
},