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author | Florian Fainelli <florian@openwrt.org> | 2007-03-19 17:34:37 +0000 |
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committer | Florian Fainelli <florian@openwrt.org> | 2007-03-19 17:34:37 +0000 |
commit | d9dfd7341b4e1febcf37c7a973c1f2f13b60f54d (patch) | |
tree | 4a250ad2718a62180df562861b83777f2c4c5a85 /target/linux/adm5120-2.6/files/arch/mips/pci/ops-adm5120.c | |
parent | f04dd67969a38e54002c20828acf93090c4d10a4 (diff) | |
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Preliminary ADM5120 support, marked as broken
SVN-Revision: 6614
Diffstat (limited to 'target/linux/adm5120-2.6/files/arch/mips/pci/ops-adm5120.c')
-rw-r--r-- | target/linux/adm5120-2.6/files/arch/mips/pci/ops-adm5120.c | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/target/linux/adm5120-2.6/files/arch/mips/pci/ops-adm5120.c b/target/linux/adm5120-2.6/files/arch/mips/pci/ops-adm5120.c new file mode 100644 index 0000000..80b8531 --- /dev/null +++ b/target/linux/adm5120-2.6/files/arch/mips/pci/ops-adm5120.c @@ -0,0 +1,59 @@ +/* + * Copyright (C) ADMtek Incorporated. + * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org) + */ + +#include <linux/autoconf.h> +#include <linux/types.h> +#include <linux/pci.h> +#include <linux/kernel.h> +#include <linux/init.h> + +volatile u32* pci_config_address_reg = (volatile u32*)KSEG1ADDR(0x115ffff0); +volatile u32* pci_config_data_reg = (volatile u32*)KSEG1ADDR(0x115ffff8); + +#define PCI_ENABLE 0x80000000 + +static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, + int size, uint32_t *val) +{ + *pci_config_address_reg = ((bus->number & 0xff) << 0x10) | + ((devfn & 0xff) << 0x08) | (where & 0xfc) | PCI_ENABLE; + switch (size) { + case 1: + *val = ((*pci_config_data_reg)>>((where&3)<<3))&0xff; + break; + case 2: + *val = ((*pci_config_data_reg)>>((where&3)<<3))&0xffff; + break; + default: + *val = (*pci_config_data_reg); + } + return PCIBIOS_SUCCESSFUL; +} + +static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, + int size, uint32_t val) +{ + *pci_config_address_reg = ((bus->number & 0xff) << 0x10) | + ((devfn & 0xff) << 0x08) | (where & 0xfc) | PCI_ENABLE; + switch (size) { + case 1: + *(volatile u8 *)(((int)pci_config_data_reg) + + (where & 3)) = val; + break; + case 2: + *(volatile u16 *)(((int)pci_config_data_reg) + + (where & 2)) = (val); + break; + default: + *pci_config_data_reg = (val); + } + + return PCIBIOS_SUCCESSFUL; +} + +struct pci_ops adm5120_pci_ops = { + .read = pci_config_read, + .write = pci_config_write, +}; |