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authorGabor Juhos <juhosg@openwrt.org>2007-12-11 09:00:06 +0000
committerGabor Juhos <juhosg@openwrt.org>2007-12-11 09:00:06 +0000
commitbb6c1aa770389f296e5efe41a5bf258c98e52284 (patch)
treea0d61b91fa004735999dee5ae20c7503baff0838 /target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_defs.h
parent71f1ca2cba29516d42f9685293bf72f6b8295398 (diff)
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new experimental driver for the CF slot on the RouterBOARD 153
SVN-Revision: 9707
Diffstat (limited to 'target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_defs.h')
-rw-r--r--target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_defs.h21
1 files changed, 12 insertions, 9 deletions
diff --git a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_defs.h b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_defs.h
index 2f92a45..42e9513 100644
--- a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_defs.h
+++ b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_defs.h
@@ -29,29 +29,32 @@
#define ADM5120_SDRAM0_BASE 0x00000000
#define ADM5120_SDRAM1_BASE 0x01000000
#define ADM5120_SRAM1_BASE 0x10000000
-#define ADM5120_NAND_BASE ADM5120_SRAM1_BASE
#define ADM5120_EXTIO0_BASE 0x10C00000
+#define ADM5120_EXTIO0_SIZE 0x00200000
+#define ADM5120_EXTIO1_BASE 0x10E00000
+#define ADM5120_EXTIO1_SIZE 0x00200000
#define ADM5120_MPMC_BASE 0x11000000
+#define ADM5120_MPMC_SIZE 0x00200000
#define ADM5120_USBC_BASE 0x11200000
+#define ADM5120_USBC_SIZE 0x00200000
#define ADM5120_PCIMEM_BASE 0x11400000
+#define ADM5120_PCIMEM_SIZE 0x00100000
#define ADM5120_PCIIO_BASE 0x11500000
+#define ADM5120_PCIIO_SIZE 0x000FFFF0
#define ADM5120_PCICFG_ADDR 0x115FFFF0
#define ADM5120_PCICFG_DATA 0x115FFFF8
+#define ADM5120_PCICFG_SIZE 0x00000010
#define ADM5120_SWITCH_BASE 0x12000000
+#define ADM5120_SWITCH_SIZE 0x00200000
#define ADM5120_INTC_BASE 0x12200000
+#define ADM5120_INTC_SIZE 0x00200000
#define ADM5120_UART0_BASE 0x12600000
#define ADM5120_UART1_BASE 0x12800000
+#define ADM5120_UART_SIZE 0x00200000
#define ADM5120_SRAM0_BASE 0x1FC00000
+#define ADM5120_NAND_BASE ADM5120_SRAM1_BASE
#define ADM5120_NAND_SIZE 0xB
-#define ADM5120_MPMC_SIZE 0x1000
-#define ADM5120_USBC_SIZE 0x84
-#define ADM5120_PCIMEM_SIZE (ADM5120_PCIIO_BASE - ADM5120_PCIMEM_BASE)
-#define ADM5120_PCIIO_SIZE (ADM5120_PCICFG_ADDR - ADM5120_PCIIO_BASE)
-#define ADM5120_PCICFG_SIZE 0x10
-#define ADM5120_SWITCH_SIZE 0x114
-#define ADM5120_INTC_SIZE 0x28
-#define ADM5120_UART_SIZE 0x20
#define ADM5120_CLK_175 175000000
#define ADM5120_CLK_200 200000000