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authorGabor Juhos <juhosg@openwrt.org>2010-03-03 09:40:17 +0000
committerGabor Juhos <juhosg@openwrt.org>2010-03-03 09:40:17 +0000
commit58ec1289d9dfdb8dde4761e4e3c42c9c4bc140e7 (patch)
treec4e6e254251ef1832c686264d05afb412eaaa86f /target/linux/ar71xx/patches-2.6.33/902-mips_clocksource_init_war.patch
parent111ae3e04b422caf594e78bdcb291fcfebd242b1 (diff)
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ar71xx: refresh 2.6.33 patches
SVN-Revision: 19960
Diffstat (limited to 'target/linux/ar71xx/patches-2.6.33/902-mips_clocksource_init_war.patch')
-rw-r--r--target/linux/ar71xx/patches-2.6.33/902-mips_clocksource_init_war.patch2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/linux/ar71xx/patches-2.6.33/902-mips_clocksource_init_war.patch b/target/linux/ar71xx/patches-2.6.33/902-mips_clocksource_init_war.patch
index 894eed1..1ce4380 100644
--- a/target/linux/ar71xx/patches-2.6.33/902-mips_clocksource_init_war.patch
+++ b/target/linux/ar71xx/patches-2.6.33/902-mips_clocksource_init_war.patch
@@ -32,7 +32,7 @@
return res;
}
@@ -100,22 +117,6 @@ static int c0_compare_int_pending(void)
- return (read_c0_cause() >> cp0_compare_irq) & 0x100;
+ return (read_c0_cause() >> cp0_compare_irq_shift) & (1ul << CAUSEB_IP);
}
-/*