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author | Álvaro Fernández Rojas <noltari@gmail.com> | 2016-06-12 11:49:46 +0200 |
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committer | Álvaro Fernández Rojas <noltari@gmail.com> | 2016-06-12 15:51:54 +0200 |
commit | 0aa6c7df60d0d4a4fa01dc1b185df31ffb2c53f6 (patch) | |
tree | 51382c24cd68a4129cf7bdbbedd84b24c70e47b1 /target/linux/brcm2708/patches-4.4/0264-clk-bcm2835-add-missing-PLL-clock-dividers.patch | |
parent | 1da87516e584a86d1d056f6b58bfa3050cc875b9 (diff) | |
download | mtk-20170518-0aa6c7df60d0d4a4fa01dc1b185df31ffb2c53f6.zip mtk-20170518-0aa6c7df60d0d4a4fa01dc1b185df31ffb2c53f6.tar.gz mtk-20170518-0aa6c7df60d0d4a4fa01dc1b185df31ffb2c53f6.tar.bz2 |
kernel: update kernel 4.4 to version 4.4.13
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Diffstat (limited to 'target/linux/brcm2708/patches-4.4/0264-clk-bcm2835-add-missing-PLL-clock-dividers.patch')
-rw-r--r-- | target/linux/brcm2708/patches-4.4/0264-clk-bcm2835-add-missing-PLL-clock-dividers.patch | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/brcm2708/patches-4.4/0264-clk-bcm2835-add-missing-PLL-clock-dividers.patch b/target/linux/brcm2708/patches-4.4/0264-clk-bcm2835-add-missing-PLL-clock-dividers.patch index 1b92074..02385cc 100644 --- a/target/linux/brcm2708/patches-4.4/0264-clk-bcm2835-add-missing-PLL-clock-dividers.patch +++ b/target/linux/brcm2708/patches-4.4/0264-clk-bcm2835-add-missing-PLL-clock-dividers.patch @@ -14,7 +14,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net> --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -1383,6 +1383,22 @@ static const struct bcm2835_clk_desc clk +@@ -1387,6 +1387,22 @@ static const struct bcm2835_clk_desc clk .load_mask = CM_PLLA_LOADPER, .hold_mask = CM_PLLA_HOLDPER, .fixed_divider = 1), @@ -37,7 +37,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net> /* PLLB is used for the ARM's clock. */ [BCM2835_PLLB] = REGISTER_PLL( -@@ -1497,6 +1513,22 @@ static const struct bcm2835_clk_desc clk +@@ -1501,6 +1517,22 @@ static const struct bcm2835_clk_desc clk .load_mask = CM_PLLD_LOADPER, .hold_mask = CM_PLLD_HOLDPER, .fixed_divider = 1), |