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author | Álvaro Fernández Rojas <noltari@gmail.com> | 2016-06-12 11:49:46 +0200 |
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committer | Álvaro Fernández Rojas <noltari@gmail.com> | 2016-06-12 15:51:54 +0200 |
commit | 0aa6c7df60d0d4a4fa01dc1b185df31ffb2c53f6 (patch) | |
tree | 51382c24cd68a4129cf7bdbbedd84b24c70e47b1 /target/linux/brcm2708/patches-4.4/0350-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch | |
parent | 1da87516e584a86d1d056f6b58bfa3050cc875b9 (diff) | |
download | mtk-20170518-0aa6c7df60d0d4a4fa01dc1b185df31ffb2c53f6.zip mtk-20170518-0aa6c7df60d0d4a4fa01dc1b185df31ffb2c53f6.tar.gz mtk-20170518-0aa6c7df60d0d4a4fa01dc1b185df31ffb2c53f6.tar.bz2 |
kernel: update kernel 4.4 to version 4.4.13
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Diffstat (limited to 'target/linux/brcm2708/patches-4.4/0350-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch')
-rw-r--r-- | target/linux/brcm2708/patches-4.4/0350-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/brcm2708/patches-4.4/0350-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch b/target/linux/brcm2708/patches-4.4/0350-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch index a4708f9..01c1c1b 100644 --- a/target/linux/brcm2708/patches-4.4/0350-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch +++ b/target/linux/brcm2708/patches-4.4/0350-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch @@ -20,7 +20,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net> --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -1246,6 +1246,15 @@ static struct clk *bcm2835_register_cloc +@@ -1250,6 +1250,15 @@ static struct clk *bcm2835_register_cloc init.name = data->name; init.flags = data->flags | CLK_IGNORE_UNUSED; @@ -36,7 +36,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net> if (data->is_vpu_clock) { init.ops = &bcm2835_vpu_clock_clk_ops; } else { -@@ -1720,13 +1729,15 @@ static const struct bcm2835_clk_desc clk +@@ -1724,13 +1733,15 @@ static const struct bcm2835_clk_desc clk .div_reg = CM_GP1DIV, .int_bits = 12, .frac_bits = 12, |