brcm63xx: update irq affinity code to latest version

Reduces code size a bit and sets affinity to boot cpu by default.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>

SVN-Revision: 41591

1 files changed, 19 insertions, 12 deletions

diff --git a/target/linux/brcm63xx/patches-3.14/320-MIPS-BCM63XX-replace-irq-dispatch-code-with-a-generi.patch b/target/linux/brcm63xx/patches-3.14/320-MIPS-BCM63XX-replace-irq-dispatch-code-with-a-generi.patch
index f0311ce..021d0d9 100644
--- a/target/linux/brcm63xx/patches-3.14/320-MIPS-BCM63XX-replace-irq-dispatch-code-with-a-generi.patch
+++ b/target/linux/brcm63xx/patches-3.14/320-MIPS-BCM63XX-replace-irq-dispatch-code-with-a-generi.patch
@@ -1,15 +1,22 @@
-From 01bf26c51b427e24ac69f604d33f7d9360a9e470 Mon Sep 17 00:00:00 2001
+From 39b46ed1c9fe71890566e129d9ac5feb8421b3b4 Mon Sep 17 00:00:00 2001
 From: Jonas Gorski <jogo@openwrt.org>
 Date: Thu, 18 Apr 2013 21:14:49 +0200
-Subject: [PATCH 31/53] MIPS: BCM63XX: replace irq dispatch code with a generic
+Subject: [PATCH 03/10] MIPS: BCM63XX: replace irq dispatch code with a generic
  version
 
-The generic version uses a variable length of u32 registers of u32/u64.
-This allows easier support for longer registers without having to rewrite
-verything.
+The generic version uses a variable length of u32 registers instead of u32/u64.
+This allows easier support for "wider" registers without having to rewrite
+everything.
 
-This "generic" version is not slower than the old version in the best case
-(= i == next set bit), and twice as fast in the worst case in 64 bits.
+This "generic" version is as fast as the old version in the best case
+(i == next set bit), and twice as fast in the worst case in 64 bits.
+
+Using a macro was chosen over a (forced) inline version because gcc generated
+more compact code with the macro.
+
+The change from (signed) int to unsigned int for i and to_call was intentional
+as the value can be only between 0 and (width - 1) anyway, and allowed gcc to
+optimise the code a bit further.
 
 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 ---
@@ -47,7 +54,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 +	u32 pending[width / 32];					\
 +	unsigned int src, tgt;						\
 +	bool irqs_pending = false;					\
-+	static int i;							\
++	static unsigned int i;						\
 +									\
 +	/* read registers in reverse order */				\
 +	for (src = 0, tgt = (width / 32); src < (width / 32); src++) {	\
@@ -65,7 +72,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 +		return;							\
 +									\
 +	while (1) {							\
-+		int to_call = i;					\
++		unsigned int to_call = i;				\
 +									\
 +		i = (i + 1) & (width - 1);				\
 +		if (pending[to_call / 32] & (1 << (to_call & 0x1f))) {	\
@@ -87,13 +94,13 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 +}									\
 +									\
 +static void __internal_irq_unmask_##width(unsigned int irq)		\
-+{ 									\
++{									\
 +	u32 val;							\
 +	unsigned reg = (irq / 32) ^ (width/32 - 1);			\
-+	unsigned bit = irq & 0x1f; 					\
++	unsigned bit = irq & 0x1f;					\
 +									\
 +	val = bcm_readl(irq_mask_addr + reg * sizeof(u32));		\
-+	val |= (1 << bit); 						\
++	val |= (1 << bit);						\
 +	bcm_writel(val, irq_mask_addr + reg * sizeof(u32));		\
  }