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| author | Jonas Gorski <jogo@openwrt.org> | 2013-01-04 14:47:43 +0000 |
|---|---|---|
| committer | Jonas Gorski <jogo@openwrt.org> | 2013-01-04 14:47:43 +0000 |
| commit | 10fc07daacfee223f869397d356d1481e4094e12 (patch) | |
| tree | 6a82d3ed0768bbed69af8bdce78fa4434bb3cf72 /target/linux/brcm63xx/patches-3.3/004-MIPS-BCM63XX-define-BCM6358-SPI-base-address.patch | |
| parent | 3b7882e7752f154ce6407c892e7b92015c5c3481 (diff) | |
| download | mtk-20170518-10fc07daacfee223f869397d356d1481e4094e12.zip mtk-20170518-10fc07daacfee223f869397d356d1481e4094e12.tar.gz mtk-20170518-10fc07daacfee223f869397d356d1481e4094e12.tar.bz2 | |
bcm63xx: remove 3.3 support
3.6 is tested enough to be considered stable.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 35009
Diffstat (limited to 'target/linux/brcm63xx/patches-3.3/004-MIPS-BCM63XX-define-BCM6358-SPI-base-address.patch')
| -rw-r--r-- | target/linux/brcm63xx/patches-3.3/004-MIPS-BCM63XX-define-BCM6358-SPI-base-address.patch | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/target/linux/brcm63xx/patches-3.3/004-MIPS-BCM63XX-define-BCM6358-SPI-base-address.patch b/target/linux/brcm63xx/patches-3.3/004-MIPS-BCM63XX-define-BCM6358-SPI-base-address.patch deleted file mode 100644 index 0c314da..0000000 --- a/target/linux/brcm63xx/patches-3.3/004-MIPS-BCM63XX-define-BCM6358-SPI-base-address.patch +++ /dev/null @@ -1,21 +0,0 @@ -From bfd78dda2ad5afb4434ebe99c05528614065bdb1 Mon Sep 17 00:00:00 2001 -From: Florian Fainelli <florian@openwrt.org> -Date: Wed, 25 Jan 2012 17:39:56 +0100 -Subject: [PATCH 06/63] MIPS: BCM63XX: define BCM6358 SPI base address - -Signed-off-by: Florian Fainelli <florian@openwrt.org> ---- - arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 2 +- - 1 files changed, 1 insertions(+), 1 deletions(-) - ---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h -+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h -@@ -289,7 +289,7 @@ enum bcm63xx_regs_set { - #define BCM_6358_UART0_BASE (0xfffe0100) - #define BCM_6358_UART1_BASE (0xfffe0120) - #define BCM_6358_GPIO_BASE (0xfffe0080) --#define BCM_6358_SPI_BASE (0xdeadbeef) -+#define BCM_6358_SPI_BASE (0xfffe0800) - #define BCM_6358_SPI2_BASE (0xfffe0800) - #define BCM_6358_UDC0_BASE (0xfffe0800) - #define BCM_6358_OHCI0_BASE (0xfffe1400) |