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author | Florian Fainelli <florian@openwrt.org> | 2013-06-17 19:32:47 +0000 |
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committer | Florian Fainelli <florian@openwrt.org> | 2013-06-17 19:32:47 +0000 |
commit | 78a66975d65b348bb49d741e21f6399cdb27b87d (patch) | |
tree | 1971d91ef0abef99efeba6400af3d7223e82314a /target/linux/brcm63xx/patches-3.8/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch | |
parent | d2894412d8f78f491f0ca5c3884349c6928aadb9 (diff) | |
download | mtk-20170518-78a66975d65b348bb49d741e21f6399cdb27b87d.zip mtk-20170518-78a66975d65b348bb49d741e21f6399cdb27b87d.tar.gz mtk-20170518-78a66975d65b348bb49d741e21f6399cdb27b87d.tar.bz2 |
brcm63xx: remove support for 3.8 kernel
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 36948
Diffstat (limited to 'target/linux/brcm63xx/patches-3.8/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch')
-rw-r--r-- | target/linux/brcm63xx/patches-3.8/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch | 53 |
1 files changed, 0 insertions, 53 deletions
diff --git a/target/linux/brcm63xx/patches-3.8/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch b/target/linux/brcm63xx/patches-3.8/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch deleted file mode 100644 index f8e92dc..0000000 --- a/target/linux/brcm63xx/patches-3.8/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch +++ /dev/null @@ -1,53 +0,0 @@ -From d8237d704fc25eb2fc25ef4403608b78c6a6d4be Mon Sep 17 00:00:00 2001 -From: Jonas Gorski <jonas.gorski@gmail.com> -Date: Sun, 15 Jul 2012 20:08:57 +0200 -Subject: [PATCH 54/81] bcm63xx_enet: enable rgmii clock on external ports - ---- - arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 13 +++++++++++++ - drivers/net/ethernet/broadcom/bcm63xx_enet.c | 12 ++++++++++++ - 2 files changed, 25 insertions(+), 0 deletions(-) - ---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h -+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h -@@ -861,6 +861,19 @@ - #define ENETSW_PORTOV_FDX_MASK (1 << 1) - #define ENETSW_PORTOV_LINKUP_MASK (1 << 0) - -+/* Port RGMII control register */ -+#define ENETSW_RGMII_CTRL_REG(x) (0x60 + (x)) -+#define ENETSW_RGMII_CTRL_GMII_CLK_EN (1 << 7) -+#define ENETSW_RGMII_CTRL_MII_OVERRIDE_EN (1 << 6) -+#define ENETSW_RGMII_CTRL_MII_MODE_MASK (3 << 4) -+#define ENETSW_RGMII_CTRL_RGMII_MODE (0 << 4) -+#define ENETSW_RGMII_CTRL_MII_MODE (1 << 4) -+#define ENETSW_RGMII_CTRL_RVMII_MODE (2 << 4) -+#define ENETSW_RGMII_CTRL_TIMING_SEL_EN (1 << 0) -+ -+/* Port RGMII timing register */ -+#define ENETSW_RGMII_TIMING_REG(x) (0x68 + (x)) -+ - /* MDIO control register */ - #define ENETSW_MDIOC_REG (0xb0) - #define ENETSW_MDIOC_EXT_MASK (1 << 16) ---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c -+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c -@@ -2201,6 +2201,18 @@ static int bcm_enetsw_open(struct net_de - priv->sw_port_link[i] = 0; - } - -+ /* enable external ports */ -+ for (i = ENETSW_RGMII_PORT0; i < priv->num_ports; i++) { -+ u8 rgmii_ctrl; -+ -+ if (!priv->used_ports[i].used) -+ continue; -+ -+ rgmii_ctrl = enetsw_readb(priv, ENETSW_RGMII_CTRL_REG(i)); -+ rgmii_ctrl |= ENETSW_RGMII_CTRL_GMII_CLK_EN; -+ enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i)); -+ } -+ - /* reset mib */ - val = enetsw_readb(priv, ENETSW_GMCR_REG); - val |= ENETSW_GMCR_RST_MIB_MASK; |