2.6.28 and 2.6.30 support is enough on ixp4xx

SVN-Revision: 16545

37 files changed, 0 insertions, 7990 deletions

diff --git a/target/linux/ixp4xx/patches-2.6.27/010-ixp43x_pci_fixup.patch b/target/linux/ixp4xx/patches-2.6.27/010-ixp43x_pci_fixup.patch
deleted file mode 100644
index 35af7f4..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/010-ixp43x_pci_fixup.patch
+++ /dev/null
@@ -1,11 +0,0 @@
---- a/arch/arm/mach-ixp4xx/include/mach/hardware.h
-+++ b/arch/arm/mach-ixp4xx/include/mach/hardware.h
-@@ -18,7 +18,7 @@
- #define __ASM_ARCH_HARDWARE_H__
- 
- #define PCIBIOS_MIN_IO		0x00001000
--#define PCIBIOS_MIN_MEM		(cpu_is_ixp43x() ? 0x40000000 : 0x48000000)
-+#define PCIBIOS_MIN_MEM		0x48000000
- 
- /*
-  * We override the standard dma-mask routines for bouncing.
diff --git a/target/linux/ixp4xx/patches-2.6.27/090-increase_entropy_pools.patch b/target/linux/ixp4xx/patches-2.6.27/090-increase_entropy_pools.patch
deleted file mode 100644
index 5cf81db..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/090-increase_entropy_pools.patch
+++ /dev/null
@@ -1,15 +0,0 @@
---- a/drivers/char/random.c
-+++ b/drivers/char/random.c
-@@ -259,9 +259,9 @@
- /*
-  * Configuration information
-  */
--#define INPUT_POOL_WORDS 128
--#define OUTPUT_POOL_WORDS 32
--#define SEC_XFER_SIZE 512
-+#define INPUT_POOL_WORDS 256
-+#define OUTPUT_POOL_WORDS 64
-+#define SEC_XFER_SIZE 1024
- 
- /*
-  * The minimum number of bits of entropy before we wake up a read on
diff --git a/target/linux/ixp4xx/patches-2.6.27/100-wg302v2_gateway7001_mac_plat_info.patch b/target/linux/ixp4xx/patches-2.6.27/100-wg302v2_gateway7001_mac_plat_info.patch
deleted file mode 100644
index a19a408..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/100-wg302v2_gateway7001_mac_plat_info.patch
+++ /dev/null
@@ -1,68 +0,0 @@
---- a/arch/arm/mach-ixp4xx/gateway7001-setup.c
-+++ b/arch/arm/mach-ixp4xx/gateway7001-setup.c
-@@ -76,9 +76,35 @@ static struct platform_device gateway700
- 	.resource	= &gateway7001_uart_resource,
- };
- 
-+static struct eth_plat_info gateway7001_plat_eth[] = {
-+	{
-+		.phy		= 1,
-+		.rxq		= 3,
-+		.txreadyq	= 20,
-+	}, {
-+		.phy		= 2,
-+		.rxq		= 4,
-+		.txreadyq	= 21,
-+	}
-+};
-+
-+static struct platform_device gateway7001_eth[] = {
-+	{
-+		.name			= "ixp4xx_eth",
-+		.id			= IXP4XX_ETH_NPEB,
-+		.dev.platform_data	= gateway7001_plat_eth,
-+	}, {
-+		.name			= "ixp4xx_eth",
-+		.id			= IXP4XX_ETH_NPEC,
-+		.dev.platform_data	= gateway7001_plat_eth + 1,
-+	}
-+};
-+
- static struct platform_device *gateway7001_devices[] __initdata = {
- 	&gateway7001_flash,
--	&gateway7001_uart
-+	&gateway7001_uart,
-+	&gateway7001_eth[0],
-+	&gateway7001_eth[1],
- };
- 
- static void __init gateway7001_init(void)
---- a/arch/arm/mach-ixp4xx/wg302v2-setup.c
-+++ b/arch/arm/mach-ixp4xx/wg302v2-setup.c
-@@ -77,9 +77,26 @@ static struct platform_device wg302v2_ua
- 	.resource	= &wg302v2_uart_resource,
- };
- 
-+static struct eth_plat_info wg302v2_plat_eth[] = {
-+	{
-+		.phy		= 8,
-+		.rxq		= 3,
-+		.txreadyq	= 20,
-+	}
-+};
-+
-+static struct platform_device wg302v2_eth[] = {
-+	{
-+		.name			= "ixp4xx_eth",
-+		.id			= IXP4XX_ETH_NPEB,
-+		.dev.platform_data	= wg302v2_plat_eth,
-+	}
-+};
-+
- static struct platform_device *wg302v2_devices[] __initdata = {
- 	&wg302v2_flash,
- 	&wg302v2_uart,
-+	&wg302v2_eth[0],
- };
- 
- static void __init wg302v2_init(void)
diff --git a/target/linux/ixp4xx/patches-2.6.27/105-wg302v1_support.patch b/target/linux/ixp4xx/patches-2.6.27/105-wg302v1_support.patch
deleted file mode 100644
index 600813f..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/105-wg302v1_support.patch
+++ /dev/null
@@ -1,257 +0,0 @@
---- a/arch/arm/configs/ixp4xx_defconfig
-+++ b/arch/arm/configs/ixp4xx_defconfig
-@@ -155,6 +155,7 @@ CONFIG_MACH_AVILA=y
- CONFIG_MACH_LOFT=y
- CONFIG_ARCH_ADI_COYOTE=y
- CONFIG_MACH_GATEWAY7001=y
-+CONFIG_MACH_WG302V1=y
- CONFIG_MACH_WG302V2=y
- CONFIG_ARCH_IXDP425=y
- CONFIG_MACH_IXDPG425=y
---- a/arch/arm/mach-ixp4xx/Kconfig
-+++ b/arch/arm/mach-ixp4xx/Kconfig
-@@ -49,6 +49,14 @@ config MACH_GATEWAY7001
- 	  7001 Access Point. For more information on this platform,
- 	  see http://openwrt.org
- 
-+config MACH_WG302V1
-+	bool "Netgear WG302 v1 / WAG302 v1"
-+	select PCI
-+	help
-+	  Say 'Y' here if you want your kernel to support Netgear's
-+	  WG302 v1 or WAG302 v1 Access Points. For more information
-+	  on this platform, see http://openwrt.org
-+
- config MACH_WG302V2
- 	bool "Netgear WG302 v2 / WAG302 v2"
- 	select PCI
---- a/arch/arm/mach-ixp4xx/Makefile
-+++ b/arch/arm/mach-ixp4xx/Makefile
-@@ -14,6 +14,7 @@ obj-pci-$(CONFIG_MACH_NSLU2)		+= nslu2-p
- obj-pci-$(CONFIG_MACH_NAS100D)		+= nas100d-pci.o
- obj-pci-$(CONFIG_MACH_DSMG600)		+= dsmg600-pci.o
- obj-pci-$(CONFIG_MACH_GATEWAY7001)	+= gateway7001-pci.o
-+obj-pci-$(CONFIG_MACH_WG302V1)		+= wg302v1-pci.o
- obj-pci-$(CONFIG_MACH_WG302V2)		+= wg302v2-pci.o
- obj-pci-$(CONFIG_MACH_FSG)		+= fsg-pci.o
- 
-@@ -28,6 +29,7 @@ obj-$(CONFIG_MACH_NSLU2)	+= nslu2-setup.
- obj-$(CONFIG_MACH_NAS100D)	+= nas100d-setup.o
- obj-$(CONFIG_MACH_DSMG600)      += dsmg600-setup.o
- obj-$(CONFIG_MACH_GATEWAY7001)	+= gateway7001-setup.o
-+obj-$(CONFIG_MACH_WG302V1)	+= wg302v1-setup.o
- obj-$(CONFIG_MACH_WG302V2)	+= wg302v2-setup.o
- obj-$(CONFIG_MACH_FSG)		+= fsg-setup.o
- 
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/wg302v1-pci.c
-@@ -0,0 +1,64 @@
-+/*
-+ * arch/arch/mach-ixp4xx/wg302v1-pci.c
-+ *
-+ * PCI setup routines for the Netgear WG302 v1 and WAG302 v1
-+ *
-+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * based on coyote-pci.c:
-+ *	Copyright (C) 2002 Jungo Software Technologies.
-+ *	Copyright (C) 2003 MontaVista Software, Inc.
-+ *
-+ * Maintainer: Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/pci.h>
-+#include <linux/init.h>
-+#include <linux/irq.h>
-+
-+#include <asm/mach-types.h>
-+#include <mach/hardware.h>
-+
-+#include <asm/mach/pci.h>
-+
-+void __init wg302v1_pci_preinit(void)
-+{
-+	set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW);
-+	set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW);
-+
-+	ixp4xx_pci_preinit();
-+}
-+
-+static int __init wg302v1_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-+{
-+	if (slot == 1)
-+		return IRQ_IXP4XX_GPIO8;
-+	else if (slot == 2)
-+		return IRQ_IXP4XX_GPIO10;
-+	else
-+		return -1;
-+}
-+
-+struct hw_pci wg302v1_pci __initdata = {
-+	.nr_controllers = 1,
-+	.preinit =        wg302v1_pci_preinit,
-+	.swizzle =        pci_std_swizzle,
-+	.setup =          ixp4xx_setup,
-+	.scan =           ixp4xx_scan_bus,
-+	.map_irq =        wg302v1_map_irq,
-+};
-+
-+int __init wg302v1_pci_init(void)
-+{
-+	if (machine_is_wg302v1())
-+		pci_common_init(&wg302v1_pci);
-+	return 0;
-+}
-+
-+subsys_initcall(wg302v1_pci_init);
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/wg302v1-setup.c
-@@ -0,0 +1,142 @@
-+/*
-+ * arch/arm/mach-ixp4xx/wg302v1-setup.c
-+ *
-+ * Board setup for the Netgear WG302 v1 and WAG302 v1
-+ *
-+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * based on coyote-setup.c:
-+ *      Copyright (C) 2003-2005 MontaVista Software, Inc.
-+ *
-+ * Author: Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/device.h>
-+#include <linux/serial.h>
-+#include <linux/tty.h>
-+#include <linux/serial_8250.h>
-+#include <linux/slab.h>
-+#include <linux/types.h>
-+#include <linux/memory.h>
-+
-+#include <asm/setup.h>
-+#include <mach/hardware.h>
-+#include <asm/irq.h>
-+#include <asm/mach-types.h>
-+#include <asm/mach/arch.h>
-+#include <asm/mach/flash.h>
-+
-+static struct flash_platform_data wg302v1_flash_data = {
-+	.map_name	= "cfi_probe",
-+	.width		= 2,
-+};
-+
-+static struct resource wg302v1_flash_resource = {
-+	.flags		= IORESOURCE_MEM,
-+};
-+
-+static struct platform_device wg302v1_flash = {
-+	.name		= "IXP4XX-Flash",
-+	.id		= 0,
-+	.dev		= {
-+		.platform_data = &wg302v1_flash_data,
-+	},
-+	.num_resources	= 1,
-+	.resource	= &wg302v1_flash_resource,
-+};
-+
-+static struct resource wg302v1_uart_resources[] = {
-+	{
-+		.start	= IXP4XX_UART1_BASE_PHYS,
-+		.end	= IXP4XX_UART1_BASE_PHYS + 0x0fff,
-+		.flags	= IORESOURCE_MEM,
-+	},
-+	{
-+		.start	= IXP4XX_UART2_BASE_PHYS,
-+		.end	= IXP4XX_UART2_BASE_PHYS + 0x0fff,
-+		.flags	= IORESOURCE_MEM,
-+	}
-+};
-+
-+static struct plat_serial8250_port wg302v1_uart_data[] = {
-+	{
-+		.mapbase	= IXP4XX_UART1_BASE_PHYS,
-+		.membase	= (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
-+		.irq		= IRQ_IXP4XX_UART1,
-+		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+		.iotype		= UPIO_MEM,
-+		.regshift	= 2,
-+		.uartclk	= IXP4XX_UART_XTAL,
-+	},
-+	{
-+		.mapbase	= IXP4XX_UART2_BASE_PHYS,
-+		.membase	= (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
-+		.irq		= IRQ_IXP4XX_UART2,
-+		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+		.iotype		= UPIO_MEM,
-+		.regshift	= 2,
-+		.uartclk	= IXP4XX_UART_XTAL,
-+	},
-+	{ },
-+};
-+
-+static struct platform_device wg302v1_uart = {
-+	.name		= "serial8250",
-+	.id		= PLAT8250_DEV_PLATFORM,
-+	.dev			= {
-+		.platform_data	= wg302v1_uart_data,
-+	},
-+	.num_resources	= 2,
-+	.resource	= wg302v1_uart_resources,
-+};
-+
-+static struct eth_plat_info wg302v1_plat_eth[] = {
-+	{
-+		.phy		= 30,
-+		.rxq		= 3,
-+		.txreadyq	= 20,
-+	}
-+};
-+
-+static struct platform_device wg302v1_eth[] = {
-+	{
-+		.name			= "ixp4xx_eth",
-+		.id			= IXP4XX_ETH_NPEB,
-+		.dev.platform_data	= wg302v1_plat_eth,
-+	}
-+};
-+
-+static struct platform_device *wg302v1_devices[] __initdata = {
-+	&wg302v1_flash,
-+	&wg302v1_uart,
-+	&wg302v1_eth[0],
-+};
-+
-+static void __init wg302v1_init(void)
-+{
-+	ixp4xx_sys_init();
-+
-+	wg302v1_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
-+	wg302v1_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
-+
-+	*IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
-+	*IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
-+
-+	platform_add_devices(wg302v1_devices, ARRAY_SIZE(wg302v1_devices));
-+}
-+
-+#ifdef CONFIG_MACH_WG302V1
-+MACHINE_START(WG302V1, "Netgear WG302 v1 / WAG302 v1")
-+	/* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
-+	.phys_io	= IXP4XX_PERIPHERAL_BASE_PHYS,
-+	.io_pg_offst	= ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-+	.map_io		= ixp4xx_map_io,
-+	.init_irq	= ixp4xx_init_irq,
-+	.timer		= &ixp4xx_timer,
-+	.boot_params	= 0x0100,
-+	.init_machine	= wg302v1_init,
-+MACHINE_END
-+#endif
diff --git a/target/linux/ixp4xx/patches-2.6.27/110-pronghorn_series_support.patch b/target/linux/ixp4xx/patches-2.6.27/110-pronghorn_series_support.patch
deleted file mode 100644
index 9b81e2e..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/110-pronghorn_series_support.patch
+++ /dev/null
@@ -1,387 +0,0 @@
---- a/arch/arm/configs/ixp4xx_defconfig
-+++ b/arch/arm/configs/ixp4xx_defconfig
-@@ -157,6 +157,8 @@ CONFIG_ARCH_ADI_COYOTE=y
- CONFIG_MACH_GATEWAY7001=y
- CONFIG_MACH_WG302V1=y
- CONFIG_MACH_WG302V2=y
-+CONFIG_MACH_PRONGHORN=y
-+CONFIG_MACH_PRONGHORNMETRO=y
- CONFIG_ARCH_IXDP425=y
- CONFIG_MACH_IXDPG425=y
- CONFIG_MACH_IXDP465=y
---- a/arch/arm/mach-ixp4xx/Kconfig
-+++ b/arch/arm/mach-ixp4xx/Kconfig
-@@ -65,6 +65,22 @@ config MACH_WG302V2
- 	  WG302 v2 or WAG302 v2 Access Points. For more information
- 	  on this platform, see http://openwrt.org
- 
-+config MACH_PRONGHORN
-+	bool "ADI Pronghorn series"
-+	select PCI
-+	help
-+	  Say 'Y' here if you want your kernel to support the ADI 
-+	  Engineering Pronghorn series. For more
-+	  information on this platform, see http://www.adiengineering.com
-+
-+#
-+# There're only minimal differences kernel-wise between the Pronghorn and
-+# Pronghorn Metro boards - they use different chip selects to drive the
-+# CF slot connected to the expansion bus, so we just enable them together.
-+#
-+config MACH_PRONGHORNMETRO
-+	def_bool MACH_PRONGHORN
-+
- config ARCH_IXDP425
- 	bool "IXDP425"
- 	help
---- a/arch/arm/mach-ixp4xx/Makefile
-+++ b/arch/arm/mach-ixp4xx/Makefile
-@@ -17,6 +17,7 @@ obj-pci-$(CONFIG_MACH_GATEWAY7001)	+= ga
- obj-pci-$(CONFIG_MACH_WG302V1)		+= wg302v1-pci.o
- obj-pci-$(CONFIG_MACH_WG302V2)		+= wg302v2-pci.o
- obj-pci-$(CONFIG_MACH_FSG)		+= fsg-pci.o
-+obj-pci-$(CONFIG_MACH_PRONGHORN)	+= pronghorn-pci.o
- 
- obj-y	+= common.o
- 
-@@ -32,6 +33,7 @@ obj-$(CONFIG_MACH_GATEWAY7001)	+= gatewa
- obj-$(CONFIG_MACH_WG302V1)	+= wg302v1-setup.o
- obj-$(CONFIG_MACH_WG302V2)	+= wg302v2-setup.o
- obj-$(CONFIG_MACH_FSG)		+= fsg-setup.o
-+obj-$(CONFIG_MACH_PRONGHORN)	+= pronghorn-setup.o
- 
- obj-$(CONFIG_PCI)		+= $(obj-pci-$(CONFIG_PCI)) common-pci.o
- obj-$(CONFIG_IXP4XX_QMGR)	+= ixp4xx_qmgr.o
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/pronghorn-pci.c
-@@ -0,0 +1,70 @@
-+/*
-+ * arch/arch/mach-ixp4xx/pronghorn-pci.c
-+ *
-+ * PCI setup routines for ADI Engineering Pronghorn series
-+ *
-+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * based on coyote-pci.c:
-+ *	Copyright (C) 2002 Jungo Software Technologies.
-+ *	Copyright (C) 2003 MontaVista Softwrae, Inc.
-+ *
-+ * Maintainer: Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/pci.h>
-+#include <linux/init.h>
-+#include <linux/irq.h>
-+
-+#include <asm/mach-types.h>
-+#include <mach/hardware.h>
-+
-+#include <asm/mach/pci.h>
-+
-+void __init pronghorn_pci_preinit(void)
-+{
-+	set_irq_type(IRQ_IXP4XX_GPIO4, IRQ_TYPE_LEVEL_LOW);
-+	set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW);
-+	set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW);
-+	set_irq_type(IRQ_IXP4XX_GPIO1, IRQ_TYPE_LEVEL_LOW);
-+
-+	ixp4xx_pci_preinit();
-+}
-+
-+static int __init pronghorn_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-+{
-+	if (slot == 13)
-+		return IRQ_IXP4XX_GPIO4;
-+	else if (slot == 14)
-+		return IRQ_IXP4XX_GPIO6;
-+	else if (slot == 15)
-+		return IRQ_IXP4XX_GPIO11;
-+	else if (slot == 16)
-+		return IRQ_IXP4XX_GPIO1;
-+	else
-+		return -1;
-+}
-+
-+struct hw_pci pronghorn_pci __initdata = {
-+	.nr_controllers	= 1,
-+	.preinit	= pronghorn_pci_preinit,
-+	.swizzle	= pci_std_swizzle,
-+	.setup		= ixp4xx_setup,
-+	.scan		= ixp4xx_scan_bus,
-+	.map_irq	= pronghorn_map_irq,
-+};
-+
-+int __init pronghorn_pci_init(void)
-+{
-+	if (machine_is_pronghorn() || machine_is_pronghorn_metro())
-+		pci_common_init(&pronghorn_pci);
-+	return 0;
-+}
-+
-+subsys_initcall(pronghorn_pci_init);
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/pronghorn-setup.c
-@@ -0,0 +1,245 @@
-+/*
-+ * arch/arm/mach-ixp4xx/pronghorn-setup.c
-+ *
-+ * Board setup for the ADI Engineering Pronghorn series
-+ *
-+ * Copyright (C) 2008 Imre Kaloz <Kaloz@openwrt.org>
-+ *
-+ * based on coyote-setup.c:
-+ *      Copyright (C) 2003-2005 MontaVista Software, Inc.
-+ *
-+ * Author: Imre Kaloz <Kaloz@openwrt.org>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/device.h>
-+#include <linux/serial.h>
-+#include <linux/tty.h>
-+#include <linux/serial_8250.h>
-+#include <linux/slab.h>
-+#include <linux/types.h>
-+#include <linux/memory.h>
-+#include <linux/i2c-gpio.h>
-+#include <linux/leds.h>
-+
-+#include <asm/setup.h>
-+#include <mach/hardware.h>
-+#include <asm/irq.h>
-+#include <asm/mach-types.h>
-+#include <asm/mach/arch.h>
-+#include <asm/mach/flash.h>
-+
-+static struct flash_platform_data pronghorn_flash_data = {
-+	.map_name	= "cfi_probe",
-+	.width		= 2,
-+};
-+
-+static struct resource pronghorn_flash_resource = {
-+	.flags		= IORESOURCE_MEM,
-+};
-+
-+static struct platform_device pronghorn_flash = {
-+	.name		= "IXP4XX-Flash",
-+	.id		= 0,
-+	.dev		= {
-+		.platform_data	= &pronghorn_flash_data,
-+	},
-+	.num_resources	= 1,
-+	.resource	= &pronghorn_flash_resource,
-+};
-+
-+static struct resource pronghorn_uart_resources [] = {
-+	{
-+		.start		= IXP4XX_UART1_BASE_PHYS,
-+		.end		= IXP4XX_UART1_BASE_PHYS + 0x0fff,
-+		.flags		= IORESOURCE_MEM
-+	},
-+	{
-+		.start		= IXP4XX_UART2_BASE_PHYS,
-+		.end		= IXP4XX_UART2_BASE_PHYS + 0x0fff,
-+		.flags		= IORESOURCE_MEM
-+	}
-+};
-+
-+static struct plat_serial8250_port pronghorn_uart_data[] = {
-+	{
-+		.mapbase	= IXP4XX_UART1_BASE_PHYS,
-+		.membase	= (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
-+		.irq		= IRQ_IXP4XX_UART1,
-+		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+		.iotype		= UPIO_MEM,
-+		.regshift	= 2,
-+		.uartclk	= IXP4XX_UART_XTAL,
-+	},
-+	{
-+		.mapbase	= IXP4XX_UART2_BASE_PHYS,
-+		.membase	= (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
-+		.irq		= IRQ_IXP4XX_UART2,
-+		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+		.iotype		= UPIO_MEM,
-+		.regshift	= 2,
-+		.uartclk	= IXP4XX_UART_XTAL,
-+	},
-+	{ },
-+};
-+
-+static struct platform_device pronghorn_uart = {
-+	.name		= "serial8250",
-+	.id		= PLAT8250_DEV_PLATFORM,
-+	.dev		= {
-+		.platform_data	= pronghorn_uart_data,
-+	},
-+	.num_resources	= 2,
-+	.resource	= pronghorn_uart_resources,
-+};
-+
-+static struct i2c_gpio_platform_data pronghorn_i2c_gpio_data = {
-+	.sda_pin	= 9,
-+	.scl_pin	= 10,
-+};
-+
-+static struct platform_device pronghorn_i2c_gpio = {
-+	.name		= "i2c-gpio",
-+	.id		= 0,
-+	.dev		= {
-+		.platform_data	= &pronghorn_i2c_gpio_data,
-+	},
-+};
-+
-+static struct gpio_led pronghorn_led_pin[] = {
-+	{
-+		.name		= "pronghorn:green:status",
-+		.gpio		= 7,
-+	}
-+};
-+
-+static struct gpio_led_platform_data pronghorn_led_data = {
-+	.num_leds		= 1,
-+	.leds			= pronghorn_led_pin,
-+};
-+
-+static struct platform_device pronghorn_led = {
-+	.name			= "leds-gpio",
-+	.id			= -1,
-+	.dev.platform_data	= &pronghorn_led_data,
-+};
-+
-+static struct resource pronghorn_pata_resources[] = {
-+	{
-+		.flags	= IORESOURCE_MEM
-+	},
-+	{
-+		.flags	= IORESOURCE_MEM,
-+	},
-+	{
-+		.name	= "intrq",
-+		.start	= IRQ_IXP4XX_GPIO0,
-+		.end	= IRQ_IXP4XX_GPIO0,
-+		.flags	= IORESOURCE_IRQ,
-+	},
-+};
-+
-+static struct ixp4xx_pata_data pronghorn_pata_data = {
-+	.cs0_bits	= 0xbfff0043,
-+	.cs1_bits	= 0xbfff0043,
-+};
-+
-+static struct platform_device pronghorn_pata = {
-+	.name			= "pata_ixp4xx_cf",
-+	.id			= 0,
-+	.dev.platform_data      = &pronghorn_pata_data,
-+	.num_resources		= ARRAY_SIZE(pronghorn_pata_resources),
-+	.resource		= pronghorn_pata_resources,
-+};
-+
-+static struct eth_plat_info pronghorn_plat_eth[] = {
-+	{
-+		.phy		= 0,
-+		.rxq		= 3,
-+		.txreadyq	= 20,
-+	}, {
-+		.phy		= 1,
-+		.rxq		= 4,
-+		.txreadyq	= 21,
-+	}
-+};
-+
-+static struct platform_device pronghorn_eth[] = {
-+	{
-+		.name			= "ixp4xx_eth",
-+		.id			= IXP4XX_ETH_NPEB,
-+		.dev.platform_data	= pronghorn_plat_eth,
-+	}, {
-+		.name			= "ixp4xx_eth",
-+		.id			= IXP4XX_ETH_NPEC,
-+		.dev.platform_data	= pronghorn_plat_eth + 1,
-+	}
-+};
-+
-+static struct platform_device *pronghorn_devices[] __initdata = {
-+	&pronghorn_flash,
-+	&pronghorn_uart,
-+	&pronghorn_led,
-+	&pronghorn_eth[0],
-+	&pronghorn_eth[1],
-+};
-+
-+static void __init pronghorn_init(void)
-+{
-+	ixp4xx_sys_init();
-+
-+	pronghorn_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
-+	pronghorn_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
-+
-+	*IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
-+	*IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
-+
-+	platform_add_devices(pronghorn_devices, ARRAY_SIZE(pronghorn_devices));
-+
-+	if (machine_is_pronghorn()) {
-+		pronghorn_pata_resources[0].start = IXP4XX_EXP_BUS_BASE(2);
-+		pronghorn_pata_resources[0].end = IXP4XX_EXP_BUS_END(2);
-+
-+		pronghorn_pata_resources[1].start = IXP4XX_EXP_BUS_BASE(3);
-+		pronghorn_pata_resources[1].end = IXP4XX_EXP_BUS_END(3);
-+
-+		pronghorn_pata_data.cs0_cfg = IXP4XX_EXP_CS2;
-+		pronghorn_pata_data.cs1_cfg = IXP4XX_EXP_CS3;
-+	} else {
-+		pronghorn_pata_resources[0].start = IXP4XX_EXP_BUS_BASE(3);
-+		pronghorn_pata_resources[0].end = IXP4XX_EXP_BUS_END(3);
-+
-+		pronghorn_pata_resources[1].start = IXP4XX_EXP_BUS_BASE(4);
-+		pronghorn_pata_resources[1].end = IXP4XX_EXP_BUS_END(4);
-+
-+		pronghorn_pata_data.cs0_cfg = IXP4XX_EXP_CS3;
-+		pronghorn_pata_data.cs1_cfg = IXP4XX_EXP_CS4;
-+
-+		platform_device_register(&pronghorn_i2c_gpio);
-+	}
-+
-+	platform_device_register(&pronghorn_pata);
-+}
-+
-+MACHINE_START(PRONGHORN, "ADI Engineering Pronghorn")
-+	/* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
-+	.phys_io	= IXP4XX_PERIPHERAL_BASE_PHYS,
-+	.io_pg_offst	= ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-+	.map_io		= ixp4xx_map_io,
-+	.init_irq	= ixp4xx_init_irq,
-+	.timer		= &ixp4xx_timer,
-+	.boot_params	= 0x0100,
-+	.init_machine	= pronghorn_init,
-+MACHINE_END
-+
-+MACHINE_START(PRONGHORNMETRO, "ADI Engineering Pronghorn Metro")
-+	/* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
-+	.phys_io	= IXP4XX_PERIPHERAL_BASE_PHYS,
-+	.io_pg_offst	= ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-+	.map_io		= ixp4xx_map_io,
-+	.init_irq	= ixp4xx_init_irq,
-+	.timer		= &ixp4xx_timer,
-+	.boot_params	= 0x0100,
-+	.init_machine	= pronghorn_init,
-+MACHINE_END
---- a/arch/arm/mach-ixp4xx/include/mach/uncompress.h
-+++ b/arch/arm/mach-ixp4xx/include/mach/uncompress.h
-@@ -41,7 +41,8 @@ static __inline__ void __arch_decomp_set
- 	 * Some boards are using UART2 as console
- 	 */
- 	if (machine_is_adi_coyote() || machine_is_gtwx5715() ||
--			 machine_is_gateway7001() || machine_is_wg302v2())
-+			 machine_is_gateway7001() || machine_is_wg302v2() ||
-+			 machine_is_pronghorn() || machine_is_pronghorn_metro())
- 		uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS;
- 	else
- 		uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS;
diff --git a/target/linux/ixp4xx/patches-2.6.27/111-pronghorn_swap_uarts.patch b/target/linux/ixp4xx/patches-2.6.27/111-pronghorn_swap_uarts.patch
deleted file mode 100644
index b9fa507..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/111-pronghorn_swap_uarts.patch
+++ /dev/null
@@ -1,44 +0,0 @@
---- a/arch/arm/mach-ixp4xx/pronghorn-setup.c
-+++ b/arch/arm/mach-ixp4xx/pronghorn-setup.c
-@@ -51,31 +51,31 @@ static struct platform_device pronghorn_
- 
- static struct resource pronghorn_uart_resources [] = {
- 	{
--		.start		= IXP4XX_UART1_BASE_PHYS,
--		.end		= IXP4XX_UART1_BASE_PHYS + 0x0fff,
-+		.start		= IXP4XX_UART2_BASE_PHYS,
-+		.end		= IXP4XX_UART2_BASE_PHYS + 0x0fff,
- 		.flags		= IORESOURCE_MEM
- 	},
- 	{
--		.start		= IXP4XX_UART2_BASE_PHYS,
--		.end		= IXP4XX_UART2_BASE_PHYS + 0x0fff,
-+		.start		= IXP4XX_UART1_BASE_PHYS,
-+		.end		= IXP4XX_UART1_BASE_PHYS + 0x0fff,
- 		.flags		= IORESOURCE_MEM
- 	}
- };
- 
- static struct plat_serial8250_port pronghorn_uart_data[] = {
- 	{
--		.mapbase	= IXP4XX_UART1_BASE_PHYS,
--		.membase	= (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
--		.irq		= IRQ_IXP4XX_UART1,
-+		.mapbase	= IXP4XX_UART2_BASE_PHYS,
-+		.membase	= (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
-+		.irq		= IRQ_IXP4XX_UART2,
- 		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
- 		.iotype		= UPIO_MEM,
- 		.regshift	= 2,
- 		.uartclk	= IXP4XX_UART_XTAL,
- 	},
- 	{
--		.mapbase	= IXP4XX_UART2_BASE_PHYS,
--		.membase	= (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
--		.irq		= IRQ_IXP4XX_UART2,
-+		.mapbase	= IXP4XX_UART1_BASE_PHYS,
-+		.membase	= (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
-+		.irq		= IRQ_IXP4XX_UART1,
- 		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
- 		.iotype		= UPIO_MEM,
- 		.regshift	= 2,
diff --git a/target/linux/ixp4xx/patches-2.6.27/115-sidewinder_support.patch b/target/linux/ixp4xx/patches-2.6.27/115-sidewinder_support.patch
deleted file mode 100644
index af03d33..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/115-sidewinder_support.patch
+++ /dev/null
@@ -1,282 +0,0 @@
-From 60bdaaaf3446b4237566c6e04855186fc7bd766b Mon Sep 17 00:00:00 2001
-From: Imre Kaloz <kaloz@openwrt.org>
-Date: Sun, 13 Jul 2008 22:46:45 +0200
-Subject: [PATCH] Add support for the ADI Sidewinder
-
-Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
----
- arch/arm/mach-ixp4xx/Kconfig            |   10 ++-
- arch/arm/mach-ixp4xx/Makefile           |    2 +
- arch/arm/mach-ixp4xx/sidewinder-pci.c   |   68 ++++++++++++++
- arch/arm/mach-ixp4xx/sidewinder-setup.c |  151 +++++++++++++++++++++++++++++++
- 4 files changed, 230 insertions(+), 1 deletions(-)
- create mode 100644 arch/arm/mach-ixp4xx/sidewinder-pci.c
- create mode 100644 arch/arm/mach-ixp4xx/sidewinder-setup.c
-
---- a/arch/arm/mach-ixp4xx/Kconfig
-+++ b/arch/arm/mach-ixp4xx/Kconfig
-@@ -81,6 +81,14 @@ config MACH_PRONGHORN
- config MACH_PRONGHORNMETRO
- 	def_bool MACH_PRONGHORN
- 
-+config MACH_SIDEWINDER
-+	bool "ADI Sidewinder"
-+	select PCI
-+	help
-+	  Say 'Y' here if you want your kernel to support the ADI 
-+	  Engineering Sidewinder board. For more information on this
-+	  platform, see http://www.adiengineering.com
-+
- config ARCH_IXDP425
- 	bool "IXDP425"
- 	help
-@@ -163,7 +171,7 @@ config MACH_FSG
- #
- config CPU_IXP46X
- 	bool
--	depends on MACH_IXDP465
-+	depends on MACH_IXDP465 || MACH_SIDEWINDER
- 	default y
- 
- config CPU_IXP43X
---- a/arch/arm/mach-ixp4xx/Makefile
-+++ b/arch/arm/mach-ixp4xx/Makefile
-@@ -18,6 +18,7 @@ obj-pci-$(CONFIG_MACH_WG302V1)		+= wg302
- obj-pci-$(CONFIG_MACH_WG302V2)		+= wg302v2-pci.o
- obj-pci-$(CONFIG_MACH_FSG)		+= fsg-pci.o
- obj-pci-$(CONFIG_MACH_PRONGHORN)	+= pronghorn-pci.o
-+obj-pci-$(CONFIG_MACH_SIDEWINDER)	+= sidewinder-pci.o
- 
- obj-y	+= common.o
- 
-@@ -34,6 +35,7 @@ obj-$(CONFIG_MACH_WG302V1)	+= wg302v1-se
- obj-$(CONFIG_MACH_WG302V2)	+= wg302v2-setup.o
- obj-$(CONFIG_MACH_FSG)		+= fsg-setup.o
- obj-$(CONFIG_MACH_PRONGHORN)	+= pronghorn-setup.o
-+obj-$(CONFIG_MACH_SIDEWINDER)	+= sidewinder-setup.o
- 
- obj-$(CONFIG_PCI)		+= $(obj-pci-$(CONFIG_PCI)) common-pci.o
- obj-$(CONFIG_IXP4XX_QMGR)	+= ixp4xx_qmgr.o
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/sidewinder-pci.c
-@@ -0,0 +1,68 @@
-+/*
-+ * arch/arch/mach-ixp4xx/pronghornmetro-pci.c
-+ *
-+ * PCI setup routines for ADI Engineering Sidewinder
-+ *
-+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * based on coyote-pci.c:
-+ *	Copyright (C) 2002 Jungo Software Technologies.
-+ *	Copyright (C) 2003 MontaVista Softwrae, Inc.
-+ *
-+ * Maintainer: Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/pci.h>
-+#include <linux/init.h>
-+#include <linux/irq.h>
-+
-+#include <asm/mach-types.h>
-+#include <mach/hardware.h>
-+#include <asm/irq.h>
-+
-+#include <asm/mach/pci.h>
-+
-+void __init sidewinder_pci_preinit(void)
-+{
-+	set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW);
-+	set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW);
-+	set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW);
-+
-+	ixp4xx_pci_preinit();
-+}
-+
-+static int __init sidewinder_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-+{
-+	if (slot == 1)
-+		return IRQ_IXP4XX_GPIO11;
-+	else if (slot == 2)
-+		return IRQ_IXP4XX_GPIO10;
-+	else if (slot == 3)
-+		return IRQ_IXP4XX_GPIO9;
-+	else
-+		return -1;
-+}
-+
-+struct hw_pci sidewinder_pci __initdata = {
-+	.nr_controllers	= 1,
-+	.preinit	= sidewinder_pci_preinit,
-+	.swizzle	= pci_std_swizzle,
-+	.setup		= ixp4xx_setup,
-+	.scan		= ixp4xx_scan_bus,
-+	.map_irq	= sidewinder_map_irq,
-+};
-+
-+int __init sidewinder_pci_init(void)
-+{
-+	if (machine_is_sidewinder())
-+		pci_common_init(&sidewinder_pci);
-+	return 0;
-+}
-+
-+subsys_initcall(sidewinder_pci_init);
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/sidewinder-setup.c
-@@ -0,0 +1,149 @@
-+/*
-+ * arch/arm/mach-ixp4xx/sidewinder-setup.c
-+ *
-+ * Board setup for the ADI Engineering Sidewinder
-+ *
-+ * Copyright (C) 2008 Imre Kaloz <Kaloz@openwrt.org>
-+ *
-+ * based on coyote-setup.c:
-+ *      Copyright (C) 2003-2005 MontaVista Software, Inc.
-+ *
-+ * Author: Imre Kaloz <Kaloz@openwrt.org>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/serial.h>
-+#include <linux/serial_8250.h>
-+
-+#include <asm/mach-types.h>
-+#include <asm/mach/arch.h>
-+#include <asm/mach/flash.h>
-+
-+static struct flash_platform_data sidewinder_flash_data = {
-+	.map_name	= "cfi_probe",
-+	.width		= 2,
-+};
-+
-+static struct resource sidewinder_flash_resource = {
-+	.flags		= IORESOURCE_MEM,
-+};
-+
-+static struct platform_device sidewinder_flash = {
-+	.name		= "IXP4XX-Flash",
-+	.id		= 0,
-+	.dev		= {
-+		.platform_data = &sidewinder_flash_data,
-+	},
-+	.num_resources	= 1,
-+	.resource	= &sidewinder_flash_resource,
-+};
-+
-+static struct resource sidewinder_uart_resources[] = {
-+	{
-+		.start	= IXP4XX_UART1_BASE_PHYS,
-+		.end	= IXP4XX_UART1_BASE_PHYS + 0x0fff,
-+		.flags	= IORESOURCE_MEM,
-+	},
-+	{
-+		.start	= IXP4XX_UART2_BASE_PHYS,
-+		.end	= IXP4XX_UART2_BASE_PHYS + 0x0fff,
-+		.flags	= IORESOURCE_MEM,
-+	}
-+};
-+
-+static struct plat_serial8250_port sidewinder_uart_data[] = {
-+	{
-+		.mapbase	= IXP4XX_UART1_BASE_PHYS,
-+		.membase	= (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
-+		.irq		= IRQ_IXP4XX_UART1,
-+		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+		.iotype		= UPIO_MEM,
-+		.regshift	= 2,
-+		.uartclk	= IXP4XX_UART_XTAL,
-+	},
-+	{
-+		.mapbase	= IXP4XX_UART2_BASE_PHYS,
-+		.membase	= (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
-+		.irq		= IRQ_IXP4XX_UART2,
-+		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+		.iotype		= UPIO_MEM,
-+		.regshift	= 2,
-+		.uartclk	= IXP4XX_UART_XTAL,
-+	},
-+	{ },
-+};
-+
-+static struct platform_device sidewinder_uart = {
-+	.name		= "serial8250",
-+	.id		= PLAT8250_DEV_PLATFORM,
-+	.dev		= {
-+		.platform_data	= sidewinder_uart_data,
-+	},
-+	.num_resources	= ARRAY_SIZE(sidewinder_uart_resources),
-+	.resource	= sidewinder_uart_resources,
-+};
-+
-+static struct eth_plat_info sidewinder_plat_eth[] = {
-+	{
-+		.phy		= 5,
-+		.rxq		= 3,
-+		.txreadyq	= 20,
-+	}, {
-+		.phy		= IXP4XX_ETH_PHY_MAX_ADDR,
-+		.phy_mask	= 0x1e,
-+		.rxq		= 4,
-+		.txreadyq	= 21,
-+	}, {
-+		.phy		= 31,
-+		.rxq		= 2,
-+		.txreadyq	= 19,
-+	}
-+};
-+
-+static struct platform_device sidewinder_eth[] = {
-+	{
-+		.name			= "ixp4xx_eth",
-+		.id			= IXP4XX_ETH_NPEB,
-+		.dev.platform_data	= sidewinder_plat_eth,
-+	}, {
-+		.name			= "ixp4xx_eth",
-+		.id			= IXP4XX_ETH_NPEC,
-+		.dev.platform_data	= sidewinder_plat_eth + 1,
-+	}, {
-+		.name			= "ixp4xx_eth",
-+		.id			= IXP4XX_ETH_NPEA,
-+		.dev.platform_data	= sidewinder_plat_eth + 2,
-+	}
-+};
-+
-+static struct platform_device *sidewinder_devices[] __initdata = {
-+	&sidewinder_flash,
-+	&sidewinder_uart,
-+	&sidewinder_eth[0],
-+	&sidewinder_eth[1],
-+	&sidewinder_eth[2],
-+};
-+
-+static void __init sidewinder_init(void)
-+{
-+	ixp4xx_sys_init();
-+
-+	sidewinder_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
-+	sidewinder_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_64M - 1;
-+
-+	*IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
-+	*IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
-+
-+	platform_add_devices(sidewinder_devices, ARRAY_SIZE(sidewinder_devices));
-+}
-+
-+MACHINE_START(SIDEWINDER, "ADI Engineering Sidewinder")
-+	/* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
-+	.phys_io	= IXP4XX_PERIPHERAL_BASE_PHYS,
-+	.io_pg_offst	= ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-+	.map_io		= ixp4xx_map_io,
-+	.init_irq	= ixp4xx_init_irq,
-+	.timer		= &ixp4xx_timer,
-+	.boot_params	= 0x0100,
-+	.init_machine	= sidewinder_init,
-+MACHINE_END
diff --git a/target/linux/ixp4xx/patches-2.6.27/116-sidewinder_fis_location.patch b/target/linux/ixp4xx/patches-2.6.27/116-sidewinder_fis_location.patch
deleted file mode 100644
index 1d0a983..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/116-sidewinder_fis_location.patch
+++ /dev/null
@@ -1,30 +0,0 @@
---- a/drivers/mtd/redboot.c
-+++ b/drivers/mtd/redboot.c
-@@ -13,6 +13,8 @@
- 
- #define BOARD_CONFIG_PART		"boardconfig"
- 
-+#include <asm/mach-types.h>
-+
- struct fis_image_desc {
-     unsigned char name[16];      // Null terminated name
-     uint32_t	  flash_base;    // Address within FLASH of image
-@@ -30,7 +32,8 @@ struct fis_list {
- 	struct fis_list *next;
- };
- 
--static int directory = CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK;
-+int directory = CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK;
-+
- module_param(directory, int, 0);
- 
- static inline int redboot_checksum(struct fis_image_desc *img)
-@@ -59,6 +62,8 @@ static int parse_redboot_partitions(stru
- #ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
- 	static char nullstring[] = "unallocated";
- #endif
-+	if (machine_is_sidewinder())
-+		directory = -5;
- 
- 	if ( directory < 0 ) {
- 		offset = master->size + directory * master->erasesize;
diff --git a/target/linux/ixp4xx/patches-2.6.27/120-compex_support.patch b/target/linux/ixp4xx/patches-2.6.27/120-compex_support.patch
deleted file mode 100644
index 571a480..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/120-compex_support.patch
+++ /dev/null
@@ -1,212 +0,0 @@
-From 24025a2dcf1248079dd3019fac6ed955252d277f Mon Sep 17 00:00:00 2001
-From: Imre Kaloz <kaloz@openwrt.org>
-Date: Mon, 14 Jul 2008 21:56:34 +0200
-Subject: [PATCH] Add support for the Compex WP18 / NP18A boards
-
-Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
----
- arch/arm/mach-ixp4xx/Kconfig        |    8 ++
- arch/arm/mach-ixp4xx/Makefile       |    2 +
- arch/arm/mach-ixp4xx/compex-setup.c |  136 +++++++++++++++++++++++++++++++++++
- arch/arm/mach-ixp4xx/ixdp425-pci.c  |    3 +-
- arch/arm/tools/mach-types           |    2 +-
- 5 files changed, 149 insertions(+), 2 deletions(-)
- create mode 100644 arch/arm/mach-ixp4xx/compex-setup.c
-
---- a/arch/arm/mach-ixp4xx/Kconfig
-+++ b/arch/arm/mach-ixp4xx/Kconfig
-@@ -89,6 +89,14 @@ config MACH_SIDEWINDER
- 	  Engineering Sidewinder board. For more information on this
- 	  platform, see http://www.adiengineering.com
- 
-+config MACH_COMPEX
-+	bool "Compex WP18 / NP18A"
-+	select PCI
-+	help
-+	  Say 'Y' here if you want your kernel to support Compex' 
-+	  WP18 or NP18A boards. For more information on this
-+	  platform, see http://www.compex.com.sg/home/OEM/product_ap.htm
-+
- config ARCH_IXDP425
- 	bool "IXDP425"
- 	help
---- a/arch/arm/mach-ixp4xx/Makefile
-+++ b/arch/arm/mach-ixp4xx/Makefile
-@@ -19,6 +19,7 @@ obj-pci-$(CONFIG_MACH_WG302V2)		+= wg302
- obj-pci-$(CONFIG_MACH_FSG)		+= fsg-pci.o
- obj-pci-$(CONFIG_MACH_PRONGHORN)	+= pronghorn-pci.o
- obj-pci-$(CONFIG_MACH_SIDEWINDER)	+= sidewinder-pci.o
-+obj-pci-$(CONFIG_MACH_COMPEX)		+= ixdp425-pci.o
- 
- obj-y	+= common.o
- 
-@@ -36,6 +37,7 @@ obj-$(CONFIG_MACH_WG302V2)	+= wg302v2-se
- obj-$(CONFIG_MACH_FSG)		+= fsg-setup.o
- obj-$(CONFIG_MACH_PRONGHORN)	+= pronghorn-setup.o
- obj-$(CONFIG_MACH_SIDEWINDER)	+= sidewinder-setup.o
-+obj-$(CONFIG_MACH_COMPEX)	+= compex-setup.o
- 
- obj-$(CONFIG_PCI)		+= $(obj-pci-$(CONFIG_PCI)) common-pci.o
- obj-$(CONFIG_IXP4XX_QMGR)	+= ixp4xx_qmgr.o
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/compex-setup.c
-@@ -0,0 +1,136 @@
-+/*
-+ * arch/arm/mach-ixp4xx/compex-setup.c
-+ *
-+ * Compex WP18 / NP18A board-setup
-+ *
-+ * Copyright (C) 2008 Imre Kaloz <Kaloz@openwrt.org>
-+ *
-+ * based on coyote-setup.c:
-+ *	Copyright (C) 2003-2005 MontaVista Software, Inc.
-+ *
-+ * Author: Imre Kaloz <Kaloz@openwrt.org>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/serial.h>
-+#include <linux/serial_8250.h>
-+
-+#include <asm/mach-types.h>
-+#include <asm/mach/arch.h>
-+#include <asm/mach/flash.h>
-+
-+static struct flash_platform_data compex_flash_data = {
-+	.map_name	= "cfi_probe",
-+	.width		= 2,
-+};
-+
-+static struct resource compex_flash_resource = {
-+	.flags		= IORESOURCE_MEM,
-+};
-+
-+static struct platform_device compex_flash = {
-+	.name		= "IXP4XX-Flash",
-+	.id		= 0,
-+	.dev		= {
-+		.platform_data = &compex_flash_data,
-+	},
-+	.num_resources	= 1,
-+	.resource	= &compex_flash_resource,
-+};
-+
-+static struct resource compex_uart_resources[] = {
-+	{
-+		.start		= IXP4XX_UART1_BASE_PHYS,
-+		.end		= IXP4XX_UART1_BASE_PHYS + 0x0fff,
-+		.flags		= IORESOURCE_MEM
-+	},
-+	{
-+		.start		= IXP4XX_UART2_BASE_PHYS,
-+		.end		= IXP4XX_UART2_BASE_PHYS + 0x0fff,
-+		.flags		= IORESOURCE_MEM
-+	}
-+};
-+
-+static struct plat_serial8250_port compex_uart_data[] = {
-+	{
-+		.mapbase	= IXP4XX_UART1_BASE_PHYS,
-+		.membase	= (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
-+		.irq		= IRQ_IXP4XX_UART1,
-+		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+		.iotype		= UPIO_MEM,
-+		.regshift	= 2,
-+		.uartclk	= IXP4XX_UART_XTAL,
-+	},
-+	{
-+		.mapbase	= IXP4XX_UART2_BASE_PHYS,
-+		.membase	= (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
-+		.irq		= IRQ_IXP4XX_UART2,
-+		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+		.iotype		= UPIO_MEM,
-+		.regshift	= 2,
-+		.uartclk	= IXP4XX_UART_XTAL,
-+	},
-+	{ },
-+};
-+
-+static struct platform_device compex_uart = {
-+	.name			= "serial8250",
-+	.id			= PLAT8250_DEV_PLATFORM,
-+	.dev.platform_data	= compex_uart_data,
-+	.num_resources		= 2,
-+	.resource		= compex_uart_resources,
-+};
-+
-+static struct eth_plat_info compex_plat_eth[] = {
-+	{
-+		.phy		= IXP4XX_ETH_PHY_MAX_ADDR,
-+		.phy_mask	= 0xf0000,
-+		.rxq		= 3,
-+		.txreadyq	= 20,
-+	}, {
-+		.phy		= 3,
-+		.rxq		= 4,
-+		.txreadyq	= 21,
-+	}
-+};
-+
-+static struct platform_device compex_eth[] = {
-+	{
-+		.name			= "ixp4xx_eth",
-+		.id			= IXP4XX_ETH_NPEB,
-+		.dev.platform_data	= compex_plat_eth,
-+	}, {
-+		.name			= "ixp4xx_eth",
-+		.id			= IXP4XX_ETH_NPEC,
-+		.dev.platform_data	= compex_plat_eth + 1,
-+	}
-+};
-+
-+static struct platform_device *compex_devices[] __initdata = {
-+	&compex_flash,
-+	&compex_uart,
-+	&compex_eth[0],
-+	&compex_eth[1],
-+};
-+
-+static void __init compex_init(void)
-+{
-+	ixp4xx_sys_init();
-+
-+	compex_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
-+	compex_flash_resource.end =
-+		IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
-+
-+	platform_add_devices(compex_devices, ARRAY_SIZE(compex_devices));
-+}
-+
-+MACHINE_START(COMPEX, "Compex WP18 / NP18A")
-+	/* Maintainer: Imre Kaloz <Kaloz@openwrt.org> */
-+	.phys_io	= IXP4XX_PERIPHERAL_BASE_PHYS,
-+	.io_pg_offst	= ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-+	.map_io		= ixp4xx_map_io,
-+	.init_irq	= ixp4xx_init_irq,
-+	.timer		= &ixp4xx_timer,
-+	.boot_params	= 0x0100,
-+	.init_machine	= compex_init,
-+MACHINE_END
---- a/arch/arm/mach-ixp4xx/ixdp425-pci.c
-+++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c
-@@ -66,7 +66,8 @@ struct hw_pci ixdp425_pci __initdata = {
- int __init ixdp425_pci_init(void)
- {
- 	if (machine_is_ixdp425() || machine_is_ixcdp1100() ||
--			machine_is_ixdp465() || machine_is_kixrp435())
-+			machine_is_ixdp465() || machine_is_kixrp435() ||
-+			machine_is_compex())
- 		pci_common_init(&ixdp425_pci);
- 	return 0;
- }
---- a/arch/arm/tools/mach-types
-+++ b/arch/arm/tools/mach-types
-@@ -1273,7 +1273,7 @@ oiab			MACH_OIAB		OIAB			1269
- smdk6400		MACH_SMDK6400		SMDK6400		1270
- nokia_n800		MACH_NOKIA_N800		NOKIA_N800		1271
- greenphone		MACH_GREENPHONE		GREENPHONE		1272
--compex42x		MACH_COMPEXWP18		COMPEXWP18		1273
-+compex			MACH_COMPEX		COMPEX			1273
- xmate			MACH_XMATE		XMATE			1274
- energizer		MACH_ENERGIZER		ENERGIZER		1275
- ime1			MACH_IME1		IME1			1276
diff --git a/target/linux/ixp4xx/patches-2.6.27/130-wrt300nv2_support.patch b/target/linux/ixp4xx/patches-2.6.27/130-wrt300nv2_support.patch
deleted file mode 100644
index 48d5ee2..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/130-wrt300nv2_support.patch
+++ /dev/null
@@ -1,225 +0,0 @@
---- a/arch/arm/mach-ixp4xx/Kconfig
-+++ b/arch/arm/mach-ixp4xx/Kconfig
-@@ -97,6 +97,14 @@ config MACH_COMPEX
- 	  WP18 or NP18A boards. For more information on this
- 	  platform, see http://www.compex.com.sg/home/OEM/product_ap.htm
- 
-+config MACH_WRT300NV2
-+	bool "Linksys WRT300N v2"
-+	select PCI
-+	help
-+	  Say 'Y' here if you want your kernel to support Linksys' 
-+	  WRT300N v2 router. For more information on this
-+	  platform, see http://openwrt.org
-+
- config ARCH_IXDP425
- 	bool "IXDP425"
- 	help
---- a/arch/arm/mach-ixp4xx/Makefile
-+++ b/arch/arm/mach-ixp4xx/Makefile
-@@ -20,6 +20,7 @@ obj-pci-$(CONFIG_MACH_FSG)		+= fsg-pci.o
- obj-pci-$(CONFIG_MACH_PRONGHORN)	+= pronghorn-pci.o
- obj-pci-$(CONFIG_MACH_SIDEWINDER)	+= sidewinder-pci.o
- obj-pci-$(CONFIG_MACH_COMPEX)		+= ixdp425-pci.o
-+obj-pci-$(CONFIG_MACH_WRT300NV2)		+= wrt300nv2-pci.o
- 
- obj-y	+= common.o
- 
-@@ -38,6 +39,7 @@ obj-$(CONFIG_MACH_FSG)		+= fsg-setup.o
- obj-$(CONFIG_MACH_PRONGHORN)	+= pronghorn-setup.o
- obj-$(CONFIG_MACH_SIDEWINDER)	+= sidewinder-setup.o
- obj-$(CONFIG_MACH_COMPEX)	+= compex-setup.o
-+obj-$(CONFIG_MACH_WRT300NV2)	+= wrt300nv2-setup.o
- 
- obj-$(CONFIG_PCI)		+= $(obj-pci-$(CONFIG_PCI)) common-pci.o
- obj-$(CONFIG_IXP4XX_QMGR)	+= ixp4xx_qmgr.o
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/wrt300nv2-pci.c
-@@ -0,0 +1,65 @@
-+/*
-+ * arch/arch/mach-ixp4xx/wrt300nv2-pci.c
-+ *
-+ * PCI setup routines for Linksys WRT300N v2
-+ *
-+ * Copyright (C) 2007 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * based on coyote-pci.c:
-+ *	Copyright (C) 2002 Jungo Software Technologies.
-+ *	Copyright (C) 2003 MontaVista Softwrae, Inc.
-+ *
-+ * Maintainer: Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/pci.h>
-+#include <linux/init.h>
-+#include <linux/irq.h>
-+
-+#include <asm/mach-types.h>
-+#include <mach/hardware.h>
-+#include <asm/irq.h>
-+
-+#include <asm/mach/pci.h>
-+
-+extern void ixp4xx_pci_preinit(void);
-+extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
-+extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
-+
-+void __init wrt300nv2_pci_preinit(void)
-+{
-+	set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW);
-+
-+	ixp4xx_pci_preinit();
-+}
-+
-+static int __init wrt300nv2_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-+{
-+	if (slot == 1)
-+		return IRQ_IXP4XX_GPIO8;
-+	else return -1;
-+}
-+
-+struct hw_pci wrt300nv2_pci __initdata = {
-+	.nr_controllers = 1,
-+	.preinit =        wrt300nv2_pci_preinit,
-+	.swizzle =        pci_std_swizzle,
-+	.setup =          ixp4xx_setup,
-+	.scan =           ixp4xx_scan_bus,
-+	.map_irq =        wrt300nv2_map_irq,
-+};
-+
-+int __init wrt300nv2_pci_init(void)
-+{
-+	if (machine_is_wrt300nv2())
-+		pci_common_init(&wrt300nv2_pci);
-+	return 0;
-+}
-+
-+subsys_initcall(wrt300nv2_pci_init);
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/wrt300nv2-setup.c
-@@ -0,0 +1,108 @@
-+/*
-+ * arch/arm/mach-ixp4xx/wrt300nv2-setup.c
-+ *
-+ * Board setup for the Linksys WRT300N v2
-+ *
-+ * Copyright (C) 2007 Imre Kaloz <Kaloz@openwrt.org>
-+ *
-+ * based on coyote-setup.c:
-+ *      Copyright (C) 2003-2005 MontaVista Software, Inc.
-+ *
-+ * Author: Imre Kaloz <Kaloz@openwrt.org>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/device.h>
-+#include <linux/serial.h>
-+#include <linux/tty.h>
-+#include <linux/serial_8250.h>
-+#include <linux/slab.h>
-+
-+#include <asm/types.h>
-+#include <asm/setup.h>
-+#include <asm/memory.h>
-+#include <mach/hardware.h>
-+#include <asm/irq.h>
-+#include <asm/mach-types.h>
-+#include <asm/mach/arch.h>
-+#include <asm/mach/flash.h>
-+
-+static struct flash_platform_data wrt300nv2_flash_data = {
-+	.map_name	= "cfi_probe",
-+	.width		= 2,
-+};
-+
-+static struct resource wrt300nv2_flash_resource = {
-+	.flags		= IORESOURCE_MEM,
-+};
-+
-+static struct platform_device wrt300nv2_flash = {
-+	.name		= "IXP4XX-Flash",
-+	.id		= 0,
-+	.dev		= {
-+		.platform_data = &wrt300nv2_flash_data,
-+	},
-+	.num_resources	= 1,
-+	.resource	= &wrt300nv2_flash_resource,
-+};
-+
-+static struct resource wrt300nv2_uart_resource = {
-+	.start	= IXP4XX_UART2_BASE_PHYS,
-+	.end	= IXP4XX_UART2_BASE_PHYS + 0x0fff,
-+	.flags	= IORESOURCE_MEM,
-+};
-+
-+static struct plat_serial8250_port wrt300nv2_uart_data[] = {
-+	{
-+		.mapbase	= IXP4XX_UART2_BASE_PHYS,
-+		.membase	= (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
-+		.irq		= IRQ_IXP4XX_UART2,
-+		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+		.iotype		= UPIO_MEM,
-+		.regshift	= 2,
-+		.uartclk	= IXP4XX_UART_XTAL,
-+	},
-+	{ },
-+};
-+
-+static struct platform_device wrt300nv2_uart = {
-+	.name		= "serial8250",
-+	.id		= PLAT8250_DEV_PLATFORM,
-+	.dev			= {
-+		.platform_data	= wrt300nv2_uart_data,
-+	},
-+	.num_resources	= 1,
-+	.resource	= &wrt300nv2_uart_resource,
-+};
-+
-+static struct platform_device *wrt300nv2_devices[] __initdata = {
-+	&wrt300nv2_flash,
-+	&wrt300nv2_uart
-+};
-+
-+static void __init wrt300nv2_init(void)
-+{
-+	ixp4xx_sys_init();
-+
-+	wrt300nv2_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
-+	wrt300nv2_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
-+
-+	*IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
-+	*IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
-+
-+	platform_add_devices(wrt300nv2_devices, ARRAY_SIZE(wrt300nv2_devices));
-+}
-+
-+#ifdef CONFIG_MACH_WRT300NV2
-+MACHINE_START(WRT300NV2, "Linksys WRT300N v2")
-+	/* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
-+	.phys_io	= IXP4XX_PERIPHERAL_BASE_PHYS,
-+	.io_pg_offst	= ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-+	.map_io		= ixp4xx_map_io,
-+	.init_irq	= ixp4xx_init_irq,
-+	.timer		= &ixp4xx_timer,
-+	.boot_params	= 0x0100,
-+	.init_machine	= wrt300nv2_init,
-+MACHINE_END
-+#endif
---- a/arch/arm/mach-ixp4xx/include/mach/uncompress.h
-+++ b/arch/arm/mach-ixp4xx/include/mach/uncompress.h
-@@ -42,7 +42,7 @@ static __inline__ void __arch_decomp_set
- 	 */
- 	if (machine_is_adi_coyote() || machine_is_gtwx5715() ||
- 			 machine_is_gateway7001() || machine_is_wg302v2() ||
--			 machine_is_pronghorn() || machine_is_pronghorn_metro())
-+			 machine_is_pronghorn() || machine_is_pronghorn_metro() || machine_is_wrt300nv2())
- 		uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS;
- 	else
- 		uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS;
diff --git a/target/linux/ixp4xx/patches-2.6.27/131-wrt300nv2_mac_plat_info.patch b/target/linux/ixp4xx/patches-2.6.27/131-wrt300nv2_mac_plat_info.patch
deleted file mode 100644
index 3ab68c4..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/131-wrt300nv2_mac_plat_info.patch
+++ /dev/null
@@ -1,40 +0,0 @@
---- a/arch/arm/mach-ixp4xx/wrt300nv2-setup.c
-+++ b/arch/arm/mach-ixp4xx/wrt300nv2-setup.c
-@@ -76,9 +76,36 @@ static struct platform_device wrt300nv2_
- 	.resource	= &wrt300nv2_uart_resource,
- };
- 
-+/* Built-in 10/100 Ethernet MAC interfaces */
-+static struct eth_plat_info wrt300nv2_plat_eth[] = {
-+	{
-+		.phy		= -1,
-+		.rxq		= 3,
-+		.txreadyq	= 20,
-+	}, {
-+		.phy		= 1,
-+		.rxq		= 4,
-+		.txreadyq	= 21,
-+	}
-+};
-+
-+static struct platform_device wrt300nv2_eth[] = {
-+	{
-+		.name			= "ixp4xx_eth",
-+		.id			= IXP4XX_ETH_NPEB,
-+		.dev.platform_data	= wrt300nv2_plat_eth,
-+	}, {
-+		.name			= "ixp4xx_eth",
-+		.id			= IXP4XX_ETH_NPEC,
-+		.dev.platform_data	= wrt300nv2_plat_eth + 1,
-+	}
-+};
-+
- static struct platform_device *wrt300nv2_devices[] __initdata = {
- 	&wrt300nv2_flash,
--	&wrt300nv2_uart
-+	&wrt300nv2_uart,
-+	&wrt300nv2_eth[0],
-+	&wrt300nv2_eth[1],
- };
- 
- static void __init wrt300nv2_init(void)
diff --git a/target/linux/ixp4xx/patches-2.6.27/150-lanready_ap1000_support.patch b/target/linux/ixp4xx/patches-2.6.27/150-lanready_ap1000_support.patch
deleted file mode 100644
index 283bbf8..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/150-lanready_ap1000_support.patch
+++ /dev/null
@@ -1,200 +0,0 @@
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/ap1000-setup.c
-@@ -0,0 +1,151 @@
-+/*
-+ * arch/arm/mach-ixp4xx/ap1000-setup.c
-+ *
-+ * Lanready AP-1000
-+ *
-+ * Copyright (C) 2007 Imre Kaloz <Kaloz@openwrt.org>
-+ *
-+ * based on ixdp425-setup.c:
-+ *	Copyright (C) 2003-2005 MontaVista Software, Inc.
-+ *
-+ * Author: Imre Kaloz <Kaloz@openwrt.org>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/device.h>
-+#include <linux/serial.h>
-+#include <linux/tty.h>
-+#include <linux/serial_8250.h>
-+#include <linux/slab.h>
-+
-+#include <asm/types.h>
-+#include <asm/setup.h>
-+#include <asm/memory.h>
-+#include <mach/hardware.h>
-+#include <asm/mach-types.h>
-+#include <asm/irq.h>
-+#include <asm/mach/arch.h>
-+#include <asm/mach/flash.h>
-+
-+static struct flash_platform_data ap1000_flash_data = {
-+	.map_name	= "cfi_probe",
-+	.width		= 2,
-+};
-+
-+static struct resource ap1000_flash_resource = {
-+	.flags		= IORESOURCE_MEM,
-+};
-+
-+static struct platform_device ap1000_flash = {
-+	.name		= "IXP4XX-Flash",
-+	.id		= 0,
-+	.dev		= {
-+		.platform_data = &ap1000_flash_data,
-+	},
-+	.num_resources	= 1,
-+	.resource	= &ap1000_flash_resource,
-+};
-+
-+static struct resource ap1000_uart_resources[] = {
-+	{
-+		.start		= IXP4XX_UART1_BASE_PHYS,
-+		.end		= IXP4XX_UART1_BASE_PHYS + 0x0fff,
-+		.flags		= IORESOURCE_MEM
-+	},
-+	{
-+		.start		= IXP4XX_UART2_BASE_PHYS,
-+		.end		= IXP4XX_UART2_BASE_PHYS + 0x0fff,
-+		.flags		= IORESOURCE_MEM
-+	}
-+};
-+
-+static struct plat_serial8250_port ap1000_uart_data[] = {
-+	{
-+		.mapbase	= IXP4XX_UART1_BASE_PHYS,
-+		.membase	= (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
-+		.irq		= IRQ_IXP4XX_UART1,
-+		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+		.iotype		= UPIO_MEM,
-+		.regshift	= 2,
-+		.uartclk	= IXP4XX_UART_XTAL,
-+	},
-+	{
-+		.mapbase	= IXP4XX_UART2_BASE_PHYS,
-+		.membase	= (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
-+		.irq		= IRQ_IXP4XX_UART2,
-+		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+		.iotype		= UPIO_MEM,
-+		.regshift	= 2,
-+		.uartclk	= IXP4XX_UART_XTAL,
-+	},
-+	{ },
-+};
-+
-+static struct platform_device ap1000_uart = {
-+	.name			= "serial8250",
-+	.id			= PLAT8250_DEV_PLATFORM,
-+	.dev.platform_data	= ap1000_uart_data,
-+	.num_resources		= 2,
-+	.resource		= ap1000_uart_resources
-+};
-+
-+static struct platform_device *ap1000_devices[] __initdata = {
-+	&ap1000_flash,
-+	&ap1000_uart
-+};
-+
-+static char ap1000_mem_fixup[] __initdata = "mem=64M ";
-+
-+static void __init ap1000_fixup(struct machine_desc *desc,
-+		struct tag *tags, char **cmdline, struct meminfo *mi)
-+
-+{
-+	struct tag *t = tags;
-+	char *p = *cmdline;
-+
-+	/* Find the end of the tags table, taking note of any cmdline tag. */
-+	for (; t->hdr.size; t = tag_next(t)) {
-+		if (t->hdr.tag == ATAG_CMDLINE) {
-+			p = t->u.cmdline.cmdline;
-+		}
-+	}
-+
-+	/* Overwrite the end of the table with a new cmdline tag. */
-+	t->hdr.tag = ATAG_CMDLINE;
-+	t->hdr.size = (sizeof (struct tag_header) +
-+		strlen(ap1000_mem_fixup) + strlen(p) + 1 + 4) >> 2;
-+	strlcpy(t->u.cmdline.cmdline, ap1000_mem_fixup, COMMAND_LINE_SIZE);
-+	strlcpy(t->u.cmdline.cmdline + strlen(ap1000_mem_fixup), p,
-+		COMMAND_LINE_SIZE - strlen(ap1000_mem_fixup));
-+
-+	/* Terminate the table. */
-+	t = tag_next(t);
-+	t->hdr.tag = ATAG_NONE;
-+	t->hdr.size = 0;
-+}
-+
-+static void __init ap1000_init(void)
-+{
-+	ixp4xx_sys_init();
-+
-+	ap1000_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
-+	ap1000_flash_resource.end =
-+		IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
-+
-+	platform_add_devices(ap1000_devices, ARRAY_SIZE(ap1000_devices));
-+}
-+
-+#ifdef CONFIG_MACH_AP1000
-+MACHINE_START(AP1000, "Lanready AP-1000")
-+	/* Maintainer: Imre Kaloz <Kaloz@openwrt.org> */
-+	.phys_io	= IXP4XX_PERIPHERAL_BASE_PHYS,
-+	.io_pg_offst	= ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-+	.fixup		= ap1000_fixup,
-+	.map_io		= ixp4xx_map_io,
-+	.init_irq	= ixp4xx_init_irq,
-+	.timer		= &ixp4xx_timer,
-+	.boot_params	= 0x0100,
-+	.init_machine	= ap1000_init,
-+MACHINE_END
-+#endif
---- a/arch/arm/mach-ixp4xx/ixdp425-pci.c
-+++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c
-@@ -67,7 +67,7 @@ int __init ixdp425_pci_init(void)
- {
- 	if (machine_is_ixdp425() || machine_is_ixcdp1100() ||
- 			machine_is_ixdp465() || machine_is_kixrp435() ||
--			machine_is_compex())
-+			machine_is_compex() || machine_is_ap1000())
- 		pci_common_init(&ixdp425_pci);
- 	return 0;
- }
---- a/arch/arm/mach-ixp4xx/Kconfig
-+++ b/arch/arm/mach-ixp4xx/Kconfig
-@@ -105,6 +105,14 @@ config MACH_WRT300NV2
- 	  WRT300N v2 router. For more information on this
- 	  platform, see http://openwrt.org
- 
-+config MACH_AP1000
-+	bool "Lanready AP-1000"
-+	select PCI
-+	help
-+	  Say 'Y' here if you want your kernel to support Lanready's
-+	  AP1000 board. For more information on this
-+	  platform, see http://openwrt.org
-+
- config ARCH_IXDP425
- 	bool "IXDP425"
- 	help
---- a/arch/arm/mach-ixp4xx/Makefile
-+++ b/arch/arm/mach-ixp4xx/Makefile
-@@ -21,6 +21,7 @@ obj-pci-$(CONFIG_MACH_PRONGHORN)	+= pron
- obj-pci-$(CONFIG_MACH_SIDEWINDER)	+= sidewinder-pci.o
- obj-pci-$(CONFIG_MACH_COMPEX)		+= ixdp425-pci.o
- obj-pci-$(CONFIG_MACH_WRT300NV2)		+= wrt300nv2-pci.o
-+obj-pci-$(CONFIG_MACH_AP1000)		+= ixdp425-pci.o
- 
- obj-y	+= common.o
- 
-@@ -40,6 +41,7 @@ obj-$(CONFIG_MACH_PRONGHORN)	+= pronghor
- obj-$(CONFIG_MACH_SIDEWINDER)	+= sidewinder-setup.o
- obj-$(CONFIG_MACH_COMPEX)	+= compex-setup.o
- obj-$(CONFIG_MACH_WRT300NV2)	+= wrt300nv2-setup.o
-+obj-$(CONFIG_MACH_AP1000)	+= ap1000-setup.o
- 
- obj-$(CONFIG_PCI)		+= $(obj-pci-$(CONFIG_PCI)) common-pci.o
- obj-$(CONFIG_IXP4XX_QMGR)	+= ixp4xx_qmgr.o
diff --git a/target/linux/ixp4xx/patches-2.6.27/151-lanready_ap1000_mac_plat_info.patch b/target/linux/ixp4xx/patches-2.6.27/151-lanready_ap1000_mac_plat_info.patch
deleted file mode 100644
index a1214d5..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/151-lanready_ap1000_mac_plat_info.patch
+++ /dev/null
@@ -1,41 +0,0 @@
---- a/arch/arm/mach-ixp4xx/ap1000-setup.c
-+++ b/arch/arm/mach-ixp4xx/ap1000-setup.c
-@@ -90,9 +90,37 @@ static struct platform_device ap1000_uar
- 	.resource		= ap1000_uart_resources
- };
- 
-+/* Built-in 10/100 Ethernet MAC interfaces */
-+static struct eth_plat_info ap1000_plat_eth[] = {
-+	{
-+		.phy		= IXP4XX_ETH_PHY_MAX_ADDR,
-+		.phy_mask	= 0x1e,
-+		.rxq		= 3,
-+		.txreadyq	= 20,
-+	}, {
-+		.phy		= 5,
-+		.rxq		= 4,
-+		.txreadyq	= 21,
-+	}
-+};
-+
-+static struct platform_device ap1000_eth[] = {
-+	{
-+		.name			= "ixp4xx_eth",
-+		.id			= IXP4XX_ETH_NPEB,
-+		.dev.platform_data	= ap1000_plat_eth,
-+	}, {
-+		.name			= "ixp4xx_eth",
-+		.id			= IXP4XX_ETH_NPEC,
-+		.dev.platform_data	= ap1000_plat_eth + 1,
-+	}
-+};
-+
- static struct platform_device *ap1000_devices[] __initdata = {
- 	&ap1000_flash,
--	&ap1000_uart
-+	&ap1000_uart,
-+	&ap1000_eth[0],
-+	&ap1000_eth[1],
- };
- 
- static char ap1000_mem_fixup[] __initdata = "mem=64M ";
diff --git a/target/linux/ixp4xx/patches-2.6.27/162-wg302v1_mem_fixup.patch b/target/linux/ixp4xx/patches-2.6.27/162-wg302v1_mem_fixup.patch
deleted file mode 100644
index 684db44..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/162-wg302v1_mem_fixup.patch
+++ /dev/null
@@ -1,47 +0,0 @@
---- a/arch/arm/mach-ixp4xx/wg302v1-setup.c
-+++ b/arch/arm/mach-ixp4xx/wg302v1-setup.c
-@@ -115,6 +115,36 @@ static struct platform_device *wg302v1_d
- 	&wg302v1_eth[0],
- };
- 
-+static char wg302v1_mem_fixup[] __initdata = "mem=32M ";
-+
-+static void __init wg302v1_fixup(struct machine_desc *desc,
-+		struct tag *tags, char **cmdline, struct meminfo *mi)
-+
-+{
-+	struct tag *t = tags;
-+	char *p = *cmdline;
-+
-+	/* Find the end of the tags table, taking note of any cmdline tag. */
-+	for (; t->hdr.size; t = tag_next(t)) {
-+		if (t->hdr.tag == ATAG_CMDLINE) {
-+			p = t->u.cmdline.cmdline;
-+		}
-+	}
-+
-+	/* Overwrite the end of the table with a new cmdline tag. */
-+	t->hdr.tag = ATAG_CMDLINE;
-+	t->hdr.size = (sizeof (struct tag_header) +
-+		strlen(wg302v1_mem_fixup) + strlen(p) + 1 + 4) >> 2;
-+	strlcpy(t->u.cmdline.cmdline, wg302v1_mem_fixup, COMMAND_LINE_SIZE);
-+	strlcpy(t->u.cmdline.cmdline + strlen(wg302v1_mem_fixup), p,
-+		COMMAND_LINE_SIZE - strlen(wg302v1_mem_fixup));
-+
-+	/* Terminate the table. */
-+	t = tag_next(t);
-+	t->hdr.tag = ATAG_NONE;
-+	t->hdr.size = 0;
-+}
-+
- static void __init wg302v1_init(void)
- {
- 	ixp4xx_sys_init();
-@@ -133,6 +163,7 @@ MACHINE_START(WG302V1, "Netgear WG302 v1
- 	/* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
- 	.phys_io	= IXP4XX_PERIPHERAL_BASE_PHYS,
- 	.io_pg_offst	= ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-+	.fixup		= wg302v1_fixup,
- 	.map_io		= ixp4xx_map_io,
- 	.init_irq	= ixp4xx_init_irq,
- 	.timer		= &ixp4xx_timer,
diff --git a/target/linux/ixp4xx/patches-2.6.27/170-ixdpg425_mac_plat_info.patch b/target/linux/ixp4xx/patches-2.6.27/170-ixdpg425_mac_plat_info.patch
deleted file mode 100644
index 772b697..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/170-ixdpg425_mac_plat_info.patch
+++ /dev/null
@@ -1,41 +0,0 @@
---- a/arch/arm/mach-ixp4xx/coyote-setup.c
-+++ b/arch/arm/mach-ixp4xx/coyote-setup.c
-@@ -73,9 +73,37 @@ static struct platform_device coyote_uar
- 	.resource	= &coyote_uart_resource,
- };
- 
-+/* Built-in 10/100 Ethernet MAC interfaces */
-+static struct eth_plat_info ixdpg425_plat_eth[] = {
-+        {
-+                .phy            = 5,
-+                .rxq            = 3,
-+                .txreadyq       = 20,
-+        }, {
-+                .phy            = 4,
-+                .rxq            = 4,
-+                .txreadyq       = 21,
-+        }
-+};
-+
-+static struct platform_device ixdpg425_eth[] = {
-+	{
-+		.name			= "ixp4xx_eth",
-+		.id			= IXP4XX_ETH_NPEB,
-+		.dev.platform_data	= ixdpg425_plat_eth,
-+	}, {
-+		.name			= "ixp4xx_eth",
-+		.id			= IXP4XX_ETH_NPEC,
-+		.dev.platform_data	= ixdpg425_plat_eth + 1,
-+	}
-+};
-+
-+
- static struct platform_device *coyote_devices[] __initdata = {
- 	&coyote_flash,
--	&coyote_uart
-+	&coyote_uart,
-+	&ixdpg425_eth[0],
-+	&ixdpg425_eth[1],
- };
- 
- static void __init coyote_init(void)
diff --git a/target/linux/ixp4xx/patches-2.6.27/180-tw5334_support.patch b/target/linux/ixp4xx/patches-2.6.27/180-tw5334_support.patch
deleted file mode 100644
index 81010f9..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/180-tw5334_support.patch
+++ /dev/null
@@ -1,284 +0,0 @@
---- a/arch/arm/mach-ixp4xx/Kconfig
-+++ b/arch/arm/mach-ixp4xx/Kconfig
-@@ -158,6 +158,14 @@ config ARCH_PRPMC1100
- 	  PrPCM1100 Processor Mezanine Module. For more information on
- 	  this platform, see <file:Documentation/arm/IXP4xx>.
- 
-+config MACH_TW5334
-+	bool "Titan Wireless TW-533-4"
-+	select PCI
-+	help
-+	  Say 'Y' here if you want your kernel to support the Titan
-+	  Wireless TW533-4. For more information on this platform,
-+	  see http://openwrt.org
-+
- config MACH_NAS100D
- 	bool
- 	prompt "NAS100D"
---- a/arch/arm/mach-ixp4xx/Makefile
-+++ b/arch/arm/mach-ixp4xx/Makefile
-@@ -22,6 +22,7 @@ obj-pci-$(CONFIG_MACH_SIDEWINDER)	+= sid
- obj-pci-$(CONFIG_MACH_COMPEX)		+= ixdp425-pci.o
- obj-pci-$(CONFIG_MACH_WRT300NV2)		+= wrt300nv2-pci.o
- obj-pci-$(CONFIG_MACH_AP1000)		+= ixdp425-pci.o
-+obj-pci-$(CONFIG_MACH_TW5334)		+= tw5334-pci.o
- 
- obj-y	+= common.o
- 
-@@ -42,6 +43,7 @@ obj-$(CONFIG_MACH_SIDEWINDER)	+= sidewin
- obj-$(CONFIG_MACH_COMPEX)	+= compex-setup.o
- obj-$(CONFIG_MACH_WRT300NV2)	+= wrt300nv2-setup.o
- obj-$(CONFIG_MACH_AP1000)	+= ap1000-setup.o
-+obj-$(CONFIG_MACH_TW5334)	+= tw5334-setup.o
- 
- obj-$(CONFIG_PCI)		+= $(obj-pci-$(CONFIG_PCI)) common-pci.o
- obj-$(CONFIG_IXP4XX_QMGR)	+= ixp4xx_qmgr.o
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/tw5334-setup.c
-@@ -0,0 +1,162 @@
-+/*
-+ * arch/arm/mach-ixp4xx/tw5334-setup.c
-+ *
-+ * Board setup for the Titan Wireless TW-533-4
-+ *
-+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * based on coyote-setup.c:
-+ *      Copyright (C) 2003-2005 MontaVista Software, Inc.
-+ *
-+ * Author: Imre Kaloz <Kaloz@openwrt.org>
-+ */
-+
-+#include <linux/if_ether.h>
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/device.h>
-+#include <linux/serial.h>
-+#include <linux/tty.h>
-+#include <linux/serial_8250.h>
-+#include <linux/slab.h>
-+
-+#include <asm/types.h>
-+#include <asm/setup.h>
-+#include <asm/memory.h>
-+#include <mach/hardware.h>
-+#include <asm/irq.h>
-+#include <asm/mach-types.h>
-+#include <asm/mach/arch.h>
-+#include <asm/mach/flash.h>
-+
-+static struct flash_platform_data tw5334_flash_data = {
-+	.map_name	= "cfi_probe",
-+	.width		= 2,
-+};
-+
-+static struct resource tw5334_flash_resource = {
-+	.flags		= IORESOURCE_MEM,
-+};
-+
-+static struct platform_device tw5334_flash = {
-+	.name		= "IXP4XX-Flash",
-+	.id		= 0,
-+	.dev		= {
-+		.platform_data = &tw5334_flash_data,
-+	},
-+	.num_resources	= 1,
-+	.resource	= &tw5334_flash_resource,
-+};
-+
-+static struct resource tw5334_uart_resource = {
-+	.start	= IXP4XX_UART2_BASE_PHYS,
-+	.end	= IXP4XX_UART2_BASE_PHYS + 0x0fff,
-+	.flags	= IORESOURCE_MEM,
-+};
-+
-+static struct plat_serial8250_port tw5334_uart_data[] = {
-+	{
-+		.mapbase	= IXP4XX_UART2_BASE_PHYS,
-+		.membase	= (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
-+		.irq		= IRQ_IXP4XX_UART2,
-+		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+		.iotype		= UPIO_MEM,
-+		.regshift	= 2,
-+		.uartclk	= IXP4XX_UART_XTAL,
-+	},
-+	{ },
-+};
-+
-+static struct platform_device tw5334_uart = {
-+	.name		= "serial8250",
-+	.id		= PLAT8250_DEV_PLATFORM,
-+	.dev			= {
-+		.platform_data	= tw5334_uart_data,
-+	},
-+	.num_resources	= 1,
-+	.resource	= &tw5334_uart_resource,
-+};
-+
-+/* Built-in 10/100 Ethernet MAC interfaces */
-+static struct eth_plat_info tw5334_plat_eth[] = {
-+        {
-+                .phy            = 0,
-+                .rxq            = 3,
-+		.txreadyq	= 20,
-+        }, {
-+                .phy            = 1,
-+                .rxq            = 4,
-+		.txreadyq	= 21,
-+	}
-+};
-+
-+static struct platform_device tw5334_eth[] = {
-+        {
-+                .name                   = "ixp4xx_eth",
-+                .id                     = IXP4XX_ETH_NPEB,
-+                .dev.platform_data      = tw5334_plat_eth,
-+        }, {
-+                .name                   = "ixp4xx_eth",
-+                .id                     = IXP4XX_ETH_NPEC,
-+                .dev.platform_data      = tw5334_plat_eth + 1,
-+	}
-+};
-+
-+static struct platform_device *tw5334_devices[] __initdata = {
-+	&tw5334_flash,
-+	&tw5334_uart,
-+	&tw5334_eth[0],
-+	&tw5334_eth[1],
-+};
-+
-+static void __init tw5334_init(void)
-+{
-+	DECLARE_MAC_BUF(mac_buf);
-+	uint8_t __iomem *f;
-+	int i;
-+
-+	ixp4xx_sys_init();
-+
-+	tw5334_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
-+	tw5334_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
-+
-+	*IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
-+	*IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
-+
-+	platform_add_devices(tw5334_devices, ARRAY_SIZE(tw5334_devices));
-+
-+	/*
-+	 * Map in a portion of the flash and read the MAC addresses.
-+	 * Since it is stored in BE in the flash itself, we need to
-+	 * byteswap it if we're in LE mode.
-+	 */
-+	f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x1000000);
-+	if (f) {
-+		for (i = 0; i < 6; i++)
-+#ifdef __ARMEB__
-+		tw5334_plat_eth[0].hwaddr[i] = readb(f + 0xFC0422 + i);
-+		tw5334_plat_eth[1].hwaddr[i] = readb(f + 0xFC043B + i);
-+#else
-+		tw5334_plat_eth[0].hwaddr[i] = readb(f + 0xFC0422 + (i^3));
-+		tw5334_plat_eth[1].hwaddr[i] = readb(f + 0xFC043B + (i^3));
-+#endif
-+		iounmap(f);
-+	}
-+	printk(KERN_INFO "TW-533-4: Using MAC address %s for port 0\n",
-+		print_mac(mac_buf, tw5334_plat_eth[0].hwaddr));
-+	printk(KERN_INFO "TW-533-4: Using MAC address %s for port 1\n",
-+		print_mac(mac_buf, tw5334_plat_eth[1].hwaddr));
-+}
-+
-+#ifdef CONFIG_MACH_TW5334
-+MACHINE_START(TW5334, "Titan Wireless TW-533-4")
-+	/* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
-+	.phys_io	= IXP4XX_PERIPHERAL_BASE_PHYS,
-+	.io_pg_offst	= ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-+	.map_io		= ixp4xx_map_io,
-+	.init_irq	= ixp4xx_init_irq,
-+	.timer		= &ixp4xx_timer,
-+	.boot_params	= 0x0100,
-+	.init_machine	= tw5334_init,
-+MACHINE_END
-+#endif
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/tw5334-pci.c
-@@ -0,0 +1,69 @@
-+/*
-+ * arch/arch/mach-ixp4xx/tw5334-pci.c
-+ *
-+ * PCI setup routines for the Titan Wireless TW-533-4
-+ *
-+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * based on coyote-pci.c:
-+ *	Copyright (C) 2002 Jungo Software Technologies.
-+ *	Copyright (C) 2003 MontaVista Softwrae, Inc.
-+ *
-+ * Maintainer: Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/pci.h>
-+#include <linux/init.h>
-+#include <linux/irq.h>
-+
-+#include <asm/mach-types.h>
-+#include <mach/hardware.h>
-+
-+#include <asm/mach/pci.h>
-+
-+void __init tw5334_pci_preinit(void)
-+{
-+	set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW);
-+	set_irq_type(IRQ_IXP4XX_GPIO2, IRQ_TYPE_LEVEL_LOW);
-+	set_irq_type(IRQ_IXP4XX_GPIO1, IRQ_TYPE_LEVEL_LOW);
-+	set_irq_type(IRQ_IXP4XX_GPIO0, IRQ_TYPE_LEVEL_LOW);
-+
-+	ixp4xx_pci_preinit();
-+}
-+
-+static int __init tw5334_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-+{
-+	if (slot == 12)
-+		return IRQ_IXP4XX_GPIO6;
-+	else if (slot == 13)
-+		return IRQ_IXP4XX_GPIO2;
-+	else if (slot == 14)
-+		return IRQ_IXP4XX_GPIO1;
-+	else if (slot == 15)
-+		return IRQ_IXP4XX_GPIO0;
-+	else return -1;
-+}
-+
-+struct hw_pci tw5334_pci __initdata = {
-+	.nr_controllers = 1,
-+	.preinit =        tw5334_pci_preinit,
-+	.swizzle =        pci_std_swizzle,
-+	.setup =          ixp4xx_setup,
-+	.scan =           ixp4xx_scan_bus,
-+	.map_irq =        tw5334_map_irq,
-+};
-+
-+int __init tw5334_pci_init(void)
-+{
-+	if (machine_is_tw5334())
-+		pci_common_init(&tw5334_pci);
-+	return 0;
-+}
-+
-+subsys_initcall(tw5334_pci_init);
---- a/arch/arm/mach-ixp4xx/include/mach/uncompress.h
-+++ b/arch/arm/mach-ixp4xx/include/mach/uncompress.h
-@@ -42,7 +42,8 @@ static __inline__ void __arch_decomp_set
- 	 */
- 	if (machine_is_adi_coyote() || machine_is_gtwx5715() ||
- 			 machine_is_gateway7001() || machine_is_wg302v2() ||
--			 machine_is_pronghorn() || machine_is_pronghorn_metro() || machine_is_wrt300nv2())
-+			 machine_is_pronghorn() || machine_is_pronghorn_metro() || machine_is_wrt300nv2() ||
-+			 machine_is_tw5334())
- 		uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS;
- 	else
- 		uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS;
diff --git a/target/linux/ixp4xx/patches-2.6.27/185-mi424wr_support.patch b/target/linux/ixp4xx/patches-2.6.27/185-mi424wr_support.patch
deleted file mode 100644
index 025f7e9..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/185-mi424wr_support.patch
+++ /dev/null
@@ -1,465 +0,0 @@
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/mi424wr-pci.c
-@@ -0,0 +1,71 @@
-+/*
-+ * arch/arm/mach-ixp4xx/mi424wr-pci.c
-+ *
-+ * Actiontec MI424WR board-level PCI initialization
-+ *
-+ * Copyright (C) 2008 Jose Vasconcellos
-+ *
-+ * Maintainer: Jose Vasconcellos <jvasco@verizon.net>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/pci.h>
-+#include <linux/init.h>
-+#include <linux/irq.h>
-+
-+#include <asm/mach-types.h>
-+#include <asm/mach/pci.h>
-+
-+/* PCI controller GPIO to IRQ pin mappings
-+ * This information was obtained from Actiontec's GPL release.
-+ *
-+ *		INTA		INTB
-+ * SLOT 13	8		6
-+ * SLOT 14	7		8
-+ * SLOT 15	6		7
-+ */
-+
-+void __init mi424wr_pci_preinit(void)
-+{
-+	set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW);
-+	set_irq_type(IRQ_IXP4XX_GPIO7, IRQ_TYPE_LEVEL_LOW);
-+	set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW);
-+
-+	ixp4xx_pci_preinit();
-+}
-+
-+static int __init mi424wr_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-+{
-+	if (slot == 13)
-+		return IRQ_IXP4XX_GPIO8;
-+	if (slot == 14)
-+		return IRQ_IXP4XX_GPIO7;
-+	if (slot == 15)
-+		return IRQ_IXP4XX_GPIO6;
-+
-+	return -1;
-+}
-+
-+struct hw_pci mi424wr_pci __initdata = {
-+	.nr_controllers = 1,
-+	.preinit	= mi424wr_pci_preinit,
-+	.swizzle	= pci_std_swizzle,
-+	.setup		= ixp4xx_setup,
-+	.scan		= ixp4xx_scan_bus,
-+	.map_irq	= mi424wr_map_irq,
-+};
-+
-+int __init mi424wr_pci_init(void)
-+{
-+	if (machine_is_mi424wr())
-+		pci_common_init(&mi424wr_pci);
-+	return 0;
-+}
-+
-+subsys_initcall(mi424wr_pci_init);
-+
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/mi424wr-setup.c
-@@ -0,0 +1,344 @@
-+/*
-+ * arch/arm/mach-ixp4xx/mi424wr-setup.c
-+ *
-+ * Actiontec MI424-WR board setup
-+ * Copyright (c) 2008 Jose Vasconcellos
-+ *
-+ * Based on Gemtek GTWX5715 by
-+ * Copyright (C) 2004 George T. Joseph
-+ * Derived from Coyote
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version 2
-+ * of the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
-+ *
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/device.h>
-+#include <linux/serial.h>
-+#include <linux/serial_8250.h>
-+#include <linux/types.h>
-+#include <linux/memory.h>
-+#include <linux/leds.h>
-+#include <linux/spi/spi_gpio.h>
-+
-+#include <asm/setup.h>
-+#include <asm/irq.h>
-+#include <asm/io.h>
-+#include <asm/mach-types.h>
-+#include <asm/mach/arch.h>
-+#include <asm/mach/flash.h>
-+
-+/*
-+ * GPIO 2,3,4 and 9 are hard wired to the Micrel/Kendin KS8995M Switch
-+ * and operate as an SPI type interface.  The details of the interface
-+ * are available on Kendin/Micrel's web site.
-+ */
-+
-+#define MI424WR_KSSPI_SELECT		9
-+#define MI424WR_KSSPI_TXD		4
-+#define MI424WR_KSSPI_CLOCK		2
-+#define MI424WR_KSSPI_RXD		3
-+
-+/*
-+ * The "reset" button is wired to GPIO 10.
-+ * The GPIO is brought "low" when the button is pushed.
-+ */
-+
-+#define MI424WR_BUTTON_GPIO	10
-+#define MI424WR_BUTTON_IRQ	IRQ_IXP4XX_GPIO10
-+
-+#define MI424WR_MOCA_WAN_LED	11
-+
-+/* Latch on CS1 - taken from Actiontec's 2.4 source code
-+ * 
-+ * default latch value
-+ * 0  - power alarm led (red)           0 (off)
-+ * 1  - power led (green)               0 (off)
-+ * 2  - wireless led    (green)         1 (off)
-+ * 3  - no internet led (red)           0 (off)
-+ * 4  - internet ok led (green)         0 (off)
-+ * 5  - moca LAN                        0 (off)
-+ * 6  - WAN alarm led (red)		0 (off)
-+ * 7  - PCI reset                       1 (not reset)
-+ * 8  - IP phone 1 led (green)          1 (off)
-+ * 9  - IP phone 2 led (green)          1 (off)
-+ * 10 - VOIP ready led (green)          1 (off)
-+ * 11 - PSTN relay 1 control            0 (PSTN)
-+ * 12 - PSTN relay 1 control            0 (PSTN)
-+ * 13 - N/A
-+ * 14 - N/A
-+ * 15 - N/A
-+ */
-+
-+#define MI424WR_LATCH_MASK              0x04
-+#define MI424WR_LATCH_DEFAULT           0x1f86
-+
-+#define MI424WR_LATCH_ALARM_LED         0x00
-+#define MI424WR_LATCH_POWER_LED         0x01
-+#define MI424WR_LATCH_WIRELESS_LED      0x02
-+#define MI424WR_LATCH_INET_DOWN_LED     0x03
-+#define MI424WR_LATCH_INET_OK_LED       0x04
-+#define MI424WR_LATCH_MOCA_LAN_LED      0x05
-+#define MI424WR_LATCH_WAN_ALARM_LED     0x06
-+#define MI424WR_LATCH_PCI_RESET         0x07
-+#define MI424WR_LATCH_PHONE1_LED        0x08
-+#define MI424WR_LATCH_PHONE2_LED        0x09
-+#define MI424WR_LATCH_VOIP_LED          0x10
-+#define MI424WR_LATCH_PSTN_RELAY1       0x11
-+#define MI424WR_LATCH_PSTN_RELAY2       0x12
-+
-+/* initialize CS1 to default timings, Intel style, 16-bit bus */
-+#define MI424WR_CS1_CONFIG	0x80000002
-+
-+/* Define both UARTs but they are not easily accessible.
-+ */
-+
-+static struct resource mi424wr_uart_resources[] = {
-+	{
-+		.start	= IXP4XX_UART1_BASE_PHYS,
-+		.end	= IXP4XX_UART1_BASE_PHYS + 0x0fff,
-+		.flags	= IORESOURCE_MEM,
-+	},
-+	{
-+		.start	= IXP4XX_UART2_BASE_PHYS,
-+		.end	= IXP4XX_UART2_BASE_PHYS + 0x0fff,
-+		.flags	= IORESOURCE_MEM,
-+	}
-+};
-+
-+
-+static struct plat_serial8250_port mi424wr_uart_platform_data[] = {
-+	{
-+		.mapbase	= IXP4XX_UART1_BASE_PHYS,
-+		.membase	= (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
-+		.irq		= IRQ_IXP4XX_UART1,
-+		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+		.iotype		= UPIO_MEM,
-+		.regshift	= 2,
-+		.uartclk	= IXP4XX_UART_XTAL,
-+	},
-+	{
-+		.mapbase	= IXP4XX_UART2_BASE_PHYS,
-+		.membase	= (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
-+		.irq		= IRQ_IXP4XX_UART2,
-+		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+		.iotype		= UPIO_MEM,
-+		.regshift	= 2,
-+		.uartclk	= IXP4XX_UART_XTAL,
-+	},
-+	{ },
-+};
-+
-+static struct platform_device mi424wr_uart_device = {
-+	.name		= "serial8250",
-+	.id		= PLAT8250_DEV_PLATFORM,
-+	.dev.platform_data	= mi424wr_uart_platform_data,
-+	.num_resources	= ARRAY_SIZE(mi424wr_uart_resources),
-+	.resource	= mi424wr_uart_resources,
-+};
-+
-+static struct flash_platform_data mi424wr_flash_data = {
-+	.map_name	= "cfi_probe",
-+	.width		= 2,
-+};
-+
-+static struct resource mi424wr_flash_resource = {
-+	.flags		= IORESOURCE_MEM,
-+};
-+
-+static struct platform_device mi424wr_flash = {
-+	.name		= "IXP4XX-Flash",
-+	.id		= 0,
-+	.dev.platform_data = &mi424wr_flash_data,
-+	.num_resources	= 1,
-+	.resource	= &mi424wr_flash_resource,
-+};
-+
-+static int mi424wr_spi_boardinfo_setup(struct spi_board_info *bi,
-+		struct spi_master *master, void *data)
-+{
-+
-+	strlcpy(bi->modalias, "spi-ks8995", sizeof(bi->modalias));
-+
-+	bi->max_speed_hz = 5000000 /* Hz */;
-+	bi->bus_num = master->bus_num;
-+	bi->mode = SPI_MODE_0;
-+
-+	return 0;
-+}
-+
-+static struct spi_gpio_platform_data mi424wr_spi_bus_data = {
-+	.pin_cs			= MI424WR_KSSPI_SELECT,
-+	.pin_clk		= MI424WR_KSSPI_CLOCK,
-+	.pin_miso		= MI424WR_KSSPI_RXD,
-+	.pin_mosi		= MI424WR_KSSPI_TXD,
-+	.cs_activelow		= 1,
-+	.no_spi_delay		= 1,
-+	.boardinfo_setup	= mi424wr_spi_boardinfo_setup,
-+};
-+
-+static struct gpio_led mi424wr_gpio_led[] = {
-+	{
-+		.name		= "moca-wan",	/* green led */
-+		.gpio		= MI424WR_MOCA_WAN_LED,
-+		.active_low	= 0,
-+	}
-+};
-+
-+static struct gpio_led_platform_data mi424wr_gpio_leds_data = {
-+	.num_leds	= 1,
-+	.leds		= mi424wr_gpio_led,
-+};
-+
-+static struct platform_device mi424wr_gpio_leds = {
-+	.name		= "leds-gpio",
-+	.id		= -1,
-+	.dev.platform_data = &mi424wr_gpio_leds_data,
-+};
-+
-+static uint16_t latch_value = MI424WR_LATCH_DEFAULT;
-+static uint16_t __iomem *iobase;
-+
-+static void mi424wr_latch_set_led(u8 bit, enum led_brightness value)
-+{
-+
-+	if (((MI424WR_LATCH_MASK >> bit) & 1) ^ (value == LED_OFF))
-+		latch_value &= ~(0x1 << bit);
-+	else
-+		latch_value |= (0x1 << bit);
-+
-+	__raw_writew(latch_value, iobase);
-+
-+}
-+
-+static struct latch_led mi424wr_latch_led[] = {
-+	{
-+		.name	= "power-alarm",
-+		.bit	= MI424WR_LATCH_ALARM_LED,
-+	},
-+	{
-+		.name	= "power-ok",
-+		.bit	= MI424WR_LATCH_POWER_LED,
-+	},
-+	{
-+		.name	= "wireless",	/* green led */
-+		.bit	= MI424WR_LATCH_WIRELESS_LED,
-+	},
-+	{
-+		.name	= "inet-down",	/* red led */
-+		.bit	= MI424WR_LATCH_INET_DOWN_LED,
-+	},
-+	{
-+		.name	= "inet-up",	/* green led */
-+		.bit	= MI424WR_LATCH_INET_OK_LED,
-+	},
-+	{
-+		.name	= "moca-lan",	/* green led */
-+		.bit	= MI424WR_LATCH_MOCA_LAN_LED,
-+	},
-+	{
-+		.name	= "wan-alarm",	/* red led */
-+		.bit	= MI424WR_LATCH_WAN_ALARM_LED,
-+	}
-+};
-+
-+static struct latch_led_platform_data mi424wr_latch_leds_data = {
-+	.num_leds	= ARRAY_SIZE(mi424wr_latch_led),
-+	.mem		= 0x51000000,
-+	.leds		= mi424wr_latch_led,
-+	.set_led        = mi424wr_latch_set_led,
-+};
-+
-+static struct platform_device mi424wr_latch_leds = {
-+	.name		= "leds-latch",
-+	.id		= -1,
-+	.dev.platform_data = &mi424wr_latch_leds_data,
-+};
-+
-+static struct platform_device mi424wr_spi_bus = {
-+	.name		= "spi-gpio",
-+	.id		= 0,
-+	.dev.platform_data = &mi424wr_spi_bus_data,
-+};
-+
-+static struct eth_plat_info mi424wr_npeb_data = {
-+	.phy		= 17,	/* KS8721 */
-+	.rxq		= 3,
-+	.txreadyq	= 20,
-+};
-+
-+static struct eth_plat_info mi424wr_npec_data = {
-+	.phy		= IXP4XX_ETH_PHY_MAX_ADDR,
-+	.phy_mask	= 0x1e, /* ports 1-4 of the KS8995 switch */
-+	.rxq		= 4,
-+	.txreadyq	= 21,
-+};
-+
-+static struct platform_device mi424wr_npe_devices[] = {
-+	{
-+		.name			= "ixp4xx_eth",
-+		.id			= IXP4XX_ETH_NPEC,
-+		.dev.platform_data	= &mi424wr_npec_data,
-+	}, {
-+		.name			= "ixp4xx_eth",
-+		.id			= IXP4XX_ETH_NPEB,
-+		.dev.platform_data	= &mi424wr_npeb_data,
-+	}
-+};
-+
-+static struct platform_device *mi424wr_devices[] __initdata = {
-+	&mi424wr_uart_device,
-+	&mi424wr_flash,
-+	&mi424wr_gpio_leds,
-+	&mi424wr_latch_leds,
-+	&mi424wr_spi_bus,
-+	&mi424wr_npe_devices[0],
-+	&mi424wr_npe_devices[1],
-+};
-+
-+static void __init mi424wr_init(void)
-+{
-+	ixp4xx_sys_init();
-+
-+	mi424wr_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
-+	mi424wr_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_8M - 1;
-+
-+	*IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
-+	*IXP4XX_EXP_CS1 = MI424WR_CS1_CONFIG;
-+
-+	/* configure button as input
-+	 */
-+	gpio_line_config(MI424WR_BUTTON_GPIO, IXP4XX_GPIO_IN);
-+
-+	/* Initialize LEDs and enables PCI bus.
-+	 */
-+	iobase = ioremap_nocache(IXP4XX_EXP_BUS_BASE(1), 0x1000);
-+	__raw_writew(latch_value, iobase);
-+
-+	platform_add_devices(mi424wr_devices, ARRAY_SIZE(mi424wr_devices));
-+}
-+
-+
-+MACHINE_START(MI424WR, "Actiontec MI424WR")
-+	/* Maintainer: Jose Vasconcellos */
-+	.phys_io	= IXP4XX_UART2_BASE_PHYS,
-+	.io_pg_offst	= ((IXP4XX_UART2_BASE_VIRT) >> 18) & 0xfffc,
-+	.map_io		= ixp4xx_map_io,
-+	.init_irq	= ixp4xx_init_irq,
-+	.timer		= &ixp4xx_timer,
-+	.boot_params	= 0x0100,
-+	.init_machine	= mi424wr_init,
-+MACHINE_END
-+
---- a/arch/arm/mach-ixp4xx/Makefile
-+++ b/arch/arm/mach-ixp4xx/Makefile
-@@ -23,6 +23,7 @@ obj-pci-$(CONFIG_MACH_COMPEX)		+= ixdp42
- obj-pci-$(CONFIG_MACH_WRT300NV2)		+= wrt300nv2-pci.o
- obj-pci-$(CONFIG_MACH_AP1000)		+= ixdp425-pci.o
- obj-pci-$(CONFIG_MACH_TW5334)		+= tw5334-pci.o
-+obj-pci-$(CONFIG_MACH_MI424WR)		+= mi424wr-pci.o
- 
- obj-y	+= common.o
- 
-@@ -44,6 +45,7 @@ obj-$(CONFIG_MACH_COMPEX)	+= compex-setu
- obj-$(CONFIG_MACH_WRT300NV2)	+= wrt300nv2-setup.o
- obj-$(CONFIG_MACH_AP1000)	+= ap1000-setup.o
- obj-$(CONFIG_MACH_TW5334)	+= tw5334-setup.o
-+obj-$(CONFIG_MACH_MI424WR)	+= mi424wr-setup.o
- 
- obj-$(CONFIG_PCI)		+= $(obj-pci-$(CONFIG_PCI)) common-pci.o
- obj-$(CONFIG_IXP4XX_QMGR)	+= ixp4xx_qmgr.o
---- a/arch/arm/mach-ixp4xx/Kconfig
-+++ b/arch/arm/mach-ixp4xx/Kconfig
-@@ -229,6 +229,13 @@ config MACH_GTWX5715
- 		"High Speed" UART is n/c (as far as I can tell)
- 		20 Pin ARM/Xscale JTAG interface on J2
- 
-+config MACH_MI424WR
-+	bool "Actiontec MI424WR"
-+	depends on ARCH_IXP4XX
-+	select PCI
-+	help
-+		Add support for the Actiontec MI424-WR.
-+
- comment "IXP4xx Options"
- 
- config DMABOUNCE
---- a/arch/arm/configs/ixp4xx_defconfig
-+++ b/arch/arm/configs/ixp4xx_defconfig
-@@ -172,6 +172,7 @@ CONFIG_MACH_FSG=y
- CONFIG_CPU_IXP46X=y
- CONFIG_CPU_IXP43X=y
- CONFIG_MACH_GTWX5715=y
-+CONFIG_MACH_MI424WR=y
- 
- #
- # IXP4xx Options
diff --git a/target/linux/ixp4xx/patches-2.6.27/190-cambria_support.patch b/target/linux/ixp4xx/patches-2.6.27/190-cambria_support.patch
deleted file mode 100644
index d1a9f85..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/190-cambria_support.patch
+++ /dev/null
@@ -1,553 +0,0 @@
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/cambria-pci.c
-@@ -0,0 +1,74 @@
-+/*
-+ * arch/arch/mach-ixp4xx/cambria-pci.c
-+ *
-+ * PCI setup routines for Gateworks Cambria series
-+ *
-+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * based on coyote-pci.c:
-+ *	Copyright (C) 2002 Jungo Software Technologies.
-+ *	Copyright (C) 2003 MontaVista Softwrae, Inc.
-+ *
-+ * Maintainer: Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/pci.h>
-+#include <linux/init.h>
-+#include <linux/irq.h>
-+
-+#include <asm/mach-types.h>
-+#include <mach/hardware.h>
-+#include <asm/irq.h>
-+
-+#include <asm/mach/pci.h>
-+
-+extern void ixp4xx_pci_preinit(void);
-+extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
-+extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
-+
-+void __init cambria_pci_preinit(void)
-+{
-+	set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW);
-+	set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW);
-+	set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW);
-+	set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW);
-+
-+	ixp4xx_pci_preinit();
-+}
-+
-+static int __init cambria_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-+{
-+	if (slot == 1)
-+		return IRQ_IXP4XX_GPIO11;
-+	else if (slot == 2)
-+		return IRQ_IXP4XX_GPIO10;
-+	else if (slot == 3)
-+		return IRQ_IXP4XX_GPIO9;
-+	else if (slot == 4)
-+		return IRQ_IXP4XX_GPIO8;
-+	else return -1;
-+}
-+
-+struct hw_pci cambria_pci __initdata = {
-+	.nr_controllers = 1,
-+	.preinit =        cambria_pci_preinit,
-+	.swizzle =        pci_std_swizzle,
-+	.setup =          ixp4xx_setup,
-+	.scan =           ixp4xx_scan_bus,
-+	.map_irq =        cambria_map_irq,
-+};
-+
-+int __init cambria_pci_init(void)
-+{
-+	if (machine_is_cambria())
-+		pci_common_init(&cambria_pci);
-+	return 0;
-+}
-+
-+subsys_initcall(cambria_pci_init);
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/cambria-setup.c
-@@ -0,0 +1,429 @@
-+/*
-+ * arch/arm/mach-ixp4xx/cambria-setup.c
-+ *
-+ * Board setup for the Gateworks Cambria series
-+ *
-+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * based on coyote-setup.c:
-+ *      Copyright (C) 2003-2005 MontaVista Software, Inc.
-+ *
-+ * Author: Imre Kaloz <kaloz@openwrt.org>
-+ */
-+
-+#include <linux/device.h>
-+#include <linux/i2c.h>
-+#include <linux/i2c-gpio.h>
-+#include <linux/i2c/at24.h>
-+#include <linux/if_ether.h>
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/leds.h>
-+#include <linux/memory.h>
-+#include <linux/netdevice.h>
-+#include <linux/serial.h>
-+#include <linux/serial_8250.h>
-+#include <linux/slab.h>
-+#include <linux/socket.h>
-+#include <linux/types.h>
-+#include <linux/tty.h>
-+
-+#include <mach/hardware.h>
-+#include <asm/irq.h>
-+#include <asm/mach-types.h>
-+#include <asm/mach/arch.h>
-+#include <asm/mach/flash.h>
-+#include <asm/setup.h>
-+
-+struct cambria_board_info {
-+	unsigned char	*model;
-+	void		(*setup)(void);
-+};
-+
-+static struct cambria_board_info *cambria_info __initdata;
-+
-+static struct flash_platform_data cambria_flash_data = {
-+	.map_name	= "cfi_probe",
-+	.width		= 2,
-+};
-+
-+static struct resource cambria_flash_resource = {
-+	.flags		= IORESOURCE_MEM,
-+};
-+
-+static struct platform_device cambria_flash = {
-+	.name		= "IXP4XX-Flash",
-+	.id		= 0,
-+	.dev		= {
-+		.platform_data = &cambria_flash_data,
-+	},
-+	.num_resources	= 1,
-+	.resource	= &cambria_flash_resource,
-+};
-+
-+static struct i2c_gpio_platform_data cambria_i2c_gpio_data = {
-+	.sda_pin	= 7,
-+	.scl_pin	= 6,
-+};
-+
-+static struct platform_device cambria_i2c_gpio = {
-+	.name		= "i2c-gpio",
-+	.id		= 0,
-+	.dev = {
-+		.platform_data	= &cambria_i2c_gpio_data,
-+	},
-+};
-+
-+static struct eth_plat_info cambria_npec_data = {
-+	.phy		= 1,
-+	.rxq		= 4,
-+	.txreadyq	= 21,
-+};
-+
-+static struct eth_plat_info cambria_npea_data = {
-+	.phy		= 2,
-+	.rxq		= 2,
-+	.txreadyq	= 19,
-+};
-+
-+static struct platform_device cambria_npec_device = {
-+	.name			= "ixp4xx_eth",
-+	.id			= IXP4XX_ETH_NPEC,
-+	.dev.platform_data	= &cambria_npec_data,
-+};
-+
-+static struct platform_device cambria_npea_device = {
-+	.name			= "ixp4xx_eth",
-+	.id			= IXP4XX_ETH_NPEA,
-+	.dev.platform_data	= &cambria_npea_data,
-+};
-+
-+static struct resource cambria_uart_resource = {
-+	.start	= IXP4XX_UART1_BASE_PHYS,
-+	.end	= IXP4XX_UART1_BASE_PHYS + 0x0fff,
-+	.flags	= IORESOURCE_MEM,
-+};
-+
-+static struct plat_serial8250_port cambria_uart_data[] = {
-+	{
-+		.mapbase	= IXP4XX_UART1_BASE_PHYS,
-+		.membase	= (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
-+		.irq		= IRQ_IXP4XX_UART1,
-+		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+		.iotype		= UPIO_MEM,
-+		.regshift	= 2,
-+		.uartclk	= IXP4XX_UART_XTAL,
-+	},
-+	{ },
-+};
-+
-+static struct platform_device cambria_uart = {
-+	.name		= "serial8250",
-+	.id		= PLAT8250_DEV_PLATFORM,
-+	.dev = {
-+		.platform_data	= cambria_uart_data,
-+	},
-+	.num_resources	= 1,
-+	.resource	= &cambria_uart_resource,
-+};
-+
-+static struct resource cambria_pata_resources[] = {
-+	{
-+		.flags	= IORESOURCE_MEM
-+	},
-+	{
-+		.flags	= IORESOURCE_MEM,
-+	},
-+	{
-+		.name	= "intrq",
-+		.start	= IRQ_IXP4XX_GPIO12,
-+		.end	= IRQ_IXP4XX_GPIO12,
-+		.flags	= IORESOURCE_IRQ,
-+	},
-+};
-+
-+static struct ixp4xx_pata_data cambria_pata_data = {
-+	.cs0_bits	= 0xbfff3c03,
-+	.cs1_bits	= 0xbfff3c03,
-+};
-+
-+static struct platform_device cambria_pata = {
-+	.name			= "pata_ixp4xx_cf",
-+	.id			= 0,
-+	.dev.platform_data      = &cambria_pata_data,
-+	.num_resources		= ARRAY_SIZE(cambria_pata_resources),
-+	.resource		= cambria_pata_resources,
-+};
-+
-+static struct gpio_led cambria_gpio_leds[] = {
-+	{
-+		.name		= "user",  /* green led */
-+		.gpio		= 5,
-+		.active_low 	= 1,
-+	}
-+};
-+
-+static struct gpio_led_platform_data cambria_gpio_leds_data = {
-+	.num_leds	= 1,
-+	.leds		= cambria_gpio_leds,
-+};
-+
-+static struct platform_device cambria_gpio_leds_device = {
-+	.name		= "leds-gpio",
-+	.id		= -1,
-+	.dev.platform_data = &cambria_gpio_leds_data,
-+};
-+
-+static struct latch_led cambria_latch_leds[] = {
-+	{
-+		.name	= "ledA",  /* green led */
-+		.bit	= 0,
-+	},
-+	{
-+		.name	= "ledB",  /* green led */
-+		.bit	= 1,
-+	},
-+	{
-+		.name	= "ledC",  /* green led */
-+		.bit	= 2,
-+	},
-+	{
-+		.name	= "ledD",  /* green led */
-+		.bit	= 3,
-+	},
-+	{
-+		.name	= "ledE",  /* green led */
-+		.bit	= 4,
-+	},
-+	{
-+		.name	= "ledF",  /* green led */
-+		.bit	= 5,
-+	},
-+	{
-+		.name	= "ledG",  /* green led */
-+		.bit	= 6,
-+	},
-+	{
-+		.name	= "ledH",  /* green led */
-+		.bit	= 7,
-+	}
-+};
-+
-+static struct latch_led_platform_data cambria_latch_leds_data = {
-+	.num_leds	= 8,
-+	.leds		= cambria_latch_leds,
-+	.mem		= 0x53F40000,
-+};
-+
-+static struct platform_device cambria_latch_leds_device = {
-+	.name		= "leds-latch",
-+	.id		= -1,
-+	.dev.platform_data = &cambria_latch_leds_data,
-+};
-+
-+static struct resource cambria_usb0_resources[] = {
-+	{
-+		.start	= 0xCD000000,
-+		.end	= 0xCD000300,
-+		.flags	= IORESOURCE_MEM,
-+	},
-+	{
-+		.start	= 32,
-+		.flags	= IORESOURCE_IRQ,
-+	},
-+};
-+
-+static struct resource cambria_usb1_resources[] = {
-+	{
-+		.start	= 0xCE000000,
-+		.end	= 0xCE000300,
-+		.flags	= IORESOURCE_MEM,
-+	},
-+	{
-+		.start	= 33,
-+		.flags	= IORESOURCE_IRQ,
-+	},
-+};
-+
-+static u64 ehci_dma_mask = ~(u32)0;
-+
-+static struct platform_device cambria_usb0_device =  {
-+	.name		= "ixp4xx-ehci",
-+	.id		= 0,
-+	.resource	= cambria_usb0_resources,
-+	.num_resources	= ARRAY_SIZE(cambria_usb0_resources),
-+	.dev = {
-+		.dma_mask		= &ehci_dma_mask,
-+		.coherent_dma_mask	= 0xffffffff,
-+	},
-+};
-+
-+static struct platform_device cambria_usb1_device = {
-+	.name		= "ixp4xx-ehci",
-+	.id		= 1,
-+	.resource	= cambria_usb1_resources,
-+	.num_resources	= ARRAY_SIZE(cambria_usb1_resources),
-+	.dev = {
-+		.dma_mask		= &ehci_dma_mask,
-+		.coherent_dma_mask	= 0xffffffff,
-+	},
-+};
-+
-+static struct platform_device *cambria_devices[] __initdata = {
-+	&cambria_i2c_gpio,
-+	&cambria_flash,
-+	&cambria_uart,
-+};
-+
-+static void __init cambria_gw23xx_setup(void)
-+{
-+	platform_device_register(&cambria_npec_device);
-+	platform_device_register(&cambria_npea_device);
-+}
-+
-+static void __init cambria_gw2350_setup(void)
-+{
-+	platform_device_register(&cambria_npec_device);
-+	platform_device_register(&cambria_npea_device);
-+
-+	platform_device_register(&cambria_usb0_device);
-+	platform_device_register(&cambria_usb1_device);
-+
-+	platform_device_register(&cambria_gpio_leds_device);
-+}
-+
-+static void __init cambria_gw2358_setup(void)
-+{
-+	platform_device_register(&cambria_npec_device);
-+	platform_device_register(&cambria_npea_device);
-+
-+	platform_device_register(&cambria_usb0_device);
-+	platform_device_register(&cambria_usb1_device);
-+
-+	platform_device_register(&cambria_pata);
-+
-+	platform_device_register(&cambria_latch_leds_device);
-+}
-+
-+static struct cambria_board_info cambria_boards[] __initdata = {
-+	{
-+		.model	= "GW2350",
-+		.setup	= cambria_gw2350_setup,
-+	}, {
-+		.model	= "GW2358",
-+		.setup	= cambria_gw2358_setup,
-+	}
-+};
-+
-+static struct cambria_board_info * __init cambria_find_board_info(char *model)
-+{
-+	int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(cambria_boards); i++) {
-+		struct cambria_board_info *info = &cambria_boards[i];
-+		if (strcmp(info->model, model) == 0)
-+			return info;
-+	}
-+
-+	return NULL;
-+}
-+
-+static struct at24_iface *at24_if;
-+
-+static int at24_setup(struct at24_iface *iface, void *context)
-+{
-+	char mac_addr[ETH_ALEN];
-+	char model[6];
-+
-+	at24_if = iface;
-+
-+	/* Read MAC addresses */
-+	if (at24_if->read(at24_if, mac_addr, 0x0, 6) == 6) {
-+		memcpy(&cambria_npec_data.hwaddr, mac_addr, ETH_ALEN);
-+	}
-+	if (at24_if->read(at24_if, mac_addr, 0x6, 6) == 6) {
-+		memcpy(&cambria_npea_data.hwaddr, mac_addr, ETH_ALEN);
-+	}
-+
-+	/* Read the first 6 bytes of the model number */
-+	if (at24_if->read(at24_if, model, 0x20, 6) == 6) {
-+		cambria_info = cambria_find_board_info(model);
-+	}
-+
-+	return 0;
-+}
-+
-+static struct at24_platform_data cambria_eeprom_info = {
-+	.byte_len	= 1024,
-+	.page_size	= 16,
-+	.flags		= AT24_FLAG_READONLY,
-+	.setup		= at24_setup,
-+};
-+
-+static struct i2c_board_info __initdata cambria_i2c_board_info[] = {
-+	{
-+		I2C_BOARD_INFO("ds1672", 0x68),
-+	},
-+	{
-+		I2C_BOARD_INFO("ad7418", 0x28),
-+	},
-+	{
-+		I2C_BOARD_INFO("24c08", 0x51),
-+		.platform_data	= &cambria_eeprom_info
-+	},
-+};
-+
-+static void __init cambria_init(void)
-+{
-+	ixp4xx_sys_init();
-+
-+	cambria_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
-+	cambria_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
-+
-+	*IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
-+	*IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
-+
-+	platform_add_devices(cambria_devices, ARRAY_SIZE(cambria_devices));
-+
-+	cambria_pata_resources[0].start = 0x53e00000;
-+	cambria_pata_resources[0].end = 0x53e3ffff;
-+
-+	cambria_pata_resources[1].start = 0x53e40000;
-+	cambria_pata_resources[1].end = 0x53e7ffff;
-+
-+	cambria_pata_data.cs0_cfg = IXP4XX_EXP_CS3;
-+	cambria_pata_data.cs1_cfg = IXP4XX_EXP_CS3;
-+
-+	i2c_register_board_info(0, cambria_i2c_board_info,
-+				ARRAY_SIZE(cambria_i2c_board_info));
-+}
-+
-+static int __init cambria_model_setup(void)
-+{
-+	if (!machine_is_cambria())
-+		return 0;
-+
-+	if (cambria_info) {
-+		printk(KERN_DEBUG "Running on Gateworks Cambria %s\n",
-+				cambria_info->model);
-+		cambria_info->setup();
-+	} else {
-+		printk(KERN_INFO "Unknown/missing Cambria model number"
-+				" -- defaults will be used\n");
-+		cambria_gw23xx_setup();
-+	}
-+
-+	return 0;
-+}
-+late_initcall(cambria_model_setup);
-+
-+MACHINE_START(CAMBRIA, "Gateworks Cambria series")
-+	/* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
-+	.phys_io	= IXP4XX_PERIPHERAL_BASE_PHYS,
-+	.io_pg_offst	= ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-+	.map_io		= ixp4xx_map_io,
-+	.init_irq	= ixp4xx_init_irq,
-+	.timer		= &ixp4xx_timer,
-+	.boot_params	= 0x0100,
-+	.init_machine	= cambria_init,
-+MACHINE_END
---- a/arch/arm/mach-ixp4xx/Kconfig
-+++ b/arch/arm/mach-ixp4xx/Kconfig
-@@ -25,6 +25,14 @@ config MACH_AVILA
- 	  Avila Network Platform. For more information on this platform,
- 	  see <file:Documentation/arm/IXP4xx>.
- 
-+config MACH_CAMBRIA
-+	bool "Cambria"
-+	select PCI
-+	help
-+	  Say 'Y' here if you want your kernel to support the Gateworks
-+	  Cambria series. For more information on this platform,
-+	  see <file:Documentation/arm/IXP4xx>.
-+
- config MACH_LOFT
-     bool "Loft"
-     depends on MACH_AVILA
-@@ -208,7 +216,7 @@ config CPU_IXP46X
- 
- config CPU_IXP43X
- 	bool
--	depends on MACH_KIXRP435
-+	depends on MACH_KIXRP435 || MACH_CAMBRIA
- 	default y
- 
- config MACH_GTWX5715
---- a/arch/arm/mach-ixp4xx/Makefile
-+++ b/arch/arm/mach-ixp4xx/Makefile
-@@ -7,6 +7,7 @@ obj-pci-n	:=
- 
- obj-pci-$(CONFIG_ARCH_IXDP4XX)		+= ixdp425-pci.o
- obj-pci-$(CONFIG_MACH_AVILA)		+= avila-pci.o
-+obj-pci-$(CONFIG_MACH_CAMBRIA)		+= cambria-pci.o
- obj-pci-$(CONFIG_MACH_IXDPG425)		+= ixdpg425-pci.o
- obj-pci-$(CONFIG_ARCH_ADI_COYOTE)	+= coyote-pci.o
- obj-pci-$(CONFIG_MACH_GTWX5715)		+= gtwx5715-pci.o
-@@ -29,6 +30,7 @@ obj-y	+= common.o
- 
- obj-$(CONFIG_ARCH_IXDP4XX)	+= ixdp425-setup.o
- obj-$(CONFIG_MACH_AVILA)	+= avila-setup.o
-+obj-$(CONFIG_MACH_CAMBRIA)	+= cambria-setup.o
- obj-$(CONFIG_MACH_IXDPG425)	+= coyote-setup.o
- obj-$(CONFIG_ARCH_ADI_COYOTE)	+= coyote-setup.o
- obj-$(CONFIG_MACH_GTWX5715)	+= gtwx5715-setup.o
diff --git a/target/linux/ixp4xx/patches-2.6.27/191-cambria_optional_uart.patch b/target/linux/ixp4xx/patches-2.6.27/191-cambria_optional_uart.patch
deleted file mode 100644
index 946d685..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/191-cambria_optional_uart.patch
+++ /dev/null
@@ -1,101 +0,0 @@
---- a/arch/arm/mach-ixp4xx/cambria-setup.c
-+++ b/arch/arm/mach-ixp4xx/cambria-setup.c
-@@ -34,6 +34,7 @@
- #include <asm/mach/arch.h>
- #include <asm/mach/flash.h>
- #include <asm/setup.h>
-+#include <linux/irq.h>
- 
- struct cambria_board_info {
- 	unsigned char	*model;
-@@ -127,6 +128,43 @@ static struct platform_device cambria_ua
- 	.resource	= &cambria_uart_resource,
- };
- 
-+static struct resource cambria_optional_uart_resources[] = {
-+	{
-+		.start	= 0x52000000,
-+		.end	= 0x52000fff,
-+		.flags	= IORESOURCE_MEM
-+	},
-+	{
-+		.start	= 0x53000000,
-+		.end	= 0x53000fff,
-+		.flags	= IORESOURCE_MEM
-+	}
-+};
-+
-+static struct plat_serial8250_port cambria_optional_uart_data[] = {
-+	{
-+		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_BUGGY_UART,
-+		.iotype		= UPIO_MEM,
-+		.regshift	= 0,
-+		.uartclk	= 1843200,
-+	},
-+	{
-+		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_BUGGY_UART,
-+		.iotype		= UPIO_MEM,
-+		.regshift	= 0,
-+		.uartclk	= 1843200,
-+	},
-+  { },
-+};
-+
-+static struct platform_device cambria_optional_uart = {
-+	.name		= "serial8250",
-+	.id		= PLAT8250_DEV_PLATFORM1,
-+	.dev.platform_data	= cambria_optional_uart_data,
-+	.num_resources	= 2,
-+	.resource	= cambria_optional_uart_resources,
-+};
-+
- static struct resource cambria_pata_resources[] = {
- 	{
- 		.flags	= IORESOURCE_MEM
-@@ -283,6 +321,19 @@ static void __init cambria_gw23xx_setup(
- 
- static void __init cambria_gw2350_setup(void)
- {
-+	*IXP4XX_EXP_CS2 = 0xbfff0003;
-+	set_irq_type(IRQ_IXP4XX_GPIO3, IRQ_TYPE_EDGE_RISING);
-+	cambria_optional_uart_data[0].mapbase	= 0x52FF0000;
-+	cambria_optional_uart_data[0].membase	= (void __iomem *)ioremap(0x52FF0000, 0x0fff);
-+	cambria_optional_uart_data[0].irq		= IRQ_IXP4XX_GPIO3;
-+
-+	*IXP4XX_EXP_CS3 = 0xbfff0003;
-+	set_irq_type(IRQ_IXP4XX_GPIO4, IRQ_TYPE_EDGE_RISING);
-+	cambria_optional_uart_data[1].mapbase	= 0x53FF0000;
-+	cambria_optional_uart_data[1].membase	= (void __iomem *)ioremap(0x53FF0000, 0x0fff);
-+	cambria_optional_uart_data[1].irq		= IRQ_IXP4XX_GPIO4;
-+
-+	platform_device_register(&cambria_optional_uart);
- 	platform_device_register(&cambria_npec_device);
- 	platform_device_register(&cambria_npea_device);
- 
-@@ -290,10 +341,26 @@ static void __init cambria_gw2350_setup(
- 	platform_device_register(&cambria_usb1_device);
- 
- 	platform_device_register(&cambria_gpio_leds_device);
-+
-+	*IXP4XX_EXP_CS2 = 0xBFFF3C43;
-+	*IXP4XX_EXP_CS3 = 0xBFFF3C43;
- }
- 
- static void __init cambria_gw2358_setup(void)
- {
-+	*IXP4XX_EXP_CS3 = 0xbfff0003;
-+	set_irq_type(IRQ_IXP4XX_GPIO3, IRQ_TYPE_EDGE_RISING);
-+	cambria_optional_uart_data[0].mapbase	= 0x53FC0000;
-+	cambria_optional_uart_data[0].membase	= (void __iomem *)ioremap(0x53FC0000, 0x0fff);
-+	cambria_optional_uart_data[0].irq		= IRQ_IXP4XX_GPIO3;
-+
-+	set_irq_type(IRQ_IXP4XX_GPIO4, IRQ_TYPE_EDGE_RISING);
-+	cambria_optional_uart_data[1].mapbase	= 0x53F80000;
-+	cambria_optional_uart_data[1].membase	= (void __iomem *)ioremap(0x53F80000, 0x0fff);
-+	cambria_optional_uart_data[1].irq		= IRQ_IXP4XX_GPIO4;
-+
-+	platform_device_register(&cambria_optional_uart);
-+
- 	platform_device_register(&cambria_npec_device);
- 	platform_device_register(&cambria_npea_device);
- 
diff --git a/target/linux/ixp4xx/patches-2.6.27/192-cambria_gpio_device.patch b/target/linux/ixp4xx/patches-2.6.27/192-cambria_gpio_device.patch
deleted file mode 100644
index 706d65e..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/192-cambria_gpio_device.patch
+++ /dev/null
@@ -1,46 +0,0 @@
---- a/arch/arm/mach-ixp4xx/cambria-setup.c
-+++ b/arch/arm/mach-ixp4xx/cambria-setup.c
-@@ -212,6 +212,20 @@ static struct platform_device cambria_gp
- 	.dev.platform_data = &cambria_gpio_leds_data,
- };
- 
-+static struct resource cambria_gpio_resources[] = {
-+	{
-+		.name = "gpio",
-+		.flags  = 0,
-+	},
-+};
-+
-+static struct platform_device cambria_gpio = {
-+	.name     = "GPIODEV",
-+	.id     = -1,
-+	.num_resources    = ARRAY_SIZE(cambria_gpio_resources),
-+	.resource   = cambria_gpio_resources,
-+};
-+
- static struct latch_led cambria_latch_leds[] = {
- 	{
- 		.name	= "ledA",  /* green led */
-@@ -333,6 +347,11 @@ static void __init cambria_gw2350_setup(
- 	cambria_optional_uart_data[1].membase	= (void __iomem *)ioremap(0x53FF0000, 0x0fff);
- 	cambria_optional_uart_data[1].irq		= IRQ_IXP4XX_GPIO4;
- 
-+	cambria_gpio_resources[0].start = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) |\
-+																		(1 << 5) | (1 << 8) | (1 << 9) | (1 << 12);
-+	cambria_gpio_resources[0].end = cambria_gpio_resources[0].start;
-+
-+	platform_device_register(&cambria_gpio);
- 	platform_device_register(&cambria_optional_uart);
- 	platform_device_register(&cambria_npec_device);
- 	platform_device_register(&cambria_npea_device);
-@@ -359,6 +378,10 @@ static void __init cambria_gw2358_setup(
- 	cambria_optional_uart_data[1].membase	= (void __iomem *)ioremap(0x53F80000, 0x0fff);
- 	cambria_optional_uart_data[1].irq		= IRQ_IXP4XX_GPIO4;
- 
-+	cambria_gpio_resources[0].start = (1 << 14);
-+	cambria_gpio_resources[0].end = cambria_gpio_resources[0].start;
-+
-+	platform_device_register(&cambria_gpio);
- 	platform_device_register(&cambria_optional_uart);
- 
- 	platform_device_register(&cambria_npec_device);
diff --git a/target/linux/ixp4xx/patches-2.6.27/201-npe_driver_print_license_location.patch b/target/linux/ixp4xx/patches-2.6.27/201-npe_driver_print_license_location.patch
deleted file mode 100644
index 64c1798..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/201-npe_driver_print_license_location.patch
+++ /dev/null
@@ -1,11 +0,0 @@
---- a/arch/arm/mach-ixp4xx/ixp4xx_npe.c
-+++ b/arch/arm/mach-ixp4xx/ixp4xx_npe.c
-@@ -592,6 +592,8 @@ int npe_load_firmware(struct npe *npe, c
- 	npe_reset(npe);
- #endif
- 
-+	print_npe(KERN_INFO, npe, "firmware's license can be found in /usr/share/doc/LICENSE.IPL\n");
-+
- 	print_npe(KERN_INFO, npe, "firmware functionality 0x%X, "
- 		  "revision 0x%X:%X\n", (image->id >> 16) & 0xFF,
- 		  (image->id >> 8) & 0xFF, image->id & 0xFF);
diff --git a/target/linux/ixp4xx/patches-2.6.27/202-npe_driver_switch_support.patch b/target/linux/ixp4xx/patches-2.6.27/202-npe_driver_switch_support.patch
deleted file mode 100644
index a256c97..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/202-npe_driver_switch_support.patch
+++ /dev/null
@@ -1,246 +0,0 @@
---- a/drivers/net/arm/ixp4xx_eth.c
-+++ b/drivers/net/arm/ixp4xx_eth.c
-@@ -165,14 +165,15 @@ struct port {
- 	struct net_device *netdev;
- 	struct napi_struct napi;
- 	struct net_device_stats stat;
--	struct mii_if_info mii;
-+	struct mii_if_info mii[IXP4XX_ETH_PHY_MAX_ADDR];
- 	struct delayed_work mdio_thread;
- 	struct eth_plat_info *plat;
- 	buffer_t *rx_buff_tab[RX_DESCS], *tx_buff_tab[TX_DESCS];
- 	struct desc *desc_tab;	/* coherent */
- 	u32 desc_tab_phys;
- 	int id;			/* logical port ID */
--	u16 mii_bmcr;
-+	u16 mii_bmcr[IXP4XX_ETH_PHY_MAX_ADDR];
-+	int phy_count;
- };
- 
- /* NPE message structure */
-@@ -316,12 +317,13 @@ static void mdio_write(struct net_device
- 	spin_unlock_irqrestore(&mdio_lock, flags);
- }
- 
--static void phy_reset(struct net_device *dev, int phy_id)
-+static void phy_reset(struct net_device *dev, int idx)
- {
- 	struct port *port = netdev_priv(dev);
-+	int phy_id = port->mii[idx].phy_id;
- 	int cycles = 0;
- 
--	mdio_write(dev, phy_id, MII_BMCR, port->mii_bmcr | BMCR_RESET);
-+	mdio_write(dev, phy_id, MII_BMCR, port->mii_bmcr[idx] | BMCR_RESET);
- 
- 	while (cycles < MAX_MII_RESET_RETRIES) {
- 		if (!(mdio_read(dev, phy_id, MII_BMCR) & BMCR_RESET)) {
-@@ -335,12 +337,12 @@ static void phy_reset(struct net_device 
- 		cycles++;
- 	}
- 
--	printk(KERN_ERR "%s: MII reset failed\n", dev->name);
-+	printk(KERN_ERR "%s: MII reset failed on PHY%2d\n", dev->name, phy_id);
- }
- 
--static void eth_set_duplex(struct port *port)
-+static void eth_set_duplex(struct port *port, int full_duplex)
- {
--	if (port->mii.full_duplex)
-+	if (full_duplex)
- 		__raw_writel(DEFAULT_TX_CNTRL0 & ~TX_CNTRL0_HALFDUPLEX,
- 			     &port->regs->tx_control[0]);
- 	else
-@@ -348,7 +350,7 @@ static void eth_set_duplex(struct port *
- 			     &port->regs->tx_control[0]);
- }
- 
--
-+#if 0
- static void phy_check_media(struct port *port, int init)
- {
- 	if (mii_check_media(&port->mii, 1, init))
-@@ -367,7 +369,63 @@ static void phy_check_media(struct port 
- 		}
- 	}
- }
-+#else
-+static void phy_update_link(struct net_device *dev, int link)
-+{
-+	int prev_link = netif_carrier_ok(dev);
-+
-+	if (!prev_link && link) {
-+		printk(KERN_INFO "%s: link up\n", dev->name);
-+		netif_carrier_on(dev);
-+	} else if (prev_link && !link) {
-+		printk(KERN_INFO "%s: link down\n", dev->name);
-+		netif_carrier_off(dev);
-+	}
-+}
-+
-+static void phy_check_media(struct port *port, int init)
-+{
-+	struct net_device *dev = port->netdev;
-+
-+	if (port->phy_count == 1) {
-+		struct mii_if_info *mii = &port->mii[0];
-+
-+		if (mii_check_media(mii, 1, init))
-+			eth_set_duplex(port, mii->full_duplex);
-+
-+		if (mii->force_media) /* mii_check_media() doesn't work */
-+			phy_update_link(dev, mii_link_ok(mii));
-+	} else {
-+		int cur_link = 0;
-+		int i;
-+
-+		if (init)
-+			eth_set_duplex(port, 1);
-+
-+		for (i = 0; i < port->phy_count; i++)
-+			cur_link |= mii_link_ok(&port->mii[i]);
-+
-+		phy_update_link(dev, cur_link);
-+	}
-+}
-+#endif
-+
-+static void phy_power_down(struct net_device *dev, int idx)
-+{
-+	struct port *port = netdev_priv(dev);
-+	int phy_id = port->mii[idx].phy_id;
-+
-+	port->mii_bmcr[idx] = mdio_read(dev, phy_id, MII_BMCR) &
-+						~(BMCR_RESET | BMCR_PDOWN);
-+	mdio_write(dev, phy_id, MII_BMCR, port->mii_bmcr[idx] | BMCR_PDOWN);
-+}
-+
-+static void phy_power_up(struct net_device *dev, int idx)
-+{
-+	struct port *port = netdev_priv(dev);
- 
-+	mdio_write(dev, port->mii[idx].phy_id, MII_BMCR, port->mii_bmcr[idx]);
-+}
- 
- static void mdio_thread(struct work_struct *work)
- {
-@@ -791,9 +849,12 @@ static int eth_ioctl(struct net_device *
- 
- 	if (!netif_running(dev))
- 		return -EINVAL;
--	err = generic_mii_ioctl(&port->mii, if_mii(req), cmd, &duplex_chg);
-+	if (port->phy_count != 1)
-+		return -EOPNOTSUPP;
-+
-+	err = generic_mii_ioctl(&port->mii[0], if_mii(req), cmd, &duplex_chg);
- 	if (duplex_chg)
--		eth_set_duplex(port);
-+		eth_set_duplex(port, port->mii[0].full_duplex);
- 	return err;
- }
- 
-@@ -946,7 +1007,8 @@ static int eth_open(struct net_device *d
- 		}
- 	}
- 
--	mdio_write(dev, port->plat->phy, MII_BMCR, port->mii_bmcr);
-+	for (i = 0; i < port->phy_count; i++)
-+		phy_power_up(dev, i);
- 
- 	memset(&msg, 0, sizeof(msg));
- 	msg.cmd = NPE_VLAN_SETRXQOSENTRY;
-@@ -1106,10 +1168,8 @@ static int eth_close(struct net_device *
- 		printk(KERN_CRIT "%s: unable to disable loopback\n",
- 		       dev->name);
- 
--	port->mii_bmcr = mdio_read(dev, port->plat->phy, MII_BMCR) &
--		~(BMCR_RESET | BMCR_PDOWN); /* may have been altered */
--	mdio_write(dev, port->plat->phy, MII_BMCR,
--		   port->mii_bmcr | BMCR_PDOWN);
-+	for (i = 0; i < port->phy_count; i++)
-+		phy_power_down(dev, i);
- 
- 	if (!ports_open)
- 		qmgr_disable_irq(TXDONE_QUEUE);
-@@ -1119,6 +1179,42 @@ static int eth_close(struct net_device *
- 	return 0;
- }
- 
-+static void eth_add_phy(struct net_device *dev, int phy_id)
-+{
-+	struct port *port = netdev_priv(dev);
-+	int i;
-+
-+	i = port->phy_count++;
-+
-+	port->mii[i].dev = dev;
-+	port->mii[i].mdio_read = mdio_read;
-+	port->mii[i].mdio_write = mdio_write;
-+	port->mii[i].phy_id = phy_id;
-+	port->mii[i].phy_id_mask = 0x1F;
-+	port->mii[i].reg_num_mask = 0x1F;
-+
-+	printk(KERN_INFO "%s: MII PHY %i on %s\n", dev->name, phy_id,
-+	       npe_name(port->npe));
-+
-+	phy_reset(dev, i);
-+	phy_power_down(dev, i);
-+}
-+
-+static void eth_init_mii(struct net_device *dev)
-+{
-+	struct port *port = netdev_priv(dev);
-+
-+	if (port->plat->phy < IXP4XX_ETH_PHY_MAX_ADDR) {
-+		eth_add_phy(dev, port->plat->phy);
-+	} else {
-+		int i;
-+		for (i = 0; i < IXP4XX_ETH_PHY_MAX_ADDR; i++)
-+			if (port->plat->phy_mask & (1U << i))
-+				eth_add_phy(dev, i);
-+	}
-+
-+}
-+
- static int __devinit eth_init_one(struct platform_device *pdev)
- {
- 	struct port *port;
-@@ -1191,20 +1287,7 @@ static int __devinit eth_init_one(struct
- 	__raw_writel(DEFAULT_CORE_CNTRL, &port->regs->core_control);
- 	udelay(50);
- 
--	port->mii.dev = dev;
--	port->mii.mdio_read = mdio_read;
--	port->mii.mdio_write = mdio_write;
--	port->mii.phy_id = plat->phy;
--	port->mii.phy_id_mask = 0x1F;
--	port->mii.reg_num_mask = 0x1F;
--
--	printk(KERN_INFO "%s: MII PHY %i on %s\n", dev->name, plat->phy,
--	       npe_name(port->npe));
--
--	phy_reset(dev, plat->phy);
--	port->mii_bmcr = mdio_read(dev, plat->phy, MII_BMCR) &
--		~(BMCR_RESET | BMCR_PDOWN);
--	mdio_write(dev, plat->phy, MII_BMCR, port->mii_bmcr | BMCR_PDOWN);
-+	eth_init_mii(dev);
- 
- 	INIT_DELAYED_WORK(&port->mdio_thread, mdio_thread);
- 	return 0;
---- a/arch/arm/mach-ixp4xx/include/mach/platform.h
-+++ b/arch/arm/mach-ixp4xx/include/mach/platform.h
-@@ -95,12 +95,15 @@ struct sys_timer;
- #define IXP4XX_ETH_NPEB		0x10
- #define IXP4XX_ETH_NPEC		0x20
- 
-+#define IXP4XX_ETH_PHY_MAX_ADDR	32
-+
- /* Information about built-in Ethernet MAC interfaces */
- struct eth_plat_info {
- 	u8 phy;		/* MII PHY ID, 0 - 31 */
- 	u8 rxq;		/* configurable, currently 0 - 31 only */
- 	u8 txreadyq;
- 	u8 hwaddr[6];
-+	u32 phy_mask;
- };
- 
- /* Information about built-in HSS (synchronous serial) interfaces */
diff --git a/target/linux/ixp4xx/patches-2.6.27/203-npe_driver_phy_reset_autoneg.patch b/target/linux/ixp4xx/patches-2.6.27/203-npe_driver_phy_reset_autoneg.patch
deleted file mode 100644
index b6519f0..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/203-npe_driver_phy_reset_autoneg.patch
+++ /dev/null
@@ -1,42 +0,0 @@
---- a/drivers/net/arm/ixp4xx_eth.c
-+++ b/drivers/net/arm/ixp4xx_eth.c
-@@ -322,8 +322,12 @@ static void phy_reset(struct net_device 
- 	struct port *port = netdev_priv(dev);
- 	int phy_id = port->mii[idx].phy_id;
- 	int cycles = 0;
-+	u16 bmcr;
- 
--	mdio_write(dev, phy_id, MII_BMCR, port->mii_bmcr[idx] | BMCR_RESET);
-+	/* reset the PHY */
-+	bmcr = mdio_read(dev, phy_id, MII_BMCR);
-+	bmcr |= BMCR_ANENABLE;
-+	mdio_write(dev, phy_id, MII_BMCR, bmcr | BMCR_RESET);
- 
- 	while (cycles < MAX_MII_RESET_RETRIES) {
- 		if (!(mdio_read(dev, phy_id, MII_BMCR) & BMCR_RESET)) {
-@@ -331,13 +335,23 @@ static void phy_reset(struct net_device 
- 			printk(KERN_DEBUG "%s: phy_reset() took %i cycles\n",
- 			       dev->name, cycles);
- #endif
--			return;
-+			break;
- 		}
- 		udelay(1);
- 		cycles++;
- 	}
- 
--	printk(KERN_ERR "%s: MII reset failed on PHY%2d\n", dev->name, phy_id);
-+	if (cycles == MAX_MII_RESET_RETRIES) {
-+		printk(KERN_ERR "%s: MII reset failed on PHY%2d\n", dev->name,
-+								phy_id);
-+		return;
-+	}
-+
-+	/* restart auto negotiation */
-+	bmcr = mdio_read(dev, phy_id, MII_BMCR);
-+	bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
-+	mdio_write(dev, phy_id, MII_BMCR, bmcr);
-+
- }
- 
- static void eth_set_duplex(struct port *port, int full_duplex)
diff --git a/target/linux/ixp4xx/patches-2.6.27/204-npe_driver_ixp43x_support.patch b/target/linux/ixp4xx/patches-2.6.27/204-npe_driver_ixp43x_support.patch
deleted file mode 100644
index 516349f..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/204-npe_driver_ixp43x_support.patch
+++ /dev/null
@@ -1,94 +0,0 @@
-From cba5c286f3ea34ea4767fc00c705434a00fe2c37 Mon Sep 17 00:00:00 2001
-From: Imre Kaloz <kaloz@openwrt.org>
-Date: Thu, 26 Jun 2008 01:58:02 +0200
-Subject: [PATCH] Add support for the ethernet ports on IXP43x
-
----
- arch/arm/mach-ixp4xx/ixp4xx_npe.c         |    6 +++---
- drivers/net/arm/ixp4xx_eth.c              |   13 +++++++++----
- include/asm-arm/arch-ixp4xx/cpu.h         |    2 ++
- include/asm-arm/arch-ixp4xx/ixp4xx-regs.h |    7 ++++---
- 4 files changed, 18 insertions(+), 10 deletions(-)
-
---- a/arch/arm/mach-ixp4xx/ixp4xx_npe.c
-+++ b/arch/arm/mach-ixp4xx/ixp4xx_npe.c
-@@ -575,8 +575,8 @@ int npe_load_firmware(struct npe *npe, c
- 		for (i = 0; i < image->size; i++)
- 			image->data[i] = swab32(image->data[i]);
- 
--	if (!cpu_is_ixp46x() && ((image->id >> 28) & 0xF /* device ID */)) {
--		print_npe(KERN_INFO, npe, "IXP46x firmware ignored on "
-+	if (cpu_is_ixp42x() && ((image->id >> 28) & 0xF /* device ID */)) {
-+		print_npe(KERN_INFO, npe, "IXP46x/IXP43x firmware ignored on "
- 			  "IXP42x\n");
- 		goto err;
- 	}
-@@ -598,7 +598,7 @@ int npe_load_firmware(struct npe *npe, c
- 		  "revision 0x%X:%X\n", (image->id >> 16) & 0xFF,
- 		  (image->id >> 8) & 0xFF, image->id & 0xFF);
- 
--	if (!cpu_is_ixp46x()) {
-+	if (cpu_is_ixp42x()) {
- 		if (!npe->id)
- 			instr_size = NPE_A_42X_INSTR_SIZE;
- 		else
---- a/drivers/net/arm/ixp4xx_eth.c
-+++ b/drivers/net/arm/ixp4xx_eth.c
-@@ -32,6 +32,7 @@
- #include <linux/kernel.h>
- #include <linux/mii.h>
- #include <linux/platform_device.h>
-+#include <mach/cpu.h>
- #include <mach/npe.h>
- #include <mach/qmgr.h>
- 
-@@ -1337,12 +1338,16 @@ static struct platform_driver drv = {
- 
- static int __init eth_init_module(void)
- {
--	if (!(ixp4xx_read_feature_bits() & IXP4XX_FEATURE_NPEB_ETH0))
--		return -ENOSYS;
- 
--	/* All MII PHY accesses use NPE-B Ethernet registers */
- 	spin_lock_init(&mdio_lock);
--	mdio_regs = (struct eth_regs __iomem *)IXP4XX_EthB_BASE_VIRT;
-+	if (!cpu_is_ixp43x())
-+	/* All MII PHY accesses use NPE-B Ethernet registers */
-+		mdio_regs = (struct eth_regs __iomem *)IXP4XX_EthB_BASE_VIRT;
-+
-+	else
-+	/* IXP43x lacks NPE-B and uses NPE-C for MII PHY access */
-+		mdio_regs = (struct eth_regs __iomem *)IXP4XX_EthC_BASE_VIRT;
-+
- 	__raw_writel(DEFAULT_CORE_CNTRL, &mdio_regs->core_control);
- 
- 	return platform_driver_register(&drv);
---- a/arch/arm/mach-ixp4xx/include/mach/cpu.h
-+++ b/arch/arm/mach-ixp4xx/include/mach/cpu.h
-@@ -34,6 +34,8 @@ static inline u32 ixp4xx_read_feature_bi
- 	val &= ~IXP4XX_FEATURE_RESERVED;
- 	if (!cpu_is_ixp46x())
- 		val &= ~IXP4XX_FEATURE_IXP46X_ONLY;
-+	if (cpu_is_ixp42x())
-+		val &= ~IXP4XX_FEATURE_IXP43X_46X;
- 
- 	return val;
- }
---- a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
-+++ b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
-@@ -628,11 +628,12 @@
- #define IXP4XX_FEATURE_XSCALE_MAX_FREQ	(3 << 22)
- #define IXP4XX_FEATURE_RESERVED		(0xFF << 24)
- 
--#define IXP4XX_FEATURE_IXP46X_ONLY (IXP4XX_FEATURE_ECC_TIMESYNC |	\
-+#define IXP4XX_FEATURE_IXP43X_46X (IXP4XX_FEATURE_ECC_TIMESYNC |	\
- 				    IXP4XX_FEATURE_USB_HOST |		\
- 				    IXP4XX_FEATURE_NPEA_ETH |		\
--				    IXP4XX_FEATURE_NPEB_ETH_1_TO_3 |	\
--				    IXP4XX_FEATURE_RSA |		\
- 				    IXP4XX_FEATURE_XSCALE_MAX_FREQ)
- 
-+#define IXP4XX_FEATURE_IXP46X_ONLY (IXP4XX_FEATURE_NPEB_ETH_1_TO_3 |	\
-+				    IXP4XX_FEATURE_RSA)
-+
- #endif
diff --git a/target/linux/ixp4xx/patches-2.6.27/210-npe_hss.patch b/target/linux/ixp4xx/patches-2.6.27/210-npe_hss.patch
deleted file mode 100644
index 49ea5e0..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/210-npe_hss.patch
+++ /dev/null
@@ -1,2917 +0,0 @@
---- a/drivers/net/wan/Kconfig
-+++ b/drivers/net/wan/Kconfig
-@@ -333,6 +333,15 @@ config DSCC4_PCI_RST
- 
- 	  Say Y if your card supports this feature.
- 
-+config IXP4XX_HSS
-+	tristate "IXP4xx HSS (synchronous serial port) support"
-+	depends on HDLC && ARM && ARCH_IXP4XX
-+	select IXP4XX_NPE
-+	select IXP4XX_QMGR
-+	help
-+	  Say Y here if you want to use built-in HSS ports
-+	  on IXP4xx processor.
-+
- config DLCI
- 	tristate "Frame Relay DLCI support"
- 	---help---
---- a/drivers/net/wan/Makefile
-+++ b/drivers/net/wan/Makefile
-@@ -41,6 +41,7 @@ obj-$(CONFIG_C101)		+= c101.o
- obj-$(CONFIG_WANXL)		+= wanxl.o
- obj-$(CONFIG_PCI200SYN)		+= pci200syn.o
- obj-$(CONFIG_PC300TOO)		+= pc300too.o
-+obj-$(CONFIG_IXP4XX_HSS)	+= ixp4xx_hss.o
- 
- clean-files := wanxlfw.inc
- $(obj)/wanxl.o:	$(obj)/wanxlfw.inc
---- /dev/null
-+++ b/drivers/net/wan/ixp4xx_hss.c
-@@ -0,0 +1,2886 @@
-+/*
-+ * Intel IXP4xx HSS (synchronous serial port) driver for Linux
-+ *
-+ * Copyright (C) 2007 Krzysztof Halasa <khc@pm.waw.pl>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of version 2 of the GNU General Public License
-+ * as published by the Free Software Foundation.
-+ */
-+
-+#include <linux/bitops.h>
-+#include <linux/cdev.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/dmapool.h>
-+#include <linux/fs.h>
-+#include <linux/io.h>
-+#include <linux/kernel.h>
-+#include <linux/hdlc.h>
-+#include <linux/platform_device.h>
-+#include <linux/poll.h>
-+#include <asm/arch/npe.h>
-+#include <asm/arch/qmgr.h>
-+
-+#define DEBUG_QUEUES		0
-+#define DEBUG_DESC		0
-+#define DEBUG_RX		0
-+#define DEBUG_TX		0
-+#define DEBUG_PKT_BYTES		0
-+#define DEBUG_CLOSE		0
-+#define DEBUG_FRAMER		0
-+
-+#define DRV_NAME		"ixp4xx_hss"
-+
-+#define PKT_EXTRA_FLAGS		0 /* orig 1 */
-+#define TX_FRAME_SYNC_OFFSET	0 /* channelized */
-+#define PKT_NUM_PIPES		1 /* 1, 2 or 4 */
-+#define PKT_PIPE_FIFO_SIZEW	4 /* total 4 dwords per HSS */
-+
-+#define RX_DESCS		16 /* also length of all RX queues */
-+#define TX_DESCS		16 /* also length of all TX queues */
-+
-+#define POOL_ALLOC_SIZE		(sizeof(struct desc) * (RX_DESCS + TX_DESCS))
-+#define RX_SIZE			(HDLC_MAX_MRU + 4) /* NPE needs more space */
-+#define MAX_CLOSE_WAIT		1000 /* microseconds */
-+#define HSS_COUNT		2
-+#define MIN_FRAME_SIZE		16   /* bits */
-+#define MAX_FRAME_SIZE		257  /* 256 bits + framing bit */
-+#define MAX_CHANNELS		(MAX_FRAME_SIZE / 8)
-+#define MAX_CHAN_DEVICES	32
-+#define CHANNEL_HDLC		0xFE
-+#define CHANNEL_UNUSED		0xFF
-+
-+#define NAPI_WEIGHT		16
-+#define CHAN_RX_TRIGGER		16 /* 8 RX frames = 1 ms @ E1 */
-+#define CHAN_RX_FRAMES		64
-+#define MAX_CHAN_RX_BAD_SYNC	(CHAN_RX_TRIGGER / 2 /* pairs */ - 3)
-+#define CHAN_TX_LIST_FRAMES	16 /* bytes/channel per list, 16 - 48 */
-+#define CHAN_TX_LISTS		8
-+#define CHAN_TX_FRAMES		(CHAN_TX_LIST_FRAMES * CHAN_TX_LISTS)
-+#define CHAN_QUEUE_LEN		16 /* minimum possible */
-+
-+
-+/* Queue IDs */
-+#define HSS0_CHL_RXTRIG_QUEUE	12	/* orig size = 32 dwords */
-+#define HSS0_PKT_RX_QUEUE	13	/* orig size = 32 dwords */
-+#define HSS0_PKT_TX0_QUEUE	14	/* orig size = 16 dwords */
-+#define HSS0_PKT_TX1_QUEUE	15
-+#define HSS0_PKT_TX2_QUEUE	16
-+#define HSS0_PKT_TX3_QUEUE	17
-+#define HSS0_PKT_RXFREE0_QUEUE	18	/* orig size = 16 dwords */
-+#define HSS0_PKT_RXFREE1_QUEUE	19
-+#define HSS0_PKT_RXFREE2_QUEUE	20
-+#define HSS0_PKT_RXFREE3_QUEUE	21
-+#define HSS0_PKT_TXDONE_QUEUE	22	/* orig size = 64 dwords */
-+
-+#define HSS1_CHL_RXTRIG_QUEUE	10
-+#define HSS1_PKT_RX_QUEUE	0
-+#define HSS1_PKT_TX0_QUEUE	5
-+#define HSS1_PKT_TX1_QUEUE	6
-+#define HSS1_PKT_TX2_QUEUE	7
-+#define HSS1_PKT_TX3_QUEUE	8
-+#define HSS1_PKT_RXFREE0_QUEUE	1
-+#define HSS1_PKT_RXFREE1_QUEUE	2
-+#define HSS1_PKT_RXFREE2_QUEUE	3
-+#define HSS1_PKT_RXFREE3_QUEUE	4
-+#define HSS1_PKT_TXDONE_QUEUE	9
-+
-+#define NPE_PKT_MODE_HDLC		0
-+#define NPE_PKT_MODE_RAW		1
-+#define NPE_PKT_MODE_56KMODE		2
-+#define NPE_PKT_MODE_56KENDIAN_MSB	4
-+
-+/* PKT_PIPE_HDLC_CFG_WRITE flags */
-+#define PKT_HDLC_IDLE_ONES		0x1 /* default = flags */
-+#define PKT_HDLC_CRC_32			0x2 /* default = CRC-16 */
-+#define PKT_HDLC_MSB_ENDIAN		0x4 /* default = LE */
-+
-+
-+/* hss_config, PCRs */
-+/* Frame sync sampling, default = active low */
-+#define PCR_FRM_SYNC_ACTIVE_HIGH	0x40000000
-+#define PCR_FRM_SYNC_FALLINGEDGE	0x80000000
-+#define PCR_FRM_SYNC_RISINGEDGE		0xC0000000
-+
-+/* Frame sync pin: input (default) or output generated off a given clk edge */
-+#define PCR_FRM_SYNC_OUTPUT_FALLING	0x20000000
-+#define PCR_FRM_SYNC_OUTPUT_RISING	0x30000000
-+
-+/* Frame and data clock sampling on edge, default = falling */
-+#define PCR_FCLK_EDGE_RISING		0x08000000
-+#define PCR_DCLK_EDGE_RISING		0x04000000
-+
-+/* Clock direction, default = input */
-+#define PCR_SYNC_CLK_DIR_OUTPUT		0x02000000
-+
-+/* Generate/Receive frame pulses, default = enabled */
-+#define PCR_FRM_PULSE_DISABLED		0x01000000
-+
-+ /* Data rate is full (default) or half the configured clk speed */
-+#define PCR_HALF_CLK_RATE		0x00200000
-+
-+/* Invert data between NPE and HSS FIFOs? (default = no) */
-+#define PCR_DATA_POLARITY_INVERT	0x00100000
-+
-+/* TX/RX endianness, default = LSB */
-+#define PCR_MSB_ENDIAN			0x00080000
-+
-+/* Normal (default) / open drain mode (TX only) */
-+#define PCR_TX_PINS_OPEN_DRAIN		0x00040000
-+
-+/* No framing bit transmitted and expected on RX? (default = framing bit) */
-+#define PCR_SOF_NO_FBIT			0x00020000
-+
-+/* Drive data pins? */
-+#define PCR_TX_DATA_ENABLE		0x00010000
-+
-+/* Voice 56k type: drive the data pins low (default), high, high Z */
-+#define PCR_TX_V56K_HIGH		0x00002000
-+#define PCR_TX_V56K_HIGH_IMP		0x00004000
-+
-+/* Unassigned type: drive the data pins low (default), high, high Z */
-+#define PCR_TX_UNASS_HIGH		0x00000800
-+#define PCR_TX_UNASS_HIGH_IMP		0x00001000
-+
-+/* T1 @ 1.544MHz only: Fbit dictated in FIFO (default) or high Z */
-+#define PCR_TX_FB_HIGH_IMP		0x00000400
-+
-+/* 56k data endiannes - which bit unused: high (default) or low */
-+#define PCR_TX_56KE_BIT_0_UNUSED	0x00000200
-+
-+/* 56k data transmission type: 32/8 bit data (default) or 56K data */
-+#define PCR_TX_56KS_56K_DATA		0x00000100
-+
-+/* hss_config, cCR */
-+/* Number of packetized clients, default = 1 */
-+#define CCR_NPE_HFIFO_2_HDLC		0x04000000
-+#define CCR_NPE_HFIFO_3_OR_4HDLC	0x08000000
-+
-+/* default = no loopback */
-+#define CCR_LOOPBACK			0x02000000
-+
-+/* HSS number, default = 0 (first) */
-+#define CCR_SECOND_HSS			0x01000000
-+
-+
-+/* hss_config, clkCR: main:10, num:10, denom:12 */
-+#define CLK42X_SPEED_EXP	((0x3FF << 22) | (  2 << 12) |   15) /*65 KHz*/
-+
-+#define CLK42X_SPEED_512KHZ	((  130 << 22) | (  2 << 12) |   15)
-+#define CLK42X_SPEED_1536KHZ	((   43 << 22) | ( 18 << 12) |   47)
-+#define CLK42X_SPEED_1544KHZ	((   43 << 22) | ( 33 << 12) |  192)
-+#define CLK42X_SPEED_2048KHZ	((   32 << 22) | ( 34 << 12) |   63)
-+#define CLK42X_SPEED_4096KHZ	((   16 << 22) | ( 34 << 12) |  127)
-+#define CLK42X_SPEED_8192KHZ	((    8 << 22) | ( 34 << 12) |  255)
-+
-+#define CLK46X_SPEED_512KHZ	((  130 << 22) | ( 24 << 12) |  127)
-+#define CLK46X_SPEED_1536KHZ	((   43 << 22) | (152 << 12) |  383)
-+#define CLK46X_SPEED_1544KHZ	((   43 << 22) | ( 66 << 12) |  385)
-+#define CLK46X_SPEED_2048KHZ	((   32 << 22) | (280 << 12) |  511)
-+#define CLK46X_SPEED_4096KHZ	((   16 << 22) | (280 << 12) | 1023)
-+#define CLK46X_SPEED_8192KHZ	((    8 << 22) | (280 << 12) | 2047)
-+
-+
-+/* hss_config, LUT entries */
-+#define TDMMAP_UNASSIGNED	0
-+#define TDMMAP_HDLC		1	/* HDLC - packetized */
-+#define TDMMAP_VOICE56K		2	/* Voice56K - 7-bit channelized */
-+#define TDMMAP_VOICE64K		3	/* Voice64K - 8-bit channelized */
-+
-+/* offsets into HSS config */
-+#define HSS_CONFIG_TX_PCR	0x00 /* port configuration registers */
-+#define HSS_CONFIG_RX_PCR	0x04
-+#define HSS_CONFIG_CORE_CR	0x08 /* loopback control, HSS# */
-+#define HSS_CONFIG_CLOCK_CR	0x0C /* clock generator control */
-+#define HSS_CONFIG_TX_FCR	0x10 /* frame configuration registers */
-+#define HSS_CONFIG_RX_FCR	0x14
-+#define HSS_CONFIG_TX_LUT	0x18 /* channel look-up tables */
-+#define HSS_CONFIG_RX_LUT	0x38
-+
-+
-+/* NPE command codes */
-+/* writes the ConfigWord value to the location specified by offset */
-+#define PORT_CONFIG_WRITE		0x40
-+
-+/* triggers the NPE to load the contents of the configuration table */
-+#define PORT_CONFIG_LOAD		0x41
-+
-+/* triggers the NPE to return an HssErrorReadResponse message */
-+#define PORT_ERROR_READ			0x42
-+
-+/* reset NPE internal status and enable the HssChannelized operation */
-+#define CHAN_FLOW_ENABLE		0x43
-+#define CHAN_FLOW_DISABLE		0x44
-+#define CHAN_IDLE_PATTERN_WRITE		0x45
-+#define CHAN_NUM_CHANS_WRITE		0x46
-+#define CHAN_RX_BUF_ADDR_WRITE		0x47
-+#define CHAN_RX_BUF_CFG_WRITE		0x48
-+#define CHAN_TX_BLK_CFG_WRITE		0x49
-+#define CHAN_TX_BUF_ADDR_WRITE		0x4A
-+#define CHAN_TX_BUF_SIZE_WRITE		0x4B
-+#define CHAN_TSLOTSWITCH_ENABLE		0x4C
-+#define CHAN_TSLOTSWITCH_DISABLE	0x4D
-+
-+/* downloads the gainWord value for a timeslot switching channel associated
-+   with bypassNum */
-+#define CHAN_TSLOTSWITCH_GCT_DOWNLOAD	0x4E
-+
-+/* triggers the NPE to reset internal status and enable the HssPacketized
-+   operation for the flow specified by pPipe */
-+#define PKT_PIPE_FLOW_ENABLE		0x50
-+#define PKT_PIPE_FLOW_DISABLE		0x51
-+#define PKT_NUM_PIPES_WRITE		0x52
-+#define PKT_PIPE_FIFO_SIZEW_WRITE	0x53
-+#define PKT_PIPE_HDLC_CFG_WRITE		0x54
-+#define PKT_PIPE_IDLE_PATTERN_WRITE	0x55
-+#define PKT_PIPE_RX_SIZE_WRITE		0x56
-+#define PKT_PIPE_MODE_WRITE		0x57
-+
-+/* HDLC packet status values - desc->status */
-+#define ERR_SHUTDOWN		1 /* stop or shutdown occurrance */
-+#define ERR_HDLC_ALIGN		2 /* HDLC alignment error */
-+#define ERR_HDLC_FCS		3 /* HDLC Frame Check Sum error */
-+#define ERR_RXFREE_Q_EMPTY	4 /* RX-free queue became empty while receiving
-+				     this packet (if buf_len < pkt_len) */
-+#define ERR_HDLC_TOO_LONG	5 /* HDLC frame size too long */
-+#define ERR_HDLC_ABORT		6 /* abort sequence received */
-+#define ERR_DISCONNECTING	7 /* disconnect is in progress */
-+
-+
-+enum mode {MODE_HDLC = 0, MODE_RAW, MODE_G704};
-+enum error_bit {TX_ERROR_BIT = 0, RX_ERROR_BIT = 1};
-+enum alignment { NOT_ALIGNED = 0, EVEN_FIRST, ODD_FIRST };
-+
-+#ifdef __ARMEB__
-+typedef struct sk_buff buffer_t;
-+#define free_buffer dev_kfree_skb
-+#define free_buffer_irq dev_kfree_skb_irq
-+#else
-+typedef void buffer_t;
-+#define free_buffer kfree
-+#define free_buffer_irq kfree
-+#endif
-+
-+struct chan_device {
-+	struct cdev cdev;
-+	struct device *dev;
-+	struct port *port;
-+	unsigned int open_count, excl_open;
-+	unsigned int tx_first, tx_count, rx_first, rx_count; /* bytes */
-+	unsigned long errors_bitmap;
-+	u8 id, chan_count;
-+	u8 log_channels[MAX_CHANNELS];
-+};
-+
-+struct port {
-+	struct device *dev;
-+	struct npe *npe;
-+	struct net_device *netdev;
-+	struct napi_struct napi;
-+	struct hss_plat_info *plat;
-+	buffer_t *rx_buff_tab[RX_DESCS], *tx_buff_tab[TX_DESCS];
-+	struct desc *desc_tab;	/* coherent */
-+	u32 desc_tab_phys;
-+	unsigned int id;
-+	atomic_t chan_tx_irq_number, chan_rx_irq_number;
-+	wait_queue_head_t chan_tx_waitq, chan_rx_waitq;
-+	u8 hdlc_cfg;
-+
-+	/* the following fields must be protected by npe_lock */
-+	enum mode mode;
-+	unsigned int clock_type, clock_rate, loopback;
-+	unsigned int frame_size, frame_sync_offset;
-+
-+	struct chan_device *chan_devices[MAX_CHAN_DEVICES];
-+	u8 *chan_buf;
-+	u32 chan_tx_buf_phys, chan_rx_buf_phys;
-+	unsigned int chan_open_count, hdlc_open;
-+	unsigned int chan_started, initialized, just_set_offset;
-+	enum alignment aligned, carrier;
-+	unsigned int chan_last_rx, chan_last_tx;
-+	/* assigned channels, may be invalid with given frame length or mode */
-+	u8 channels[MAX_CHANNELS];
-+	int msg_count;
-+};
-+
-+/* NPE message structure */
-+struct msg {
-+#ifdef __ARMEB__
-+	u8 cmd, unused, hss_port, index;
-+	union {
-+		struct { u8 data8a, data8b, data8c, data8d; };
-+		struct { u16 data16a, data16b; };
-+		struct { u32 data32; };
-+	};
-+#else
-+	u8 index, hss_port, unused, cmd;
-+	union {
-+		struct { u8 data8d, data8c, data8b, data8a; };
-+		struct { u16 data16b, data16a; };
-+		struct { u32 data32; };
-+	};
-+#endif
-+};
-+
-+/* HDLC packet descriptor */
-+struct desc {
-+	u32 next;		/* pointer to next buffer, unused */
-+
-+#ifdef __ARMEB__
-+	u16 buf_len;		/* buffer length */
-+	u16 pkt_len;		/* packet length */
-+	u32 data;		/* pointer to data buffer in RAM */
-+	u8 status;
-+	u8 error_count;
-+	u16 __reserved;
-+#else
-+	u16 pkt_len;		/* packet length */
-+	u16 buf_len;		/* buffer length */
-+	u32 data;		/* pointer to data buffer in RAM */
-+	u16 __reserved;
-+	u8 error_count;
-+	u8 status;
-+#endif
-+	u32 __reserved1[4];
-+};
-+
-+
-+#define rx_desc_phys(port, n)	((port)->desc_tab_phys +		\
-+				 (n) * sizeof(struct desc))
-+#define rx_desc_ptr(port, n)	(&(port)->desc_tab[n])
-+
-+#define tx_desc_phys(port, n)	((port)->desc_tab_phys +		\
-+				 ((n) + RX_DESCS) * sizeof(struct desc))
-+#define tx_desc_ptr(port, n)	(&(port)->desc_tab[(n) + RX_DESCS])
-+
-+#define chan_tx_buf_len(port)	(port->frame_size / 8 * CHAN_TX_FRAMES)
-+#define chan_tx_lists_len(port)	(port->frame_size / 8 * CHAN_TX_LISTS * \
-+				 sizeof(u32))
-+#define chan_rx_buf_len(port)	(port->frame_size / 8 * CHAN_RX_FRAMES)
-+
-+#define chan_tx_buf(port)	((port)->chan_buf)
-+#define chan_tx_lists(port)	(chan_tx_buf(port) + chan_tx_buf_len(port))
-+#define chan_rx_buf(port)	(chan_tx_lists(port) + chan_tx_lists_len(port))
-+
-+#define chan_tx_lists_phys(port) ((port)->chan_tx_buf_phys +	\
-+				  chan_tx_buf_len(port))
-+
-+static int hss_prepare_chan(struct port *port);
-+void hss_chan_stop(struct port *port);
-+
-+/*****************************************************************************
-+ * global variables
-+ ****************************************************************************/
-+
-+static struct class *hss_class;
-+static int chan_major;
-+static int ports_open;
-+static struct dma_pool *dma_pool;
-+static spinlock_t npe_lock;
-+
-+static const struct {
-+	int tx, txdone, rx, rxfree, chan;
-+}queue_ids[2] = {{HSS0_PKT_TX0_QUEUE, HSS0_PKT_TXDONE_QUEUE, HSS0_PKT_RX_QUEUE,
-+		  HSS0_PKT_RXFREE0_QUEUE, HSS0_CHL_RXTRIG_QUEUE},
-+		 {HSS1_PKT_TX0_QUEUE, HSS1_PKT_TXDONE_QUEUE, HSS1_PKT_RX_QUEUE,
-+		  HSS1_PKT_RXFREE0_QUEUE, HSS1_CHL_RXTRIG_QUEUE},
-+};
-+
-+/*****************************************************************************
-+ * utility functions
-+ ****************************************************************************/
-+
-+static inline struct port* dev_to_port(struct net_device *dev)
-+{
-+	return dev_to_hdlc(dev)->priv;
-+}
-+
-+static inline struct chan_device* inode_to_chan_dev(struct inode *inode)
-+{
-+	return container_of(inode->i_cdev, struct chan_device, cdev);
-+}
-+
-+#ifndef __ARMEB__
-+static inline void memcpy_swab32(u32 *dest, u32 *src, int cnt)
-+{
-+	int i;
-+	for (i = 0; i < cnt; i++)
-+		dest[i] = swab32(src[i]);
-+}
-+#endif
-+
-+static int get_number(const char **buf, size_t *len, unsigned int *ptr,
-+		      unsigned int min, unsigned int max)
-+{
-+	char *endp;
-+	unsigned long val = simple_strtoul(*buf, &endp, 10);
-+
-+	if (endp == *buf || endp - *buf > *len || val < min || val > max)
-+		return -EINVAL;
-+	*len -= endp - *buf;
-+	*buf = endp;
-+	*ptr = val;
-+	return 0;
-+}
-+
-+static int parse_channels(const char **buf, size_t *len, u8 *channels)
-+{
-+	unsigned int ch, next = 0;
-+
-+	if (*len && (*buf)[*len - 1] == '\n')
-+		(*len)--;
-+
-+	memset(channels, 0, MAX_CHANNELS);
-+
-+	if (!*len)
-+		return 0;
-+
-+	/* Format: "A,B-C,...", A > B > C */
-+	while (1) {
-+		if (get_number(buf, len, &ch, next, MAX_CHANNELS - 1))
-+			return -EINVAL;
-+		channels[ch] = 1;
-+		next = ch + 1;
-+		if (!*len)
-+			break;
-+		if (**buf == ',') {
-+			(*buf)++;
-+			(*len)--;
-+			continue;
-+		}
-+		if (**buf != '-')
-+			return -EINVAL;
-+		(*buf)++;
-+		(*len)--;
-+		if (get_number(buf, len, &ch, next, MAX_CHANNELS - 1))
-+			return -EINVAL;
-+		while (next <= ch)
-+			channels[next++] = 1;
-+		if (!*len)
-+			break;
-+		if (**buf != ',')
-+			return -EINVAL;
-+		(*buf)++;
-+		(*len)--;
-+	}
-+	return 1;
-+}
-+
-+static size_t print_channels(struct port *port, char *buf, u8 id)
-+{
-+	unsigned int ch, cnt = 0;
-+	size_t len = 0;
-+
-+	for (ch = 0; ch < MAX_CHANNELS; ch++)
-+		if (port->channels[ch] == id) {
-+			if (cnt == 0) {
-+				sprintf(buf + len, "%s%u", len ? "," : "", ch);
-+				len += strlen(buf + len);
-+			}
-+			cnt++;
-+		} else {
-+			if (cnt > 1) {
-+				sprintf(buf + len, "-%u", ch - 1);
-+				len += strlen(buf + len);
-+			}
-+			cnt = 0;
-+		}
-+	if (cnt > 1) {
-+		sprintf(buf + len, "-%u", ch - 1);
-+		len += strlen(buf + len);
-+	}
-+
-+	buf[len++] = '\n';
-+	return len;
-+}
-+
-+static inline unsigned int sub_offset(unsigned int a, unsigned int b,
-+				      unsigned int modulo)
-+{
-+	return (modulo /* make sure the result >= 0 */ + a - b) % modulo;
-+}
-+
-+/*****************************************************************************
-+ * HSS access
-+ ****************************************************************************/
-+
-+static void hss_config_load(struct port *port)
-+{
-+	struct msg msg;
-+
-+	do {
-+		memset(&msg, 0, sizeof(msg));
-+		msg.cmd = PORT_CONFIG_LOAD;
-+		msg.hss_port = port->id;
-+		if (npe_send_message(port->npe, &msg, "HSS_LOAD_CONFIG"))
-+			break;
-+		if (npe_recv_message(port->npe, &msg, "HSS_LOAD_CONFIG"))
-+			break;
-+
-+		/* HSS_LOAD_CONFIG for port #1 returns port_id = #4 */
-+		if (msg.cmd != PORT_CONFIG_LOAD || msg.data32)
-+			break;
-+
-+		/* HDLC may stop working without this */
-+		npe_recv_message(port->npe, &msg, "FLUSH_IT");
-+		return;
-+	} while (0);
-+
-+	printk(KERN_CRIT "HSS-%i: unable to reload HSS configuration\n",
-+	       port->id);
-+	BUG();
-+}
-+
-+static void hss_config_set_pcr(struct port *port)
-+{
-+	struct msg msg;
-+
-+	do {
-+		memset(&msg, 0, sizeof(msg));
-+		msg.cmd = PORT_CONFIG_WRITE;
-+		msg.hss_port = port->id;
-+		msg.index = HSS_CONFIG_TX_PCR;
-+		msg.data32 = PCR_FRM_SYNC_OUTPUT_RISING | PCR_MSB_ENDIAN |
-+			PCR_TX_DATA_ENABLE;
-+		if (port->frame_size % 8 == 0)
-+			msg.data32 |= PCR_SOF_NO_FBIT;
-+		if (port->clock_type == CLOCK_INT)
-+			msg.data32 |= PCR_SYNC_CLK_DIR_OUTPUT;
-+		if (npe_send_message(port->npe, &msg, "HSS_SET_TX_PCR"))
-+			break;
-+
-+		msg.index = HSS_CONFIG_RX_PCR;
-+		msg.data32 ^= PCR_TX_DATA_ENABLE | PCR_DCLK_EDGE_RISING;
-+		if (npe_send_message(port->npe, &msg, "HSS_SET_RX_PCR"))
-+			break;
-+		return;
-+	} while (0);
-+
-+	printk(KERN_CRIT "HSS-%i: unable to set HSS PCR registers\n", port->id);
-+	BUG();
-+}
-+
-+static void hss_config_set_hdlc_cfg(struct port *port)
-+{
-+	struct msg msg;
-+
-+	memset(&msg, 0, sizeof(msg));
-+	msg.cmd = PKT_PIPE_HDLC_CFG_WRITE;
-+	msg.hss_port = port->id;
-+	msg.data8a = port->hdlc_cfg; /* rx_cfg */
-+	msg.data8b = port->hdlc_cfg | (PKT_EXTRA_FLAGS << 3); /* tx_cfg */
-+	if (npe_send_message(port->npe, &msg, "HSS_SET_HDLC_CFG")) {
-+		printk(KERN_CRIT "HSS-%i: unable to set HSS HDLC"
-+		       " configuration\n", port->id);
-+		BUG();
-+	}
-+}
-+
-+static void hss_config_set_core(struct port *port)
-+{
-+	struct msg msg;
-+
-+	memset(&msg, 0, sizeof(msg));
-+	msg.cmd = PORT_CONFIG_WRITE;
-+	msg.hss_port = port->id;
-+	msg.index = HSS_CONFIG_CORE_CR;
-+	msg.data32 = (port->loopback ? CCR_LOOPBACK : 0) |
-+		(port->id ? CCR_SECOND_HSS : 0);
-+	if (npe_send_message(port->npe, &msg, "HSS_SET_CORE_CR")) {
-+		printk(KERN_CRIT "HSS-%i: unable to set HSS core control"
-+		       " register\n", port->id);
-+		BUG();
-+	}
-+}
-+
-+static void hss_config_set_line(struct port *port)
-+{
-+	struct msg msg;
-+
-+	hss_config_set_pcr(port);
-+	hss_config_set_core(port);
-+
-+	memset(&msg, 0, sizeof(msg));
-+	msg.cmd = PORT_CONFIG_WRITE;
-+	msg.hss_port = port->id;
-+	msg.index = HSS_CONFIG_CLOCK_CR;
-+	msg.data32 = CLK42X_SPEED_2048KHZ /* FIXME */;
-+	if (npe_send_message(port->npe, &msg, "HSS_SET_CLOCK_CR")) {
-+		printk(KERN_CRIT "HSS-%i: unable to set HSS clock control"
-+		       " register\n", port->id);
-+		BUG();
-+	}
-+}
-+
-+static void hss_config_set_rx_frame(struct port *port)
-+{
-+	struct msg msg;
-+
-+	memset(&msg, 0, sizeof(msg));
-+	msg.cmd = PORT_CONFIG_WRITE;
-+	msg.hss_port = port->id;
-+	msg.index = HSS_CONFIG_RX_FCR;
-+	msg.data16a = port->frame_sync_offset;
-+	msg.data16b = port->frame_size - 1;
-+	if (npe_send_message(port->npe, &msg, "HSS_SET_RX_FCR")) {
-+		printk(KERN_CRIT "HSS-%i: unable to set HSS RX frame size"
-+		       " and offset\n", port->id);
-+		BUG();
-+	}
-+}
-+
-+static void hss_config_set_frame(struct port *port)
-+{
-+	struct msg msg;
-+
-+	memset(&msg, 0, sizeof(msg));
-+	msg.cmd = PORT_CONFIG_WRITE;
-+	msg.hss_port = port->id;
-+	msg.index = HSS_CONFIG_TX_FCR;
-+	msg.data16a = TX_FRAME_SYNC_OFFSET;
-+	msg.data16b = port->frame_size - 1;
-+	if (npe_send_message(port->npe, &msg, "HSS_SET_TX_FCR")) {
-+		printk(KERN_CRIT "HSS-%i: unable to set HSS TX frame size"
-+		       " and offset\n", port->id);
-+		BUG();
-+	}
-+	hss_config_set_rx_frame(port);
-+}
-+
-+static void hss_config_set_lut(struct port *port)
-+{
-+	struct msg msg;
-+	int chan_count = 0, log_chan = 0, i, ch;
-+	u32 lut[MAX_CHANNELS / 4];
-+
-+	memset(lut, 0, sizeof(lut));
-+	for (i = 0; i < MAX_CHAN_DEVICES; i++)
-+		if (port->chan_devices[i])
-+			port->chan_devices[i]->chan_count = 0;
-+
-+	memset(&msg, 0, sizeof(msg));
-+	msg.cmd = PORT_CONFIG_WRITE;
-+	msg.hss_port = port->id;
-+
-+	for (ch = 0; ch < MAX_CHANNELS; ch++) {
-+		struct chan_device *chdev = NULL;
-+		unsigned int entry;
-+
-+		if (port->channels[ch] < MAX_CHAN_DEVICES /* assigned */)
-+			chdev = port->chan_devices[port->channels[ch]];
-+
-+		if (port->mode == MODE_G704 && ch == 0)
-+			entry = TDMMAP_VOICE64K; /* PCM-31 pattern */
-+		else if (port->mode == MODE_HDLC ||
-+			 port->channels[ch] == CHANNEL_HDLC)
-+			entry = TDMMAP_HDLC;
-+		else if (chdev && chdev->open_count) {
-+			entry = TDMMAP_VOICE64K;
-+			chdev->log_channels[chdev->chan_count++] = log_chan;
-+		} else
-+			entry = TDMMAP_UNASSIGNED;
-+		if (entry == TDMMAP_VOICE64K) {
-+			chan_count++;
-+			log_chan++;
-+		}
-+
-+		msg.data32 >>= 2;
-+		msg.data32 |= entry << 30;
-+
-+		if (ch % 16 == 15) {
-+			msg.index = HSS_CONFIG_TX_LUT + ((ch / 4) & ~3);
-+			if (npe_send_message(port->npe, &msg, "HSS_SET_TX_LUT"))
-+				break;
-+
-+			msg.index += HSS_CONFIG_RX_LUT - HSS_CONFIG_TX_LUT;
-+			if (npe_send_message(port->npe, &msg, "HSS_SET_RX_LUT"))
-+				break;
-+		}
-+	}
-+	if (ch != MAX_CHANNELS) {
-+		printk(KERN_CRIT "HSS-%i: unable to set HSS channel look-up"
-+		       " table\n", port->id);
-+		BUG();
-+	}
-+
-+	hss_config_set_frame(port);
-+
-+	if (!chan_count)
-+		return;
-+
-+	memset(&msg, 0, sizeof(msg));
-+	msg.cmd = CHAN_NUM_CHANS_WRITE;
-+	msg.hss_port = port->id;
-+	msg.data8a = chan_count;
-+	if (npe_send_message(port->npe, &msg, "CHAN_NUM_CHANS_WRITE")) {
-+		printk(KERN_CRIT "HSS-%i: unable to set HSS channel count\n",
-+		       port->id);
-+		BUG();
-+	}
-+
-+	/* don't leak data */
-+	// FIXME memset(chan_tx_buf(port), 0, CHAN_TX_FRAMES * chan_count);
-+	if (port->mode == MODE_G704) /* G.704 PCM-31 sync pattern */
-+		for (i = 0; i < CHAN_TX_FRAMES; i += 4)
-+			*(u32*)(chan_tx_buf(port) + i) = 0x9BDF9BDF;
-+
-+	for (i = 0; i < CHAN_TX_LISTS; i++) {
-+		u32 phys = port->chan_tx_buf_phys + i * CHAN_TX_LIST_FRAMES;
-+		u32 *list = ((u32 *)chan_tx_lists(port)) + i * chan_count;
-+		for (ch = 0; ch < chan_count; ch++)
-+			list[ch] = phys + ch * CHAN_TX_FRAMES;
-+	}
-+	dma_sync_single(port->dev, port->chan_tx_buf_phys,
-+			chan_tx_buf_len(port) + chan_tx_lists_len(port),
-+			DMA_TO_DEVICE);
-+}
-+
-+static u32 hss_config_get_status(struct port *port)
-+{
-+	struct msg msg;
-+
-+	do {
-+		memset(&msg, 0, sizeof(msg));
-+		msg.cmd = PORT_ERROR_READ;
-+		msg.hss_port = port->id;
-+		if (npe_send_message(port->npe, &msg, "PORT_ERROR_READ"))
-+			break;
-+		if (npe_recv_message(port->npe, &msg, "PORT_ERROR_READ"))
-+			break;
-+
-+		return msg.data32;
-+	} while (0);
-+
-+	printk(KERN_CRIT "HSS-%i: unable to read HSS status\n", port->id);
-+	BUG();
-+}
-+
-+static void hss_config_start_chan(struct port *port)
-+{
-+	struct msg msg;
-+
-+	port->chan_last_tx = 0;
-+	port->chan_last_rx = 0;
-+
-+	do {
-+		memset(&msg, 0, sizeof(msg));
-+		msg.cmd = CHAN_RX_BUF_ADDR_WRITE;
-+		msg.hss_port = port->id;
-+		msg.data32 = port->chan_rx_buf_phys;
-+		if (npe_send_message(port->npe, &msg, "CHAN_RX_BUF_ADDR_WRITE"))
-+			break;
-+
-+		memset(&msg, 0, sizeof(msg));
-+		msg.cmd = CHAN_TX_BUF_ADDR_WRITE;
-+		msg.hss_port = port->id;
-+		msg.data32 = chan_tx_lists_phys(port);
-+		if (npe_send_message(port->npe, &msg, "CHAN_TX_BUF_ADDR_WRITE"))
-+			break;
-+
-+		memset(&msg, 0, sizeof(msg));
-+		msg.cmd = CHAN_FLOW_ENABLE;
-+		msg.hss_port = port->id;
-+		if (npe_send_message(port->npe, &msg, "CHAN_FLOW_ENABLE"))
-+			break;
-+		port->chan_started = 1;
-+		return;
-+	} while (0);
-+
-+	printk(KERN_CRIT "HSS-%i: unable to start channelized flow\n",
-+	       port->id);
-+	BUG();
-+}
-+
-+static void hss_config_stop_chan(struct port *port)
-+{
-+	struct msg msg;
-+
-+	if (!port->chan_started)
-+		return;
-+
-+	memset(&msg, 0, sizeof(msg));
-+	msg.cmd = CHAN_FLOW_DISABLE;
-+	msg.hss_port = port->id;
-+	if (npe_send_message(port->npe, &msg, "CHAN_FLOW_DISABLE")) {
-+		printk(KERN_CRIT "HSS-%i: unable to stop channelized flow\n",
-+		       port->id);
-+		BUG();
-+	}
-+	hss_config_get_status(port); /* make sure it's halted */
-+}
-+
-+static void hss_config_start_hdlc(struct port *port)
-+{
-+	struct msg msg;
-+
-+	memset(&msg, 0, sizeof(msg));
-+	msg.cmd = PKT_PIPE_FLOW_ENABLE;
-+	msg.hss_port = port->id;
-+	msg.data32 = 0;
-+	if (npe_send_message(port->npe, &msg, "HSS_ENABLE_PKT_PIPE")) {
-+		printk(KERN_CRIT "HSS-%i: unable to stop packetized flow\n",
-+		       port->id);
-+		BUG();
-+	}
-+}
-+
-+static void hss_config_stop_hdlc(struct port *port)
-+{
-+	struct msg msg;
-+
-+	memset(&msg, 0, sizeof(msg));
-+	msg.cmd = PKT_PIPE_FLOW_DISABLE;
-+	msg.hss_port = port->id;
-+	if (npe_send_message(port->npe, &msg, "HSS_DISABLE_PKT_PIPE")) {
-+		printk(KERN_CRIT "HSS-%i: unable to stop packetized flow\n",
-+		       port->id);
-+		BUG();
-+	}
-+	hss_config_get_status(port); /* make sure it's halted */
-+}
-+
-+static int hss_config_load_firmware(struct port *port)
-+{
-+	struct msg msg;
-+
-+	if (port->initialized)
-+		return 0;
-+
-+	if (!npe_running(port->npe)) {
-+		int err;
-+		if ((err = npe_load_firmware(port->npe, npe_name(port->npe),
-+					     port->dev)))
-+			return err;
-+	}
-+
-+	do {
-+		/* HSS main configuration */
-+		hss_config_set_line(port);
-+
-+		hss_config_set_frame(port);
-+
-+		/* HDLC mode configuration */
-+		memset(&msg, 0, sizeof(msg));
-+		msg.cmd = PKT_NUM_PIPES_WRITE;
-+		msg.hss_port = port->id;
-+		msg.data8a = PKT_NUM_PIPES;
-+		if (npe_send_message(port->npe, &msg, "HSS_SET_PKT_PIPES"))
-+			break;
-+
-+		msg.cmd = PKT_PIPE_FIFO_SIZEW_WRITE;
-+		msg.data8a = PKT_PIPE_FIFO_SIZEW;
-+		if (npe_send_message(port->npe, &msg, "HSS_SET_PKT_FIFO"))
-+			break;
-+
-+		msg.cmd = PKT_PIPE_MODE_WRITE;
-+		msg.data8a = NPE_PKT_MODE_HDLC;
-+		/* msg.data8b = inv_mask */
-+		/* msg.data8c = or_mask */
-+		if (npe_send_message(port->npe, &msg, "HSS_SET_PKT_MODE"))
-+			break;
-+
-+		msg.cmd = PKT_PIPE_RX_SIZE_WRITE;
-+		msg.data16a = HDLC_MAX_MRU; /* including CRC */
-+		if (npe_send_message(port->npe, &msg, "HSS_SET_PKT_RX_SIZE"))
-+			break;
-+
-+		msg.cmd = PKT_PIPE_IDLE_PATTERN_WRITE;
-+		msg.data32 = 0x7F7F7F7F; /* ??? FIXME */
-+		if (npe_send_message(port->npe, &msg, "HSS_SET_PKT_IDLE"))
-+			break;
-+
-+		/* Channelized operation settings */
-+		memset(&msg, 0, sizeof(msg));
-+		msg.cmd = CHAN_TX_BLK_CFG_WRITE;
-+		msg.hss_port = port->id;
-+		msg.data8b = (CHAN_TX_LIST_FRAMES & ~7) / 2;
-+		msg.data8a = msg.data8b / 4;
-+		msg.data8d = CHAN_TX_LIST_FRAMES - msg.data8b;
-+		msg.data8c = msg.data8d / 4;
-+		if (npe_send_message(port->npe, &msg, "CHAN_TX_BLK_CFG_WRITE"))
-+			break;
-+
-+		memset(&msg, 0, sizeof(msg));
-+		msg.cmd = CHAN_RX_BUF_CFG_WRITE;
-+		msg.hss_port = port->id;
-+		msg.data8a = CHAN_RX_TRIGGER / 8;
-+		msg.data8b = CHAN_RX_FRAMES;
-+		if (npe_send_message(port->npe, &msg, "CHAN_RX_BUF_CFG_WRITE"))
-+			break;
-+
-+		memset(&msg, 0, sizeof(msg));
-+		msg.cmd = CHAN_TX_BUF_SIZE_WRITE;
-+		msg.hss_port = port->id;
-+		msg.data8a = CHAN_TX_LISTS;
-+		if (npe_send_message(port->npe, &msg, "CHAN_TX_BUF_SIZE_WRITE"))
-+			break;
-+
-+		port->initialized = 1;
-+		return 0;
-+	} while (0);
-+
-+	printk(KERN_CRIT "HSS-%i: unable to start HSS operation\n", port->id);
-+	BUG();
-+}
-+
-+/*****************************************************************************
-+ * packetized (HDLC) operation
-+ ****************************************************************************/
-+
-+static inline void debug_pkt(struct net_device *dev, const char *func,
-+			     u8 *data, int len)
-+{
-+#if DEBUG_PKT_BYTES
-+	int i;
-+
-+	printk(KERN_DEBUG "%s: %s(%i) ", dev->name, func, len);
-+	for (i = 0; i < len; i++) {
-+		if (i >= DEBUG_PKT_BYTES)
-+			break;
-+		printk(KERN_DEBUG "%s%02X", !(i % 4) ? " " : "", data[i]);
-+	}
-+	printk(KERN_DEBUG "\n");
-+#endif
-+}
-+
-+
-+static inline void debug_desc(u32 phys, struct desc *desc)
-+{
-+#if DEBUG_DESC
-+	printk(KERN_DEBUG "%X: %X %3X %3X %08X %X %X\n",
-+	       phys, desc->next, desc->buf_len, desc->pkt_len,
-+	       desc->data, desc->status, desc->error_count);
-+#endif
-+}
-+
-+static inline void debug_queue(unsigned int queue, int is_get, u32 phys)
-+{
-+#if DEBUG_QUEUES
-+	static struct {
-+		int queue;
-+		char *name;
-+	} names[] = {
-+		{ HSS0_PKT_TX0_QUEUE, "TX#0 " },
-+		{ HSS0_PKT_TXDONE_QUEUE, "TX-done#0 " },
-+		{ HSS0_PKT_RX_QUEUE, "RX#0 " },
-+		{ HSS0_PKT_RXFREE0_QUEUE, "RX-free#0 " },
-+		{ HSS1_PKT_TX0_QUEUE, "TX#1 " },
-+		{ HSS1_PKT_TXDONE_QUEUE, "TX-done#1 " },
-+		{ HSS1_PKT_RX_QUEUE, "RX#1 " },
-+		{ HSS1_PKT_RXFREE0_QUEUE, "RX-free#1 " },
-+	};
-+	int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(names); i++)
-+		if (names[i].queue == queue)
-+			break;
-+
-+	printk(KERN_DEBUG "Queue %i %s%s %X\n", queue,
-+	       i < ARRAY_SIZE(names) ? names[i].name : "",
-+	       is_get ? "->" : "<-", phys);
-+#endif
-+}
-+
-+static inline u32 queue_get_entry(unsigned int queue)
-+{
-+	u32 phys = qmgr_get_entry(queue);
-+	debug_queue(queue, 1, phys);
-+	return phys;
-+}
-+
-+static inline int queue_get_desc(unsigned int queue, struct port *port,
-+				 int is_tx)
-+{
-+	u32 phys, tab_phys, n_desc;
-+	struct desc *tab;
-+
-+	if (!(phys = queue_get_entry(queue)))
-+		return -1;
-+
-+	BUG_ON(phys & 0x1F);
-+	tab_phys = is_tx ? tx_desc_phys(port, 0) : rx_desc_phys(port, 0);
-+	tab = is_tx ? tx_desc_ptr(port, 0) : rx_desc_ptr(port, 0);
-+	n_desc = (phys - tab_phys) / sizeof(struct desc);
-+	BUG_ON(n_desc >= (is_tx ? TX_DESCS : RX_DESCS));
-+	debug_desc(phys, &tab[n_desc]);
-+	BUG_ON(tab[n_desc].next);
-+	return n_desc;
-+}
-+
-+static inline void queue_put_desc(unsigned int queue, u32 phys,
-+				  struct desc *desc)
-+{
-+	debug_queue(queue, 0, phys);
-+	debug_desc(phys, desc);
-+	BUG_ON(phys & 0x1F);
-+	qmgr_put_entry(queue, phys);
-+	BUG_ON(qmgr_stat_overflow(queue));
-+}
-+
-+
-+static inline void dma_unmap_tx(struct port *port, struct desc *desc)
-+{
-+#ifdef __ARMEB__
-+	dma_unmap_single(&port->netdev->dev, desc->data,
-+			 desc->buf_len, DMA_TO_DEVICE);
-+#else
-+	dma_unmap_single(&port->netdev->dev, desc->data & ~3,
-+			 ALIGN((desc->data & 3) + desc->buf_len, 4),
-+			 DMA_TO_DEVICE);
-+#endif
-+}
-+
-+
-+static void hss_hdlc_set_carrier(void *pdev, int carrier)
-+{
-+	struct net_device *netdev = pdev;
-+	struct port *port = dev_to_port(netdev);
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&npe_lock, flags);
-+	port->carrier = carrier;
-+	if (!port->loopback) {
-+		if (carrier)
-+			netif_carrier_on(netdev);
-+		else
-+			netif_carrier_off(netdev);
-+	}
-+	spin_unlock_irqrestore(&npe_lock, flags);
-+}
-+
-+static void hss_hdlc_rx_irq(void *pdev)
-+{
-+	struct net_device *dev = pdev;
-+	struct port *port = dev_to_port(dev);
-+
-+#if DEBUG_RX
-+	printk(KERN_DEBUG "%s: hss_hdlc_rx_irq\n", dev->name);
-+#endif
-+	qmgr_disable_irq(queue_ids[port->id].rx);
-+	netif_rx_schedule(dev, &port->napi);
-+}
-+
-+static int hss_hdlc_poll(struct napi_struct *napi, int budget)
-+{
-+	struct port *port = container_of(napi, struct port, napi);
-+	struct net_device *dev = port->netdev;
-+	unsigned int rxq = queue_ids[port->id].rx;
-+	unsigned int rxfreeq = queue_ids[port->id].rxfree;
-+	struct net_device_stats *stats = hdlc_stats(dev);
-+	int received = 0;
-+
-+#if DEBUG_RX
-+	printk(KERN_DEBUG "%s: hss_hdlc_poll\n", dev->name);
-+#endif
-+
-+	while (received < budget) {
-+		struct sk_buff *skb;
-+		struct desc *desc;
-+		int n;
-+#ifdef __ARMEB__
-+		struct sk_buff *temp;
-+		u32 phys;
-+#endif
-+
-+		if ((n = queue_get_desc(rxq, port, 0)) < 0) {
-+			received = 0; /* No packet received */
-+#if DEBUG_RX
-+			printk(KERN_DEBUG "%s: hss_hdlc_poll"
-+			       " netif_rx_complete\n", dev->name);
-+#endif
-+			netif_rx_complete(dev, napi);
-+			qmgr_enable_irq(rxq);
-+			if (!qmgr_stat_empty(rxq) &&
-+			    netif_rx_reschedule(dev, napi)) {
-+#if DEBUG_RX
-+				printk(KERN_DEBUG "%s: hss_hdlc_poll"
-+				       " netif_rx_reschedule succeeded\n",
-+				       dev->name);
-+#endif
-+				qmgr_disable_irq(rxq);
-+				continue;
-+			}
-+#if DEBUG_RX
-+			printk(KERN_DEBUG "%s: hss_hdlc_poll all done\n",
-+			       dev->name);
-+#endif
-+			return 0; /* all work done */
-+		}
-+
-+		desc = rx_desc_ptr(port, n);
-+#if 0 /* FIXME - error_count counts modulo 256, perhaps we should use it */
-+		if (desc->error_count)
-+			printk(KERN_DEBUG "%s: hss_hdlc_poll status 0x%02X"
-+			       " errors %u\n", dev->name, desc->status,
-+			       desc->error_count);
-+#endif
-+		skb = NULL;
-+		switch (desc->status) {
-+		case 0:
-+#ifdef __ARMEB__
-+			if ((skb = netdev_alloc_skb(dev, RX_SIZE)) != NULL) {
-+				phys = dma_map_single(&dev->dev, skb->data,
-+						      RX_SIZE,
-+						      DMA_FROM_DEVICE);
-+				if (dma_mapping_error(phys)) {
-+					dev_kfree_skb(skb);
-+					skb = NULL;
-+				}
-+			}
-+#else
-+			skb = netdev_alloc_skb(dev, desc->pkt_len);
-+#endif
-+			if (!skb)
-+				stats->rx_dropped++;
-+			break;
-+		case ERR_HDLC_ALIGN:
-+		case ERR_HDLC_ABORT:
-+			stats->rx_frame_errors++;
-+			stats->rx_errors++;
-+			break;
-+		case ERR_HDLC_FCS:
-+			stats->rx_crc_errors++;
-+			stats->rx_errors++;
-+			break;
-+		case ERR_HDLC_TOO_LONG:
-+			stats->rx_length_errors++;
-+			stats->rx_errors++;
-+			break;
-+		default:	/* FIXME - remove printk */
-+			printk(KERN_ERR "%s: hss_hdlc_poll: status 0x%02X"
-+			       " errors %u\n", dev->name, desc->status,
-+			       desc->error_count);
-+			stats->rx_errors++;
-+		}
-+
-+		if (!skb) {
-+			/* put the desc back on RX-ready queue */
-+			desc->buf_len = RX_SIZE;
-+			desc->pkt_len = desc->status = 0;
-+			queue_put_desc(rxfreeq, rx_desc_phys(port, n), desc);
-+			continue;
-+		}
-+
-+		/* process received frame */
-+#ifdef __ARMEB__
-+		temp = skb;
-+		skb = port->rx_buff_tab[n];
-+		dma_unmap_single(&dev->dev, desc->data,
-+				 RX_SIZE, DMA_FROM_DEVICE);
-+#else
-+		dma_sync_single(&dev->dev, desc->data,
-+				RX_SIZE, DMA_FROM_DEVICE);
-+		memcpy_swab32((u32 *)skb->data, (u32 *)port->rx_buff_tab[n],
-+			      ALIGN(desc->pkt_len, 4) / 4);
-+#endif
-+		skb_put(skb, desc->pkt_len);
-+
-+		debug_pkt(dev, "hss_hdlc_poll", skb->data, skb->len);
-+
-+		skb->protocol = hdlc_type_trans(skb, dev);
-+		dev->last_rx = jiffies;
-+		stats->rx_packets++;
-+		stats->rx_bytes += skb->len;
-+		netif_receive_skb(skb);
-+
-+		/* put the new buffer on RX-free queue */
-+#ifdef __ARMEB__
-+		port->rx_buff_tab[n] = temp;
-+		desc->data = phys;
-+#endif
-+		desc->buf_len = RX_SIZE;
-+		desc->pkt_len = 0;
-+		queue_put_desc(rxfreeq, rx_desc_phys(port, n), desc);
-+		received++;
-+	}
-+#if DEBUG_RX
-+	printk(KERN_DEBUG "hss_hdlc_poll: end, not all work done\n");
-+#endif
-+	return received;	/* not all work done */
-+}
-+
-+
-+static void hss_hdlc_txdone_irq(void *pdev)
-+{
-+	struct net_device *dev = pdev;
-+	struct port *port = dev_to_port(dev);
-+	struct net_device_stats *stats = hdlc_stats(dev);
-+	int n_desc;
-+
-+#if DEBUG_TX
-+	printk(KERN_DEBUG DRV_NAME ": hss_hdlc_txdone_irq\n");
-+#endif
-+	while ((n_desc = queue_get_desc(queue_ids[port->id].txdone,
-+					port, 1)) >= 0) {
-+		struct desc *desc;
-+		int start;
-+
-+		desc = tx_desc_ptr(port, n_desc);
-+
-+		stats->tx_packets++;
-+		stats->tx_bytes += desc->pkt_len;
-+
-+		dma_unmap_tx(port, desc);
-+#if DEBUG_TX
-+		printk(KERN_DEBUG "%s: hss_hdlc_txdone_irq free %p\n",
-+		       dev->name, port->tx_buff_tab[n_desc]);
-+#endif
-+		free_buffer_irq(port->tx_buff_tab[n_desc]);
-+		port->tx_buff_tab[n_desc] = NULL;
-+
-+		start = qmgr_stat_empty(port->plat->txreadyq);
-+		queue_put_desc(port->plat->txreadyq,
-+			       tx_desc_phys(port, n_desc), desc);
-+		if (start) {
-+#if DEBUG_TX
-+			printk(KERN_DEBUG "%s: hss_hdlc_txdone_irq xmit"
-+			       " ready\n", dev->name);
-+#endif
-+			netif_wake_queue(dev);
-+		}
-+	}
-+}
-+
-+static int hss_hdlc_xmit(struct sk_buff *skb, struct net_device *dev)
-+{
-+	struct port *port = dev_to_port(dev);
-+	struct net_device_stats *stats = hdlc_stats(dev);
-+	unsigned int txreadyq = port->plat->txreadyq;
-+	int len, offset, bytes, n;
-+	void *mem;
-+	u32 phys;
-+	struct desc *desc;
-+
-+#if DEBUG_TX
-+	printk(KERN_DEBUG "%s: hss_hdlc_xmit\n", dev->name);
-+#endif
-+
-+	if (unlikely(skb->len > HDLC_MAX_MRU)) {
-+		dev_kfree_skb(skb);
-+		stats->tx_errors++;
-+		return NETDEV_TX_OK;
-+	}
-+
-+	debug_pkt(dev, "hss_hdlc_xmit", skb->data, skb->len);
-+
-+	len = skb->len;
-+#ifdef __ARMEB__
-+	offset = 0; /* no need to keep alignment */
-+	bytes = len;
-+	mem = skb->data;
-+#else
-+	offset = (int)skb->data & 3; /* keep 32-bit alignment */
-+	bytes = ALIGN(offset + len, 4);
-+	if (!(mem = kmalloc(bytes, GFP_ATOMIC))) {
-+		dev_kfree_skb(skb);
-+		stats->tx_dropped++;
-+		return NETDEV_TX_OK;
-+	}
-+	memcpy_swab32(mem, (u32 *)((int)skb->data & ~3), bytes / 4);
-+	dev_kfree_skb(skb);
-+#endif
-+
-+	phys = dma_map_single(&dev->dev, mem, bytes, DMA_TO_DEVICE);
-+	if (dma_mapping_error(phys)) {
-+#ifdef __ARMEB__
-+		dev_kfree_skb(skb);
-+#else
-+		kfree(mem);
-+#endif
-+		stats->tx_dropped++;
-+		return NETDEV_TX_OK;
-+	}
-+
-+	n = queue_get_desc(txreadyq, port, 1);
-+	BUG_ON(n < 0);
-+	desc = tx_desc_ptr(port, n);
-+
-+#ifdef __ARMEB__
-+	port->tx_buff_tab[n] = skb;
-+#else
-+	port->tx_buff_tab[n] = mem;
-+#endif
-+	desc->data = phys + offset;
-+	desc->buf_len = desc->pkt_len = len;
-+
-+	wmb();
-+	queue_put_desc(queue_ids[port->id].tx, tx_desc_phys(port, n), desc);
-+	dev->trans_start = jiffies;
-+
-+	if (qmgr_stat_empty(txreadyq)) {
-+#if DEBUG_TX
-+		printk(KERN_DEBUG "%s: hss_hdlc_xmit queue full\n", dev->name);
-+#endif
-+		netif_stop_queue(dev);
-+		/* we could miss TX ready interrupt */
-+		if (!qmgr_stat_empty(txreadyq)) {
-+#if DEBUG_TX
-+			printk(KERN_DEBUG "%s: hss_hdlc_xmit ready again\n",
-+			       dev->name);
-+#endif
-+			netif_wake_queue(dev);
-+		}
-+	}
-+
-+#if DEBUG_TX
-+	printk(KERN_DEBUG "%s: hss_hdlc_xmit end\n", dev->name);
-+#endif
-+	return NETDEV_TX_OK;
-+}
-+
-+
-+static int request_hdlc_queues(struct port *port)
-+{
-+	int err;
-+
-+	err = qmgr_request_queue(queue_ids[port->id].rxfree, RX_DESCS, 0, 0);
-+	if (err)
-+		return err;
-+
-+	err = qmgr_request_queue(queue_ids[port->id].rx, RX_DESCS, 0, 0);
-+	if (err)
-+		goto rel_rxfree;
-+
-+	err = qmgr_request_queue(queue_ids[port->id].tx, TX_DESCS, 0, 0);
-+	if (err)
-+		goto rel_rx;
-+
-+	err = qmgr_request_queue(port->plat->txreadyq, TX_DESCS, 0, 0);
-+	if (err)
-+		goto rel_tx;
-+
-+	err = qmgr_request_queue(queue_ids[port->id].txdone, TX_DESCS, 0, 0);
-+	if (err)
-+		goto rel_txready;
-+	return 0;
-+
-+rel_txready:
-+	qmgr_release_queue(port->plat->txreadyq);
-+rel_tx:
-+	qmgr_release_queue(queue_ids[port->id].tx);
-+rel_rx:
-+	qmgr_release_queue(queue_ids[port->id].rx);
-+rel_rxfree:
-+	qmgr_release_queue(queue_ids[port->id].rxfree);
-+	printk(KERN_DEBUG "%s: unable to request hardware queues\n",
-+	       port->netdev->name);
-+	return err;
-+}
-+
-+static void release_hdlc_queues(struct port *port)
-+{
-+	qmgr_release_queue(queue_ids[port->id].rxfree);
-+	qmgr_release_queue(queue_ids[port->id].rx);
-+	qmgr_release_queue(queue_ids[port->id].txdone);
-+	qmgr_release_queue(queue_ids[port->id].tx);
-+	qmgr_release_queue(port->plat->txreadyq);
-+}
-+
-+static int init_hdlc_queues(struct port *port)
-+{
-+	int i;
-+
-+	if (!ports_open)
-+		if (!(dma_pool = dma_pool_create(DRV_NAME, NULL,
-+						 POOL_ALLOC_SIZE, 32, 0)))
-+			return -ENOMEM;
-+
-+	if (!(port->desc_tab = dma_pool_alloc(dma_pool, GFP_KERNEL,
-+					      &port->desc_tab_phys)))
-+		return -ENOMEM;
-+	memset(port->desc_tab, 0, POOL_ALLOC_SIZE);
-+	memset(port->rx_buff_tab, 0, sizeof(port->rx_buff_tab)); /* tables */
-+	memset(port->tx_buff_tab, 0, sizeof(port->tx_buff_tab));
-+
-+	/* Setup RX buffers */
-+	for (i = 0; i < RX_DESCS; i++) {
-+		struct desc *desc = rx_desc_ptr(port, i);
-+		buffer_t *buff;
-+		void *data;
-+#ifdef __ARMEB__
-+		if (!(buff = netdev_alloc_skb(port->netdev, RX_SIZE)))
-+			return -ENOMEM;
-+		data = buff->data;
-+#else
-+		if (!(buff = kmalloc(RX_SIZE, GFP_KERNEL)))
-+			return -ENOMEM;
-+		data = buff;
-+#endif
-+		desc->buf_len = RX_SIZE;
-+		desc->data = dma_map_single(&port->netdev->dev, data,
-+					    RX_SIZE, DMA_FROM_DEVICE);
-+		if (dma_mapping_error(desc->data)) {
-+			free_buffer(buff);
-+			return -EIO;
-+		}
-+		port->rx_buff_tab[i] = buff;
-+	}
-+
-+	return 0;
-+}
-+
-+static void destroy_hdlc_queues(struct port *port)
-+{
-+	int i;
-+
-+	if (port->desc_tab) {
-+		for (i = 0; i < RX_DESCS; i++) {
-+			struct desc *desc = rx_desc_ptr(port, i);
-+			buffer_t *buff = port->rx_buff_tab[i];
-+			if (buff) {
-+				dma_unmap_single(&port->netdev->dev,
-+						 desc->data, RX_SIZE,
-+						 DMA_FROM_DEVICE);
-+				free_buffer(buff);
-+			}
-+		}
-+		for (i = 0; i < TX_DESCS; i++) {
-+			struct desc *desc = tx_desc_ptr(port, i);
-+			buffer_t *buff = port->tx_buff_tab[i];
-+			if (buff) {
-+				dma_unmap_tx(port, desc);
-+				free_buffer(buff);
-+			}
-+		}
-+		dma_pool_free(dma_pool, port->desc_tab, port->desc_tab_phys);
-+		port->desc_tab = NULL;
-+	}
-+
-+	if (!ports_open && dma_pool) {
-+		dma_pool_destroy(dma_pool);
-+		dma_pool = NULL;
-+	}
-+}
-+
-+static int hss_hdlc_open(struct net_device *dev)
-+{
-+	struct port *port = dev_to_port(dev);
-+	unsigned long flags;
-+	int i, err = 0;
-+
-+	if ((err = hdlc_open(dev)))
-+		return err;
-+
-+	if ((err = request_hdlc_queues(port)))
-+		goto err_hdlc_close;
-+
-+	if ((err = init_hdlc_queues(port)))
-+		goto err_destroy_queues;
-+
-+	spin_lock_irqsave(&npe_lock, flags);
-+
-+	if (port->mode == MODE_G704 && port->channels[0] == CHANNEL_HDLC) {
-+		err = -EBUSY; /* channel #0 is used for G.704 framing */
-+		goto err_unlock;
-+	}
-+	if (port->mode != MODE_HDLC)
-+		for (i = port->frame_size / 8; i < MAX_CHANNELS; i++)
-+			if (port->channels[i] == CHANNEL_HDLC) {
-+				err = -ECHRNG; /* frame too short */
-+				goto err_unlock;
-+			}
-+
-+	if ((err = hss_config_load_firmware(port)))
-+		goto err_unlock;
-+
-+	if (!port->chan_open_count && port->plat->open)
-+		if ((err = port->plat->open(port->id, dev,
-+					    hss_hdlc_set_carrier)))
-+			goto err_unlock;
-+
-+	if (port->mode == MODE_G704 && !port->chan_open_count)
-+		if ((err = hss_prepare_chan(port)))
-+			goto err_plat_close;
-+
-+	spin_unlock_irqrestore(&npe_lock, flags);
-+
-+	/* Populate queues with buffers, no failure after this point */
-+	for (i = 0; i < TX_DESCS; i++)
-+		queue_put_desc(port->plat->txreadyq,
-+			       tx_desc_phys(port, i), tx_desc_ptr(port, i));
-+
-+	for (i = 0; i < RX_DESCS; i++)
-+		queue_put_desc(queue_ids[port->id].rxfree,
-+			       rx_desc_phys(port, i), rx_desc_ptr(port, i));
-+
-+	napi_enable(&port->napi);
-+	netif_start_queue(dev);
-+
-+	qmgr_set_irq(queue_ids[port->id].rx, QUEUE_IRQ_SRC_NOT_EMPTY,
-+		     hss_hdlc_rx_irq, dev);
-+
-+	qmgr_set_irq(queue_ids[port->id].txdone, QUEUE_IRQ_SRC_NOT_EMPTY,
-+		     hss_hdlc_txdone_irq, dev);
-+	qmgr_enable_irq(queue_ids[port->id].txdone);
-+
-+	ports_open++;
-+	port->hdlc_open = 1;
-+
-+	hss_config_set_hdlc_cfg(port);
-+	hss_config_set_lut(port);
-+	hss_config_load(port);
-+
-+	if (port->mode == MODE_G704 && !port->chan_open_count)
-+		hss_config_start_chan(port);
-+
-+	hss_config_start_hdlc(port);
-+
-+	/* we may already have RX data, enables IRQ */
-+	netif_rx_schedule(dev, &port->napi);
-+	return 0;
-+
-+err_plat_close:
-+	if (!port->chan_open_count && port->plat->close)
-+		port->plat->close(port->id, dev);
-+err_unlock:
-+	spin_unlock_irqrestore(&npe_lock, flags);
-+err_destroy_queues:
-+	destroy_hdlc_queues(port);
-+	release_hdlc_queues(port);
-+err_hdlc_close:
-+	hdlc_close(dev);
-+	return err;
-+}
-+
-+static int hss_hdlc_close(struct net_device *dev)
-+{
-+	struct port *port = dev_to_port(dev);
-+	unsigned long flags;
-+	int i, buffs = RX_DESCS; /* allocated RX buffers */
-+
-+	spin_lock_irqsave(&npe_lock, flags);
-+	ports_open--;
-+	port->hdlc_open = 0;
-+	qmgr_disable_irq(queue_ids[port->id].rx);
-+	netif_stop_queue(dev);
-+	napi_disable(&port->napi);
-+
-+	hss_config_stop_hdlc(port);
-+
-+	if (port->mode == MODE_G704 && !port->chan_open_count)
-+		hss_chan_stop(port);
-+
-+	while (queue_get_desc(queue_ids[port->id].rxfree, port, 0) >= 0)
-+		buffs--;
-+	while (queue_get_desc(queue_ids[port->id].rx, port, 0) >= 0)
-+		buffs--;
-+
-+	if (buffs)
-+		printk(KERN_CRIT "%s: unable to drain RX queue, %i buffer(s)"
-+		       " left in NPE\n", dev->name, buffs);
-+
-+	buffs = TX_DESCS;
-+	while (queue_get_desc(queue_ids[port->id].tx, port, 1) >= 0)
-+		buffs--; /* cancel TX */
-+
-+	i = 0;
-+	do {
-+		while (queue_get_desc(port->plat->txreadyq, port, 1) >= 0)
-+			buffs--;
-+		if (!buffs)
-+			break;
-+	} while (++i < MAX_CLOSE_WAIT);
-+
-+	if (buffs)
-+		printk(KERN_CRIT "%s: unable to drain TX queue, %i buffer(s) "
-+		       "left in NPE\n", dev->name, buffs);
-+#if DEBUG_CLOSE
-+	if (!buffs)
-+		printk(KERN_DEBUG "Draining TX queues took %i cycles\n", i);
-+#endif
-+	qmgr_disable_irq(queue_ids[port->id].txdone);
-+
-+	if (!port->chan_open_count && port->plat->close)
-+		port->plat->close(port->id, dev);
-+	spin_unlock_irqrestore(&npe_lock, flags);
-+
-+	destroy_hdlc_queues(port);
-+	release_hdlc_queues(port);
-+	hdlc_close(dev);
-+	return 0;
-+}
-+
-+
-+static int hss_hdlc_attach(struct net_device *dev, unsigned short encoding,
-+			   unsigned short parity)
-+{
-+	struct port *port = dev_to_port(dev);
-+
-+	if (encoding != ENCODING_NRZ)
-+		return -EINVAL;
-+
-+	switch(parity) {
-+	case PARITY_CRC16_PR1_CCITT:
-+		port->hdlc_cfg = 0;
-+		return 0;
-+
-+	case PARITY_CRC32_PR1_CCITT:
-+		port->hdlc_cfg = PKT_HDLC_CRC_32;
-+		return 0;
-+
-+	default:
-+		return -EINVAL;
-+	}
-+}
-+
-+
-+static int hss_hdlc_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
-+{
-+	const size_t size = sizeof(sync_serial_settings);
-+	sync_serial_settings new_line;
-+	sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
-+	struct port *port = dev_to_port(dev);
-+	unsigned long flags;
-+	int i, clk;
-+
-+	if (cmd != SIOCWANDEV)
-+		return hdlc_ioctl(dev, ifr, cmd);
-+
-+	switch(ifr->ifr_settings.type) {
-+	case IF_GET_IFACE:
-+		ifr->ifr_settings.type = IF_IFACE_V35;
-+		if (ifr->ifr_settings.size < size) {
-+			ifr->ifr_settings.size = size; /* data size wanted */
-+			return -ENOBUFS;
-+		}
-+		memset(&new_line, 0, sizeof(new_line));
-+		new_line.clock_type = port->clock_type;
-+		new_line.clock_rate = port->clock_rate;
-+		new_line.loopback = port->loopback;
-+		if (copy_to_user(line, &new_line, size))
-+			return -EFAULT;
-+
-+		if (!port->chan_buf)
-+			return 0;
-+
-+		dma_sync_single(&dev->dev, port->chan_rx_buf_phys,
-+				chan_rx_buf_len(port), DMA_FROM_DEVICE);
-+		printk(KERN_DEBUG "RX:\n");
-+		for (i = 0; i < chan_rx_buf_len(port); i++) {
-+			if (i % 32 == 0)
-+				printk(KERN_DEBUG "%03X ", i);
-+			printk("%02X%c", chan_rx_buf(port)[i],
-+			       (i + 1) % 32 ? ' ' : '\n');
-+		}
-+
-+#if 0
-+		printk(KERN_DEBUG "TX:\n");
-+		for (i = 0; i < /*CHAN_TX_FRAMES * 2*/ chan_tx_buf_len(port)
-+			     + chan_tx_lists_len(port); i++) {
-+			if (i % 32 == 0)
-+				printk(KERN_DEBUG "%03X ", i);
-+			printk("%02X%c", chan_tx_buf(port)[i],
-+			       (i + 1) % 32 ? ' ' : '\n');
-+		}
-+#endif
-+		port->msg_count = 10;
-+		return 0;
-+
-+	case IF_IFACE_SYNC_SERIAL:
-+	case IF_IFACE_V35:
-+		if(!capable(CAP_NET_ADMIN))
-+			return -EPERM;
-+		if (copy_from_user(&new_line, line, size))
-+			return -EFAULT;
-+
-+		clk = new_line.clock_type;
-+		if (port->plat->set_clock)
-+			clk = port->plat->set_clock(port->id, clk);
-+
-+		if (clk != CLOCK_EXT && clk != CLOCK_INT)
-+			return -EINVAL;	/* No such clock setting */
-+
-+		if (new_line.loopback != 0 && new_line.loopback != 1)
-+			return -EINVAL;
-+
-+		port->clock_type = clk; /* Update settings */
-+		/* FIXME port->clock_rate = new_line.clock_rate */;
-+		port->loopback = new_line.loopback;
-+
-+		spin_lock_irqsave(&npe_lock, flags);
-+
-+		if (port->chan_open_count || port->hdlc_open) {
-+			hss_config_set_line(port);
-+			hss_config_load(port);
-+		}
-+		if (port->loopback || port->carrier)
-+			netif_carrier_on(port->netdev);
-+		else
-+			netif_carrier_off(port->netdev);
-+		spin_unlock_irqrestore(&npe_lock, flags);
-+
-+		return 0;
-+
-+	default:
-+		return hdlc_ioctl(dev, ifr, cmd);
-+	}
-+}
-+
-+/*****************************************************************************
-+ * channelized (G.704) operation
-+ ****************************************************************************/
-+
-+static void g704_rx_framer(struct port *port, unsigned int offset)
-+{
-+	u8 *data = chan_rx_buf(port) + sub_offset(offset, CHAN_RX_TRIGGER,
-+						  CHAN_RX_FRAMES);
-+	unsigned int bit, frame, bad_even = 0, bad_odd = 0, cnt;
-+	unsigned int is_first = port->just_set_offset;
-+	u8 zeros_even, zeros_odd, ones_even, ones_odd;
-+	enum alignment aligned;
-+
-+	port->just_set_offset = 0;
-+	dma_sync_single(port->dev, port->chan_rx_buf_phys, CHAN_RX_FRAMES,
-+			DMA_FROM_DEVICE);
-+
-+	/* check if aligned first */
-+	for (frame = 0; frame < CHAN_RX_TRIGGER &&
-+		     (bad_even <= MAX_CHAN_RX_BAD_SYNC ||
-+		      bad_odd <= MAX_CHAN_RX_BAD_SYNC); frame += 2) {
-+		u8 ve = data[frame];
-+		u8 vo = data[frame + 1];
-+
-+		if ((ve & 0x7F) != 0x1B || !(vo & 0x40))
-+			bad_even++;
-+
-+		if ((vo & 0x7F) != 0x1B || !(ve & 0x40))
-+			bad_odd++;
-+	}
-+
-+	if (bad_even <= MAX_CHAN_RX_BAD_SYNC)
-+		aligned = EVEN_FIRST;
-+	else if (bad_odd <= MAX_CHAN_RX_BAD_SYNC)
-+		aligned = ODD_FIRST;
-+	else
-+		aligned = NOT_ALIGNED;
-+
-+	if (aligned != NOT_ALIGNED) {
-+		if (aligned == port->aligned)
-+			return; /* no change */
-+		if (printk_ratelimit())
-+			printk(KERN_INFO "HSS-%i: synchronized at %u (%s frame"
-+			       " first)\n", port->id, port->frame_sync_offset,
-+			       aligned == EVEN_FIRST ? "even" : "odd");
-+		port->aligned = aligned;
-+
-+		atomic_inc(&port->chan_tx_irq_number);
-+		wake_up_interruptible(&port->chan_tx_waitq);
-+		atomic_inc(&port->chan_rx_irq_number);
-+		wake_up_interruptible(&port->chan_rx_waitq);
-+		return;
-+	}
-+
-+	/* not aligned */
-+	if (port->aligned != NOT_ALIGNED && printk_ratelimit()) {
-+		printk(KERN_INFO "HSS-%i: lost alignment\n", port->id);
-+		port->aligned = NOT_ALIGNED;
-+#if DEBUG_FRAMER
-+		for (cnt = 0; cnt < CHAN_RX_FRAMES; cnt++)
-+			printk("%c%02X%s", cnt == offset ? '>' : ' ',
-+			       chan_rx_buf(port)[cnt],
-+			       (cnt + 1) % 32 ? "" : "\n");
-+#endif
-+
-+		for (cnt = 0; cnt < MAX_CHAN_DEVICES; cnt++)
-+			if (port->chan_devices[cnt]) {
-+				set_bit(TX_ERROR_BIT, &port->chan_devices[cnt]
-+					->errors_bitmap);
-+				set_bit(RX_ERROR_BIT, &port->chan_devices[cnt]
-+					->errors_bitmap);
-+			}
-+		atomic_inc(&port->chan_tx_irq_number);
-+		wake_up_interruptible(&port->chan_tx_waitq);
-+		atomic_inc(&port->chan_rx_irq_number);
-+		wake_up_interruptible(&port->chan_rx_waitq);
-+	}
-+
-+	if (is_first)
-+		return;
-+
-+	zeros_even = zeros_odd = 0;
-+	ones_even = ones_odd = 0xFF;
-+	for (frame = 0; frame < CHAN_RX_TRIGGER; frame += 2) {
-+		zeros_even |= data[frame];
-+		zeros_odd |= data[frame + 1];
-+		ones_even &= data[frame];
-+		ones_odd &= data[frame + 1];
-+	}
-+
-+	for (bit = 0; bit < 7; bit++) {
-+		if ((zeros_even & ~0x9B) == 0 && (ones_even & 0x1B) == 0x1B &&
-+		    (ones_odd & 0x40) == 0x40) {
-+			aligned = EVEN_FIRST; /* maybe */
-+			break;
-+		}
-+		if ((zeros_odd & ~0x9B) == 0 && (ones_odd & 0x1B) == 0x1B &&
-+		    (ones_even & 0x40) == 0x40) {
-+			aligned = ODD_FIRST; /* maybe */
-+			break;
-+		}
-+		zeros_even <<= 1;
-+		ones_even = ones_even << 1 | 1;
-+		zeros_odd <<= 1;
-+		ones_odd = ones_odd << 1 | 1;
-+	}
-+
-+	port->frame_sync_offset += port->frame_size - bit;
-+	port->frame_sync_offset %= port->frame_size;
-+	port->just_set_offset = 1;
-+
-+#if DEBUG_FRAMER
-+	if (bit == 7)
-+		printk(KERN_DEBUG "HSS-%i: trying frame sync at %u\n",
-+		       port->id, port->frame_sync_offset);
-+	else
-+		printk(KERN_DEBUG "HSS-%i: found possible frame sync pattern at"
-+		       " %u (%s frame first)\n", port->id,
-+		       port->frame_sync_offset,
-+		       aligned == EVEN_FIRST ? "even" : "odd");
-+#endif
-+
-+	hss_config_set_rx_frame(port);
-+	hss_config_load(port);
-+}
-+
-+static void chan_process_tx_irq(struct chan_device *chan_dev, int offset)
-+{
-+	/* in bytes */
-+	unsigned int buff_len = CHAN_TX_FRAMES * chan_dev->chan_count;
-+	unsigned int list_len = CHAN_TX_LIST_FRAMES * chan_dev->chan_count;
-+	int eaten, last_offset = chan_dev->port->chan_last_tx * list_len;
-+
-+	offset *= list_len;
-+	eaten = sub_offset(offset, last_offset, buff_len);
-+
-+	if (chan_dev->tx_count > eaten + 2 * list_len) {
-+		/* two pages must be reserved for the transmitter */
-+		chan_dev->tx_first += eaten;
-+		chan_dev->tx_first %= buff_len;
-+		chan_dev->tx_count -= eaten;
-+	} else {
-+		/* FIXME check
-+		   0
-+		   1 tx_first (may still be transmited)
-+		   2 tx_offset (currently reported by the NPE)
-+		   3 tx_first + 2 * list_len (free to write here)
-+		   4
-+		   5
-+		*/
-+
-+		/* printk(KERN_DEBUG "TX buffer underflow\n"); */
-+		chan_dev->tx_first = sub_offset(offset, list_len, buff_len);
-+		chan_dev->tx_count = 2 * list_len; /* reserve */
-+		set_bit(TX_ERROR_BIT, &chan_dev->errors_bitmap);
-+	}
-+}
-+
-+static void chan_process_rx_irq(struct chan_device *chan_dev, int offset)
-+{
-+	/* in bytes */
-+	unsigned int buff_len = CHAN_RX_FRAMES * chan_dev->chan_count;
-+	unsigned int trig_len = CHAN_RX_TRIGGER * chan_dev->chan_count;
-+	int last_offset = chan_dev->port->chan_last_rx * chan_dev->chan_count;
-+
-+	offset *= chan_dev->chan_count;
-+	chan_dev->rx_count += sub_offset(offset, last_offset + trig_len,
-+					 buff_len) + trig_len;
-+	if (chan_dev->rx_count > buff_len - 2 * trig_len) {
-+		/* two pages - offset[0] and offset[1] are lost - FIXME check */
-+		/* printk(KERN_DEBUG "RX buffer overflow\n"); */
-+		chan_dev->rx_first = (offset + 2 * trig_len) % buff_len;
-+		chan_dev->rx_count = buff_len - 2 * trig_len;
-+		set_bit(RX_ERROR_BIT, &chan_dev->errors_bitmap);
-+	}
-+}
-+
-+static void hss_chan_irq(void *pdev)
-+{
-+	struct port *port = pdev;
-+	u32 v;
-+
-+#if DEBUG_RX
-+	printk(KERN_DEBUG DRV_NAME ": hss_chan_irq\n");
-+#endif
-+	spin_lock(&npe_lock);
-+	while ((v = qmgr_get_entry(queue_ids[port->id].chan))) {
-+		unsigned int first, errors, tx_list, rx_frame;
-+		int i, bad;
-+
-+		first = v >> 24;
-+		errors = (v >> 16) & 0xFF;
-+		tx_list = (v >> 8) & 0xFF;
-+		rx_frame = v & 0xFF;
-+
-+		if (port->msg_count) {
-+			printk(KERN_DEBUG "chan_irq hss %i jiffies %lu first"
-+			       " 0x%02X errors 0x%02X tx_list 0x%02X rx_frame"
-+			       " 0x%02X\n", port->id, jiffies, first, errors,
-+			       tx_list, rx_frame);
-+			port->msg_count--;
-+		}
-+
-+		BUG_ON(rx_frame % CHAN_RX_TRIGGER);
-+		BUG_ON(rx_frame >= CHAN_RX_FRAMES);
-+		BUG_ON(tx_list >= CHAN_TX_LISTS);
-+
-+		bad = port->mode == MODE_G704 && port->aligned == NOT_ALIGNED;
-+		if (!bad && tx_list != port->chan_last_tx) {
-+			if (tx_list != (port->chan_last_tx + 1) % CHAN_TX_LISTS)
-+				printk(KERN_DEBUG "Skipped an IRQ? Tx last %i"
-+				       " current %i\n", port->chan_last_tx,
-+				       tx_list);
-+			for (i = 0; i < MAX_CHAN_DEVICES; i++) {
-+				if (!port->chan_devices[i] ||
-+				    !port->chan_devices[i]->open_count)
-+					continue;
-+				chan_process_tx_irq(port->chan_devices[i],
-+						    tx_list);
-+			}
-+			atomic_inc(&port->chan_tx_irq_number);
-+#if 0
-+			printk(KERN_DEBUG "wakeing up TX jiff %lu\n",
-+			       jiffies, errors);
-+#endif
-+			wake_up_interruptible(&port->chan_tx_waitq);
-+		}
-+
-+		if (rx_frame != (port->chan_last_rx + CHAN_RX_TRIGGER) %
-+		    CHAN_RX_FRAMES)
-+			printk(KERN_DEBUG "Skipped an IRQ? Rx last %i"
-+			       " current %i\n", port->chan_last_rx, rx_frame);
-+
-+		if (port->mode == MODE_G704)
-+			g704_rx_framer(port, rx_frame);
-+
-+		if (!bad &&
-+		    (port->mode != MODE_G704 || port->aligned != NOT_ALIGNED)) {
-+			for (i = 0; i < MAX_CHAN_DEVICES; i++) {
-+				if (!port->chan_devices[i] ||
-+				    !port->chan_devices[i]->open_count)
-+					continue;
-+				chan_process_rx_irq(port->chan_devices[i],
-+						    rx_frame);
-+			}
-+			atomic_inc(&port->chan_rx_irq_number);
-+			wake_up_interruptible(&port->chan_rx_waitq);
-+		}
-+		port->chan_last_tx = tx_list;
-+		port->chan_last_rx = rx_frame;
-+	}
-+	spin_unlock(&npe_lock);
-+}
-+
-+
-+static int hss_prepare_chan(struct port *port)
-+{
-+	int err;
-+
-+	if ((err = hss_config_load_firmware(port)))
-+		return err;
-+
-+	if ((err = qmgr_request_queue(queue_ids[port->id].chan,
-+				      CHAN_QUEUE_LEN, 0, 0)))
-+		return err;
-+
-+	if (!(port->chan_buf = kmalloc(chan_tx_buf_len(port) +
-+				       chan_tx_lists_len(port) +
-+				       chan_rx_buf_len(port), GFP_KERNEL))) {
-+		goto release_queue;
-+		err = -ENOBUFS;
-+	}
-+
-+	port->chan_tx_buf_phys = dma_map_single(port->dev, chan_tx_buf(port),
-+						chan_tx_buf_len(port) +
-+						chan_tx_lists_len(port),
-+						DMA_TO_DEVICE);
-+	if (dma_mapping_error(port->chan_tx_buf_phys)) {
-+		err = -EIO;
-+		goto free;
-+	}
-+
-+	port->chan_rx_buf_phys = dma_map_single(port->dev, chan_rx_buf(port),
-+						chan_rx_buf_len(port),
-+						DMA_FROM_DEVICE);
-+	if (dma_mapping_error(port->chan_rx_buf_phys)) {
-+		err = -EIO;
-+		goto unmap_tx;
-+	}
-+
-+	qmgr_set_irq(queue_ids[port->id].chan, QUEUE_IRQ_SRC_NOT_EMPTY,
-+		     hss_chan_irq, port);
-+	qmgr_enable_irq(queue_ids[port->id].chan);
-+	hss_chan_irq(port);
-+	return 0;
-+
-+unmap_tx:
-+	dma_unmap_single(port->dev, port->chan_tx_buf_phys,
-+			 chan_tx_buf_len(port) + chan_tx_lists_len(port),
-+			 DMA_TO_DEVICE);
-+free:
-+	kfree(port->chan_buf);
-+	port->chan_buf = NULL;
-+release_queue:
-+	qmgr_release_queue(queue_ids[port->id].chan);
-+	return err;
-+}
-+
-+void hss_chan_stop(struct port *port)
-+{
-+	if (!port->chan_open_count && !port->hdlc_open)
-+		qmgr_disable_irq(queue_ids[port->id].chan);
-+
-+	hss_config_stop_chan(port);
-+	hss_config_set_lut(port);
-+	hss_config_load(port);
-+
-+	if (!port->chan_open_count && !port->hdlc_open) {
-+		dma_unmap_single(port->dev, port->chan_tx_buf_phys,
-+				 chan_tx_buf_len(port) +
-+				 chan_tx_lists_len(port), DMA_TO_DEVICE);
-+		dma_unmap_single(port->dev, port->chan_rx_buf_phys,
-+				 chan_rx_buf_len(port), DMA_FROM_DEVICE);
-+		kfree(port->chan_buf);
-+		port->chan_buf = NULL;
-+		qmgr_release_queue(queue_ids[port->id].chan);
-+	}
-+}
-+
-+static int hss_chan_open(struct inode *inode, struct file *file)
-+{
-+	struct chan_device *chan_dev = inode_to_chan_dev(inode);
-+	struct port *port = chan_dev->port;
-+	unsigned long flags;
-+	int i, err = 0;
-+
-+	spin_lock_irqsave(&npe_lock, flags);
-+
-+	if (chan_dev->open_count) {
-+		if (chan_dev->excl_open || (file->f_flags & O_EXCL))
-+			err = -EBUSY;
-+		else
-+			chan_dev->open_count++;
-+		goto out;
-+	}
-+
-+	if (port->mode == MODE_HDLC) {
-+		err = -ENOSYS;
-+		goto out;
-+	}
-+
-+	if (port->mode == MODE_G704 && port->channels[0] == chan_dev->id) {
-+		err = -EBUSY; /* channel #0 is used for G.704 signaling */
-+		goto out;
-+	}
-+	for (i = MAX_CHANNELS; i > port->frame_size / 8; i--)
-+		if (port->channels[i - 1] == chan_dev->id) {
-+			err = -ECHRNG; /* frame too short */
-+			goto out;
-+		}
-+
-+	chan_dev->rx_first = chan_dev->tx_first = 0;
-+	chan_dev->rx_count = chan_dev->tx_count = 0;
-+	clear_bit(TX_ERROR_BIT, &chan_dev->errors_bitmap);
-+	clear_bit(RX_ERROR_BIT, &chan_dev->errors_bitmap);
-+
-+	if (!port->chan_open_count && !port->hdlc_open) {
-+		if (port->plat->open)
-+			if ((err = port->plat->open(port->id, port->netdev,
-+						    hss_hdlc_set_carrier)))
-+				goto out;
-+		if ((err = hss_prepare_chan(port))) {
-+			if (port->plat->close)
-+				port->plat->close(port->id, port->netdev);
-+			goto out;
-+		}
-+	}
-+
-+	hss_config_stop_chan(port);
-+	chan_dev->open_count++;
-+	port->chan_open_count++;
-+	chan_dev->excl_open = !!file->f_flags & O_EXCL;
-+
-+	hss_config_set_lut(port);
-+	hss_config_load(port);
-+	hss_config_start_chan(port);
-+out:
-+	spin_unlock_irqrestore(&npe_lock, flags);
-+	return err;
-+}
-+
-+static int hss_chan_release(struct inode *inode, struct file *file)
-+{
-+	struct chan_device *chan_dev = inode_to_chan_dev(inode);
-+	struct port *port = chan_dev->port;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&npe_lock, flags);
-+
-+	if (!--chan_dev->open_count) {
-+		if (!--port->chan_open_count && !port->hdlc_open) {
-+			hss_chan_stop(port);
-+			if (port->plat->close)
-+				port->plat->close(port->id, port->netdev);
-+		} else {
-+			hss_config_stop_chan(port);
-+			hss_config_set_lut(port);
-+			hss_config_set_line(port); //
-+			hss_config_start_chan(port);
-+		}
-+	}
-+
-+	spin_unlock_irqrestore(&npe_lock, flags);
-+	return 0;
-+}
-+
-+static ssize_t hss_chan_read(struct file *file, char __user *buf, size_t count,
-+			     loff_t *f_pos)
-+{
-+	struct chan_device *chan_dev = inode_to_chan_dev
-+		(file->f_path.dentry->d_inode);
-+	struct port *port = chan_dev->port;
-+	unsigned long flags;
-+	u8 *rx_buf;
-+	int res = 0, loops = 0;
-+
-+	spin_lock_irqsave(&npe_lock, flags);
-+
-+	while (1) {
-+		int prev_irq = atomic_read(&port->chan_rx_irq_number);
-+#if 0
-+		if (test_and_clear_bit(RX_ERROR_BIT, &chan_dev->errors_bitmap)
-+		    || (port->mode == G704 && port->aligned == NOT_ALIGNED)) {
-+			res = -EIO;
-+			goto out;
-+		}
-+#endif
-+		if (count == 0)
-+			goto out;	/* no need to wait */
-+
-+		if (chan_dev->rx_count)
-+			break;
-+
-+		spin_unlock_irqrestore(&npe_lock, flags);
-+		loops++;
-+		if ((res = wait_event_interruptible
-+		     (port->chan_rx_waitq,
-+		      atomic_read(&port->chan_rx_irq_number) != prev_irq)))
-+			goto out;
-+		spin_lock_irqsave(&npe_lock, flags);
-+		continue;
-+	}
-+
-+	dma_sync_single(port->dev, port->chan_rx_buf_phys,
-+			chan_rx_buf_len(port), DMA_FROM_DEVICE);
-+
-+#if 0
-+	if (loops > 1)
-+		printk(KERN_DEBUG "ENTRY rx_first %u rx_count %u count %i"
-+		       " last_rx %u loops %i\n", chan_dev->rx_first,
-+		       chan_dev->rx_count, count, port->chan_last_rx, loops);
-+#endif
-+	rx_buf = chan_rx_buf(port);
-+	while (chan_dev->rx_count > 0 && res < count) {
-+		unsigned int chan = chan_dev->rx_first % chan_dev->chan_count;
-+		unsigned int frame = chan_dev->rx_first / chan_dev->chan_count;
-+
-+		chan = chan_dev->log_channels[chan];
-+		if (put_user(rx_buf[chan * CHAN_RX_FRAMES + frame], buf++)) {
-+			res = -EFAULT;
-+			goto out;
-+		}
-+		chan_dev->rx_first++;
-+		chan_dev->rx_first %= CHAN_RX_FRAMES * chan_dev->chan_count;
-+		chan_dev->rx_count--;
-+		res++;
-+	}
-+out:
-+#if 0
-+	printk(KERN_DEBUG "EXIT  rx_first %u rx_count %u res %i\n",
-+	       chan_dev->rx_first, chan_dev->rx_count, res);
-+#endif
-+	spin_unlock_irqrestore(&npe_lock, flags);
-+	return res;
-+}
-+
-+static ssize_t hss_chan_write(struct file *file, const char __user *buf,
-+			      size_t count, loff_t *f_pos)
-+{
-+	struct chan_device *chan_dev = inode_to_chan_dev
-+		(file->f_path.dentry->d_inode);
-+	struct port *port = chan_dev->port;
-+	unsigned long flags;
-+	u8 *tx_buf;
-+	int res = 0, loops = 0;
-+
-+	spin_lock_irqsave(&npe_lock, flags);
-+	while (1) {
-+		int prev_irq = atomic_read(&port->chan_tx_irq_number);
-+#if 0
-+		if (test_and_clear_bit(TX_ERROR_BIT, &chan_dev->errors_bitmap)
-+		    || (port->mode == G704 && port->aligned == NOT_ALIGNED)) {
-+			res = -EIO;
-+			goto out;
-+		}
-+#endif
-+		if (count == 0)
-+			goto out;	/* no need to wait */
-+		
-+		if (chan_dev->tx_count < CHAN_TX_FRAMES * chan_dev->chan_count)
-+			break;
-+
-+		spin_unlock_irqrestore(&npe_lock, flags);
-+		loops++;
-+		if ((res = wait_event_interruptible
-+		     (port->chan_tx_waitq,
-+		      atomic_read (&port->chan_tx_irq_number) != prev_irq)))
-+			goto out;
-+		spin_lock_irqsave(&npe_lock, flags);
-+		continue;
-+	}
-+
-+#if 0
-+	if (loops > 1)
-+		printk(KERN_DEBUG "ENTRY TX_first %u tx_count %u count %i"
-+		       " last_tx %u loops %i\n", chan_dev->tx_first,
-+		       chan_dev->tx_count, count, port->chan_last_tx, loops);
-+#endif
-+	tx_buf = chan_tx_buf(port);
-+	while (chan_dev->tx_count < CHAN_TX_FRAMES * chan_dev->chan_count &&
-+	       res < count) {
-+		unsigned int tail, chan, frame;
-+
-+		tail = (chan_dev->tx_first + chan_dev->tx_count) %
-+			(CHAN_TX_FRAMES * chan_dev->chan_count);
-+		chan = tail % chan_dev->chan_count;
-+		frame = tail / chan_dev->chan_count;
-+		chan = chan_dev->log_channels[chan];
-+
-+		if (get_user(tx_buf[chan * CHAN_TX_FRAMES + frame], buf++)) {
-+			printk(KERN_DEBUG "BUG? TX %u %u %u\n",
-+			       tail, chan, frame);
-+			res = -EFAULT;
-+			goto out_sync;
-+		}
-+		chan_dev->tx_count++;
-+		res++;
-+	}
-+out_sync:
-+	dma_sync_single(port->dev, port->chan_tx_buf_phys,
-+			chan_tx_buf_len(port), DMA_TO_DEVICE);
-+out:
-+#if 0
-+	printk(KERN_DEBUG "EXIT  TX_first %u tx_count %u res %i\n",
-+	       chan_dev->tx_first, chan_dev->tx_count, res);
-+#endif
-+	spin_unlock_irqrestore(&npe_lock, flags);
-+	return res;
-+}
-+
-+
-+static unsigned int hss_chan_poll(struct file *file, poll_table *wait)
-+{
-+	struct chan_device *chan_dev = inode_to_chan_dev
-+		(file->f_path.dentry->d_inode);
-+	struct port *port = chan_dev->port;
-+	unsigned long flags;
-+	unsigned int mask = 0;
-+
-+	spin_lock_irqsave(&npe_lock, flags);
-+	poll_wait(file, &port->chan_tx_waitq, wait);
-+	poll_wait(file, &port->chan_rx_waitq, wait);
-+
-+	if (chan_dev->tx_count < CHAN_TX_FRAMES * chan_dev->chan_count)
-+		mask |= POLLOUT | POLLWRNORM;
-+	if (chan_dev->rx_count)
-+		mask |= POLLIN | POLLRDNORM;
-+	spin_unlock_irqrestore(&npe_lock, flags);
-+	return mask;
-+}
-+
-+/*****************************************************************************
-+ * channelized device sysfs attributes
-+ ****************************************************************************/
-+
-+static ssize_t chan_show_chan(struct device *dev, struct device_attribute *attr,
-+			      char *buf)
-+{
-+	struct chan_device *chan_dev = dev_get_drvdata(dev);
-+
-+	return print_channels(chan_dev->port, buf, chan_dev->id);
-+}
-+
-+static ssize_t chan_set_chan(struct device *dev, struct device_attribute *attr,
-+			     const char *buf, size_t len)
-+{
-+	struct chan_device *chan_dev = dev_get_drvdata(dev);
-+	struct port *port = chan_dev->port;
-+	unsigned long flags;
-+	unsigned int ch;
-+	size_t orig_len = len;
-+	int err;
-+
-+	if (len && buf[len - 1] == '\n')
-+		len--;
-+
-+	if (len != 7 || memcmp(buf, "destroy", 7))
-+		return -EINVAL;
-+
-+	spin_lock_irqsave(&npe_lock, flags);
-+	cdev_del(&chan_dev->cdev);
-+
-+	for (ch = 0; ch < MAX_CHANNELS; ch++)
-+		if (port->channels[ch] == chan_dev->id)
-+			port->channels[ch] = CHANNEL_UNUSED;
-+	port->chan_devices[chan_dev->id] = NULL;
-+	kfree(chan_dev);
-+	spin_unlock_irqrestore(&npe_lock, flags);
-+
-+	if ((err = device_schedule_callback(dev, device_unregister)))
-+		return err;
-+	return orig_len;
-+}
-+
-+static struct device_attribute chan_attr =
-+	__ATTR(channels, 0644, chan_show_chan, chan_set_chan);
-+
-+/*****************************************************************************
-+ * main sysfs attributes
-+ ****************************************************************************/
-+
-+static const struct file_operations chan_fops = {
-+	.owner   = THIS_MODULE,
-+	.llseek  = no_llseek,
-+	.read    = hss_chan_read,
-+	.write   = hss_chan_write,
-+	.poll    = hss_chan_poll,
-+	.open    = hss_chan_open,
-+	.release = hss_chan_release,
-+};
-+
-+static ssize_t create_chan(struct device *dev, struct device_attribute *attr,
-+			   const char *buf, size_t len)
-+{
-+	struct port *port = dev_get_drvdata(dev);
-+	struct chan_device *chan_dev;
-+	u8 channels[MAX_CHANNELS];
-+	size_t orig_len = len;
-+	unsigned long flags;
-+	unsigned int ch, id;
-+	int minor, err;
-+
-+	if ((err = parse_channels(&buf, &len, channels)) < 1)
-+		return err;
-+
-+	if (!(chan_dev = kzalloc(sizeof(struct chan_device), GFP_KERNEL)))
-+		return -ENOBUFS;
-+
-+	spin_lock_irqsave(&npe_lock, flags);
-+
-+	if (port->mode != MODE_RAW && port->mode != MODE_G704) {
-+		err = -EINVAL;
-+		goto free;
-+	}
-+
-+	for (ch = 0; ch < MAX_CHANNELS; ch++)
-+		if (channels[ch] && port->channels[ch] != CHANNEL_UNUSED) {
-+			printk(KERN_DEBUG "Channel #%i already in use\n", ch);
-+			err = -EBUSY;
-+			goto free;
-+		}
-+
-+	for (id = 0; id < MAX_CHAN_DEVICES; id++)
-+		if (port->chan_devices[id] == NULL)
-+			break;
-+
-+	if (id == MAX_CHAN_DEVICES) {
-+		err = -EBUSY;
-+		goto free;
-+	}
-+
-+	for (ch = 0; ch < MAX_CHANNELS; ch++)
-+		if (channels[ch])
-+			break;
-+
-+	minor = port->id * MAX_CHAN_DEVICES + ch;
-+	chan_dev->id = id;
-+	chan_dev->port = port;
-+	chan_dev->dev = device_create(hss_class, dev, MKDEV(chan_major, minor),
-+				      "hss%uch%u", port->id, ch);
-+	if (IS_ERR(chan_dev->dev)) {
-+		err = PTR_ERR(chan_dev->dev);
-+		goto free;
-+	}
-+
-+	cdev_init(&chan_dev->cdev, &chan_fops);
-+	chan_dev->cdev.owner = THIS_MODULE;
-+	if ((err = cdev_add(&chan_dev->cdev, MKDEV(chan_major, minor), 1)))
-+		goto destroy_device;
-+
-+	for (ch = 0; ch < MAX_CHANNELS; ch++)
-+		if (channels[ch])
-+			port->channels[ch] = id;
-+	port->chan_devices[id] = chan_dev;
-+	dev_set_drvdata(chan_dev->dev, chan_dev);
-+	BUG_ON(device_create_file(chan_dev->dev, &chan_attr));
-+
-+	spin_unlock_irqrestore(&npe_lock, flags);
-+	return orig_len;
-+
-+destroy_device:
-+	device_unregister(chan_dev->dev);
-+free:
-+	kfree(chan_dev);
-+	spin_unlock_irqrestore(&npe_lock, flags);
-+	return err;
-+}
-+
-+static ssize_t show_hdlc_chan(struct device *dev, struct device_attribute *attr,
-+			      char *buf)
-+{
-+	return print_channels(dev_get_drvdata(dev), buf, CHANNEL_HDLC);
-+}
-+
-+static ssize_t set_hdlc_chan(struct device *dev, struct device_attribute *attr,
-+			     const char *buf, size_t len)
-+{
-+	struct port *port = dev_get_drvdata(dev);
-+	u8 channels[MAX_CHANNELS];
-+	size_t orig_len = len;
-+	unsigned long flags;
-+	unsigned int ch;
-+	int err;
-+
-+	if ((err = parse_channels(&buf, &len, channels)) < 0)
-+		return err;
-+
-+	spin_lock_irqsave(&npe_lock, flags);
-+
-+	if (port->mode != MODE_RAW && port->mode != MODE_G704) {
-+		err = -EINVAL;
-+		goto err;
-+	}
-+
-+	for (ch = 0; ch < MAX_CHANNELS; ch++)
-+		if (channels[ch] &&
-+		    port->channels[ch] != CHANNEL_UNUSED &&
-+		    port->channels[ch] != CHANNEL_HDLC) {
-+			printk(KERN_DEBUG "Channel #%i already in use\n", ch);
-+			err = -EBUSY;
-+			goto err;
-+		}
-+
-+	for (ch = 0; ch < MAX_CHANNELS; ch++)
-+		if (channels[ch])
-+			port->channels[ch] = CHANNEL_HDLC;
-+		else if (port->channels[ch] == CHANNEL_HDLC)
-+			port->channels[ch] = CHANNEL_UNUSED;
-+
-+	if (port->chan_open_count || port->hdlc_open) {
-+		hss_config_set_lut(port);
-+		hss_config_load(port);
-+	}
-+
-+	spin_unlock_irqrestore(&npe_lock, flags);
-+	return orig_len;
-+
-+err:
-+	spin_unlock_irqrestore(&npe_lock, flags);
-+	return err;
-+}
-+
-+static ssize_t show_clock_type(struct device *dev,
-+			       struct device_attribute *attr, char *buf)
-+{
-+	struct port *port = dev_get_drvdata(dev);
-+
-+	strcpy(buf, port->clock_type == CLOCK_INT ? "int\n" : "ext\n");
-+	return 5;
-+}
-+
-+static ssize_t set_clock_type(struct device *dev, struct device_attribute *attr,
-+			      const char *buf, size_t len)
-+{
-+	struct port *port = dev_get_drvdata(dev);
-+	size_t orig_len = len;
-+	unsigned long flags;
-+	unsigned int clk, err;
-+
-+	if (len && buf[len - 1] == '\n')
-+		len--;
-+
-+	if (len != 3)
-+		return -EINVAL;
-+	if (!memcmp(buf, "ext", 3))
-+		clk = CLOCK_EXT;
-+	else if (!memcmp(buf, "int", 3))
-+		clk = CLOCK_INT;
-+	else
-+		return -EINVAL;
-+
-+	spin_lock_irqsave(&npe_lock, flags);
-+	if (port->plat->set_clock)
-+		clk = port->plat->set_clock(port->id, clk);
-+	if (clk != CLOCK_EXT && clk != CLOCK_INT) {
-+		err = -EINVAL; /* plat->set_clock shouldn't change the state */
-+		goto err;
-+	}
-+	port->clock_type = clk;
-+	if (port->chan_open_count || port->hdlc_open) {
-+		hss_config_set_line(port);
-+		hss_config_load(port);
-+	}
-+	spin_unlock_irqrestore(&npe_lock, flags);
-+
-+	return orig_len;
-+err:
-+	spin_unlock_irqrestore(&npe_lock, flags);
-+	return err;
-+}
-+
-+static ssize_t show_clock_rate(struct device *dev,
-+			       struct device_attribute *attr, char *buf)
-+{
-+	struct port *port = dev_get_drvdata(dev);
-+
-+	sprintf(buf, "%u\n", port->clock_rate);
-+	return strlen(buf) + 1;
-+}
-+
-+static ssize_t set_clock_rate(struct device *dev, struct device_attribute *attr,
-+			      const char *buf, size_t len)
-+{
-+#if 0
-+	struct port *port = dev_get_drvdata(dev);
-+	size_t orig_len = len;
-+	unsigned long flags;
-+	unsigned int rate;
-+
-+	if (len && buf[len - 1] == '\n')
-+		len--;
-+
-+	if (get_number(&buf, &len, &rate, 1, 0xFFFFFFFFu))
-+		return -EINVAL;
-+	if (len)
-+		return -EINVAL;
-+
-+	spin_lock_irqsave(&npe_lock, flags);
-+	port->clock_rate = rate;
-+	spin_unlock_irqrestore(&npe_lock, flags);
-+	return orig_len;
-+#endif
-+	return -EINVAL; /* FIXME not yet supported */
-+}
-+
-+static ssize_t show_frame_size(struct device *dev,
-+			       struct device_attribute *attr, char *buf)
-+{
-+	struct port *port = dev_get_drvdata(dev);
-+
-+	if (port->mode != MODE_RAW && port->mode != MODE_G704)
-+		return -EINVAL;
-+
-+	sprintf(buf, "%u\n", port->frame_size);
-+	return strlen(buf) + 1;
-+}
-+
-+static ssize_t set_frame_size(struct device *dev, struct device_attribute *attr,
-+			      const char *buf, size_t len)
-+{
-+	struct port *port = dev_get_drvdata(dev);
-+	size_t ret = len;
-+	unsigned long flags;
-+	unsigned int size;
-+
-+	if (len && buf[len - 1] == '\n')
-+		len--;
-+
-+	if (get_number(&buf, &len, &size, MIN_FRAME_SIZE, MAX_FRAME_SIZE))
-+		return -EINVAL;
-+	if (len || size % 8 > 1)
-+		return -EINVAL;
-+
-+	spin_lock_irqsave(&npe_lock, flags);
-+	if (port->mode != MODE_RAW && port->mode != MODE_G704)
-+		ret = -EINVAL;
-+	else if (!port->chan_open_count && !port->hdlc_open)
-+		ret = -EBUSY;
-+	else {
-+		port->frame_size = size;
-+		port->frame_sync_offset = 0;
-+	}
-+	spin_unlock_irqrestore(&npe_lock, flags);
-+	return ret;
-+}
-+
-+static ssize_t show_frame_offset(struct device *dev,
-+				 struct device_attribute *attr, char *buf)
-+{
-+	struct port *port = dev_get_drvdata(dev);
-+
-+	sprintf(buf, "%u\n", port->frame_sync_offset);
-+	return strlen(buf) + 1;
-+}
-+
-+static ssize_t set_frame_offset(struct device *dev,
-+				struct device_attribute *attr,
-+				const char *buf, size_t len)
-+{
-+	struct port *port = dev_get_drvdata(dev);
-+	size_t orig_len = len;
-+	unsigned long flags;
-+	unsigned int offset;
-+
-+	if (len && buf[len - 1] == '\n')
-+		len--;
-+
-+	if (get_number(&buf, &len, &offset, 0, port->frame_size - 1))
-+		return -EINVAL;
-+	if (len)
-+		return -EINVAL;
-+
-+	spin_lock_irqsave(&npe_lock, flags);
-+
-+	port->frame_sync_offset = offset;
-+	if (port->chan_open_count || port->hdlc_open) {
-+		hss_config_set_rx_frame(port);
-+		hss_config_load(port);
-+	}
-+
-+	spin_unlock_irqrestore(&npe_lock, flags);
-+	return orig_len;
-+}
-+
-+static ssize_t show_loopback(struct device *dev, struct device_attribute *attr,
-+			     char *buf)
-+{
-+	struct port *port = dev_get_drvdata(dev);
-+
-+	sprintf(buf, "%u\n", port->loopback);
-+	return strlen(buf) + 1;
-+}
-+
-+static ssize_t set_loopback(struct device *dev, struct device_attribute *attr,
-+			    const char *buf, size_t len)
-+{
-+	struct port *port = dev_get_drvdata(dev);
-+	size_t orig_len = len;
-+	unsigned long flags;
-+	unsigned int lb;
-+
-+	if (len && buf[len - 1] == '\n')
-+		len--;
-+
-+	if (get_number(&buf, &len, &lb, 0, 1))
-+		return -EINVAL;
-+	if (len)
-+		return -EINVAL;
-+
-+	spin_lock_irqsave(&npe_lock, flags);
-+
-+	if (port->loopback != lb) {
-+		port->loopback = lb;
-+		if (port->chan_open_count || port->hdlc_open) {
-+			hss_config_set_core(port);
-+			hss_config_load(port);
-+		}
-+		if (port->loopback || port->carrier)
-+			netif_carrier_on(port->netdev);
-+		else
-+			netif_carrier_off(port->netdev);
-+	}
-+
-+	spin_unlock_irqrestore(&npe_lock, flags);
-+	return orig_len;
-+}
-+
-+static ssize_t show_mode(struct device *dev, struct device_attribute *attr,
-+			 char *buf)
-+{
-+	struct port *port = dev_get_drvdata(dev);
-+
-+	switch(port->mode) {
-+	case MODE_RAW:
-+		strcpy(buf, "raw\n");
-+		break;
-+	case MODE_G704:
-+		strcpy(buf, "g704\n");
-+		break;
-+	default:
-+		strcpy(buf, "hdlc\n");
-+		break;
-+	}
-+	return strlen(buf) + 1;
-+}
-+
-+static ssize_t set_mode(struct device *dev, struct device_attribute *attr,
-+			const char *buf, size_t len)
-+{
-+	struct port *port = dev_get_drvdata(dev);
-+	size_t ret = len;
-+	unsigned long flags;
-+
-+	if (len && buf[len - 1] == '\n')
-+		len--;
-+
-+	spin_lock_irqsave(&npe_lock, flags);
-+
-+	if (port->chan_open_count || port->hdlc_open) {
-+		ret = -EBUSY;
-+	} else if (len == 4 && !memcmp(buf, "hdlc", 4))
-+		port->mode = MODE_HDLC;
-+	else if (len == 3 && !memcmp(buf, "raw", 3))
-+		port->mode = MODE_RAW;
-+	else if (len == 4 && !memcmp(buf, "g704", 4))
-+		port->mode = MODE_G704;
-+	else
-+		ret = -EINVAL;
-+
-+	spin_unlock_irqrestore(&npe_lock, flags);
-+	return ret;
-+}
-+
-+static struct device_attribute hss_attrs[] = {
-+	__ATTR(create_chan, 0200, NULL, create_chan),
-+	__ATTR(hdlc_chan, 0644, show_hdlc_chan, set_hdlc_chan),
-+	__ATTR(clock_type, 0644, show_clock_type, set_clock_type),
-+	__ATTR(clock_rate, 0644, show_clock_rate, set_clock_rate),
-+	__ATTR(frame_size, 0644, show_frame_size, set_frame_size),
-+	__ATTR(frame_offset, 0644, show_frame_offset, set_frame_offset),
-+	__ATTR(loopback, 0644, show_loopback, set_loopback),
-+	__ATTR(mode, 0644, show_mode, set_mode),
-+};
-+
-+/*****************************************************************************
-+ * initialization
-+ ****************************************************************************/
-+
-+static int __devinit hss_init_one(struct platform_device *pdev)
-+{
-+	struct port *port;
-+	struct net_device *dev;
-+	hdlc_device *hdlc;
-+	int i, err;
-+
-+	if ((port = kzalloc(sizeof(*port), GFP_KERNEL)) == NULL)
-+		return -ENOMEM;
-+	platform_set_drvdata(pdev, port);
-+	port->id = pdev->id;
-+
-+	if ((port->npe = npe_request(0)) == NULL) {
-+		err = -ENOSYS;
-+		goto err_free;
-+	}
-+
-+	port->dev = &pdev->dev;
-+	port->plat = pdev->dev.platform_data;
-+	if ((port->netdev = dev = alloc_hdlcdev(port)) == NULL) {
-+		err = -ENOMEM;
-+		goto err_plat;
-+	}
-+
-+	SET_NETDEV_DEV(dev, &pdev->dev);
-+	hdlc = dev_to_hdlc(dev);
-+	hdlc->attach = hss_hdlc_attach;
-+	hdlc->xmit = hss_hdlc_xmit;
-+	dev->open = hss_hdlc_open;
-+	dev->stop = hss_hdlc_close;
-+	dev->do_ioctl = hss_hdlc_ioctl;
-+	dev->tx_queue_len = 100;
-+	port->clock_type = CLOCK_EXT;
-+	port->clock_rate = 2048000;
-+	port->frame_size = 256; /* E1 */
-+	memset(port->channels, CHANNEL_UNUSED, sizeof(port->channels));
-+	init_waitqueue_head(&port->chan_tx_waitq);
-+	init_waitqueue_head(&port->chan_rx_waitq);
-+	netif_napi_add(dev, &port->napi, hss_hdlc_poll, NAPI_WEIGHT);
-+
-+	if ((err = register_hdlc_device(dev))) /* HDLC mode by default */
-+		goto err_free_netdev;
-+
-+	for (i = 0; i < ARRAY_SIZE(hss_attrs); i++)
-+		BUG_ON(device_create_file(port->dev, &hss_attrs[i]));
-+
-+	printk(KERN_INFO "%s: HSS-%i\n", dev->name, port->id);
-+	return 0;
-+
-+err_free_netdev:
-+	free_netdev(dev);
-+err_plat:
-+	npe_release(port->npe);
-+	platform_set_drvdata(pdev, NULL);
-+err_free:
-+	kfree(port);
-+	return err;
-+}
-+
-+static int __devexit hss_remove_one(struct platform_device *pdev)
-+{
-+	struct port *port = platform_get_drvdata(pdev);
-+	int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(hss_attrs); i++)
-+		device_remove_file(port->dev, &hss_attrs[i]);
-+
-+	unregister_hdlc_device(port->netdev);
-+	free_netdev(port->netdev);
-+	npe_release(port->npe);
-+	platform_set_drvdata(pdev, NULL);
-+	kfree(port);
-+	return 0;
-+}
-+
-+static struct platform_driver drv = {
-+	.driver.name	= DRV_NAME,
-+	.probe		= hss_init_one,
-+	.remove		= hss_remove_one,
-+};
-+
-+static int __init hss_init_module(void)
-+{
-+	int err;
-+	dev_t rdev;
-+
-+	if ((ixp4xx_read_feature_bits() &
-+	     (IXP4XX_FEATURE_HDLC | IXP4XX_FEATURE_HSS)) !=
-+	    (IXP4XX_FEATURE_HDLC | IXP4XX_FEATURE_HSS))
-+		return -ENOSYS;
-+
-+	if ((err = alloc_chrdev_region(&rdev, 0, HSS_COUNT * MAX_CHAN_DEVICES,
-+				       "hss")))
-+		return err;
-+
-+	spin_lock_init(&npe_lock);
-+
-+	if (IS_ERR(hss_class = class_create(THIS_MODULE, "hss"))) {
-+		printk(KERN_ERR "Can't register device class 'hss'\n");
-+		err = PTR_ERR(hss_class);
-+		goto free_chrdev;
-+	}
-+	if ((err = platform_driver_register(&drv)))
-+		goto destroy_class;
-+
-+	chan_major = MAJOR(rdev);
-+	return 0;
-+
-+destroy_class:
-+	class_destroy(hss_class);
-+free_chrdev:
-+	unregister_chrdev_region(MKDEV(chan_major, 0),
-+				 HSS_COUNT * MAX_CHAN_DEVICES);
-+	return err;
-+}
-+
-+static void __exit hss_cleanup_module(void)
-+{
-+	platform_driver_unregister(&drv);
-+	class_destroy(hss_class);
-+	unregister_chrdev_region(MKDEV(chan_major, 0),
-+				 HSS_COUNT * MAX_CHAN_DEVICES);
-+}
-+
-+MODULE_AUTHOR("Krzysztof Halasa");
-+MODULE_DESCRIPTION("Intel IXP4xx HSS driver");
-+MODULE_LICENSE("GPL v2");
-+MODULE_ALIAS("platform:ixp4xx_hss");
-+module_init(hss_init_module);
-+module_exit(hss_cleanup_module);
diff --git a/target/linux/ixp4xx/patches-2.6.27/295-latch_led_driver.patch b/target/linux/ixp4xx/patches-2.6.27/295-latch_led_driver.patch
deleted file mode 100644
index 2d02533..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/295-latch_led_driver.patch
+++ /dev/null
@@ -1,199 +0,0 @@
---- a/drivers/leds/Kconfig
-+++ b/drivers/leds/Kconfig
-@@ -125,6 +125,12 @@ config LEDS_GPIO
- 	  outputs. To be useful the particular board must have LEDs
- 	  and they must be connected to the GPIO lines.
- 
-+config LEDS_LATCH
-+	tristate "LED Support for Memory Latched LEDs"
-+	depends on LEDS_CLASS
-+	help
-+		-- To Do --
-+
- config LEDS_CM_X270
- 	tristate "LED Support for the CM-X270 LEDs"
- 	depends on LEDS_CLASS && MACH_ARMCORE
---- /dev/null
-+++ b/drivers/leds/leds-latch.c
-@@ -0,0 +1,149 @@
-+/*
-+ * LEDs driver for Memory Latched Devices
-+ *
-+ * Copyright (C) 2008 Gateworks Corp.
-+ * Chris Lang <clang@gateworks.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/platform_device.h>
-+#include <linux/leds.h>
-+#include <linux/workqueue.h>
-+#include <asm/io.h>
-+#include <linux/spinlock.h>
-+
-+static unsigned int mem_keep = 0xFF;
-+static spinlock_t mem_lock;
-+static unsigned char *iobase;
-+
-+struct latch_led_data {
-+	struct led_classdev cdev;
-+	struct work_struct work;
-+	u8 new_level;
-+	u8 bit;
-+	void (*set_led)(u8 bit, enum led_brightness value);
-+};
-+
-+static void latch_set_led(u8 bit, enum led_brightness value)
-+{
-+	if (value == LED_OFF)
-+		mem_keep |= (0x1 << bit);
-+	else
-+		mem_keep &= ~(0x1 << bit);
-+
-+	writeb(mem_keep, iobase);
-+}
-+
-+static void latch_led_set(struct led_classdev *led_cdev,
-+	enum led_brightness value)
-+{
-+	struct latch_led_data *led_dat =
-+		container_of(led_cdev, struct latch_led_data, cdev);
-+
-+	spin_lock(mem_lock);
-+
-+	led_dat->set_led(led_dat->bit, value);
-+
-+	spin_unlock(mem_lock);
-+}
-+
-+static int latch_led_probe(struct platform_device *pdev)
-+{
-+	struct latch_led_platform_data *pdata = pdev->dev.platform_data;
-+	struct latch_led *cur_led;
-+	struct latch_led_data *leds_data, *led_dat;
-+	int i, ret = 0;
-+
-+	if (!pdata)
-+		return -EBUSY;
-+
-+	leds_data = kzalloc(sizeof(struct latch_led_data) * pdata->num_leds,
-+				GFP_KERNEL);
-+	if (!leds_data)
-+		return -ENOMEM;
-+
-+	for (i = 0; i < pdata->num_leds; i++) {
-+		cur_led = &pdata->leds[i];
-+		led_dat = &leds_data[i];
-+
-+		led_dat->cdev.name = cur_led->name;
-+		led_dat->cdev.default_trigger = cur_led->default_trigger;
-+		led_dat->cdev.brightness_set = latch_led_set;
-+		led_dat->cdev.brightness = LED_OFF;
-+		led_dat->bit = cur_led->bit;
-+		led_dat->set_led = pdata->set_led ? pdata->set_led : latch_set_led;
-+
-+		ret = led_classdev_register(&pdev->dev, &led_dat->cdev);
-+		if (ret < 0) {
-+			goto err;
-+		}
-+	}
-+
-+	if (!pdata->set_led) {
-+		iobase = ioremap_nocache(pdata->mem, 0x1000);
-+		writeb(0xFF, iobase);
-+	}
-+	platform_set_drvdata(pdev, leds_data);
-+
-+	return 0;
-+
-+err:
-+	if (i > 0) {
-+		for (i = i - 1; i >= 0; i--) {
-+			led_classdev_unregister(&leds_data[i].cdev);
-+		}
-+	}
-+
-+	kfree(leds_data);
-+
-+	return ret;
-+}
-+
-+static int __devexit latch_led_remove(struct platform_device *pdev)
-+{
-+	int i;
-+	struct latch_led_platform_data *pdata = pdev->dev.platform_data;
-+	struct latch_led_data *leds_data;
-+
-+	leds_data = platform_get_drvdata(pdev);
-+
-+	for (i = 0; i < pdata->num_leds; i++) {
-+		led_classdev_unregister(&leds_data[i].cdev);
-+		cancel_work_sync(&leds_data[i].work);
-+	}
-+
-+	kfree(leds_data);
-+
-+	return 0;
-+}
-+
-+static struct platform_driver latch_led_driver = {
-+	.probe		= latch_led_probe,
-+	.remove		= __devexit_p(latch_led_remove),
-+	.driver		= {
-+		.name	= "leds-latch",
-+		.owner	= THIS_MODULE,
-+	},
-+};
-+
-+static int __init latch_led_init(void)
-+{
-+	return platform_driver_register(&latch_led_driver);
-+}
-+
-+static void __exit latch_led_exit(void)
-+{
-+	platform_driver_unregister(&latch_led_driver);
-+}
-+
-+module_init(latch_led_init);
-+module_exit(latch_led_exit);
-+
-+MODULE_AUTHOR("Chris Lang <clang@gateworks.com>");
-+MODULE_DESCRIPTION("Latch LED driver");
-+MODULE_LICENSE("GPL");
---- a/drivers/leds/Makefile
-+++ b/drivers/leds/Makefile
-@@ -19,6 +19,7 @@ obj-$(CONFIG_LEDS_COBALT_QUBE)		+= leds-
- obj-$(CONFIG_LEDS_COBALT_RAQ)		+= leds-cobalt-raq.o
- obj-$(CONFIG_LEDS_PCA9532)		+= leds-pca9532.o
- obj-$(CONFIG_LEDS_GPIO)			+= leds-gpio.o
-+obj-$(CONFIG_LEDS_LATCH)     += leds-latch.o
- obj-$(CONFIG_LEDS_CM_X270)              += leds-cm-x270.o
- obj-$(CONFIG_LEDS_CLEVO_MAIL)		+= leds-clevo-mail.o
- obj-$(CONFIG_LEDS_HP6XX)		+= leds-hp6xx.o
---- a/include/linux/leds.h
-+++ b/include/linux/leds.h
-@@ -148,5 +148,19 @@ struct gpio_led_platform_data {
- 					unsigned long *delay_off);
- };
- 
-+/* For the leds-latch driver */
-+struct latch_led {
-+	const char *name;
-+	char *default_trigger;
-+	unsigned  bit;
-+};
-+
-+struct latch_led_platform_data {
-+	int     num_leds;
-+	u32     mem;
-+	struct latch_led *leds;
-+	void	(*set_led)(u8 bit, enum led_brightness value);
-+};
-+
- 
- #endif		/* __LINUX_LEDS_H_INCLUDED */
diff --git a/target/linux/ixp4xx/patches-2.6.27/300-avila_fetch_mac.patch b/target/linux/ixp4xx/patches-2.6.27/300-avila_fetch_mac.patch
deleted file mode 100644
index 4581bdd..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/300-avila_fetch_mac.patch
+++ /dev/null
@@ -1,244 +0,0 @@
---- a/arch/arm/mach-ixp4xx/avila-setup.c
-+++ b/arch/arm/mach-ixp4xx/avila-setup.c
-@@ -14,10 +14,16 @@
- #include <linux/kernel.h>
- #include <linux/init.h>
- #include <linux/device.h>
-+#include <linux/if_ether.h>
-+#include <linux/socket.h>
-+#include <linux/netdevice.h>
- #include <linux/serial.h>
- #include <linux/tty.h>
- #include <linux/serial_8250.h>
- #include <linux/slab.h>
-+#include <linux/i2c.h>
-+#include <linux/i2c/at24.h>
-+
- #include <linux/i2c-gpio.h>
- 
- #include <asm/types.h>
-@@ -29,6 +35,13 @@
- #include <asm/mach/arch.h>
- #include <asm/mach/flash.h>
- 
-+struct avila_board_info {
-+	unsigned char	*model;
-+	void		(*setup)(void);
-+};
-+
-+static struct avila_board_info *avila_info __initdata;
-+
- static struct flash_platform_data avila_flash_data = {
- 	.map_name	= "cfi_probe",
- 	.width		= 2,
-@@ -132,16 +145,181 @@ static struct platform_device avila_pata
- 	.resource		= avila_pata_resources,
- };
- 
-+/* Built-in 10/100 Ethernet MAC interfaces */
-+static struct eth_plat_info avila_npeb_data = {
-+	.phy		= 0,
-+	.rxq		= 3,
-+	.txreadyq	= 20,
-+};
-+
-+static struct eth_plat_info avila_npec_data = {
-+	.phy		= 1,
-+	.rxq		= 4,
-+	.txreadyq	= 21,
-+};
-+
-+static struct platform_device avila_npeb_device = {
-+	.name			= "ixp4xx_eth",
-+	.id			= IXP4XX_ETH_NPEB,
-+	.dev.platform_data	= &avila_npeb_data,
-+};
-+
-+static struct platform_device avila_npec_device = {
-+	.name			= "ixp4xx_eth",
-+	.id			= IXP4XX_ETH_NPEC,
-+	.dev.platform_data	= &avila_npec_data,
-+};
-+
- static struct platform_device *avila_devices[] __initdata = {
- 	&avila_i2c_gpio,
- 	&avila_flash,
- 	&avila_uart
- };
- 
-+static void __init avila_gw23xx_setup(void)
-+{
-+	platform_device_register(&avila_npeb_device);
-+	platform_device_register(&avila_npec_device);
-+}
-+
-+static void __init avila_gw2342_setup(void)
-+{
-+	platform_device_register(&avila_npeb_device);
-+	platform_device_register(&avila_npec_device);
-+}
-+
-+static void __init avila_gw2345_setup(void)
-+{
-+	avila_npeb_data.phy = IXP4XX_ETH_PHY_MAX_ADDR;
-+	avila_npeb_data.phy_mask = 0x1e; /* ports 1-4 of the KS8995 switch */
-+	platform_device_register(&avila_npeb_device);
-+
-+	avila_npec_data.phy = 5; /* port 5 of the KS8995 switch */
-+	platform_device_register(&avila_npec_device);
-+}
-+
-+static void __init avila_gw2347_setup(void)
-+{
-+	platform_device_register(&avila_npeb_device);
-+}
-+
-+static void __init avila_gw2348_setup(void)
-+{
-+	platform_device_register(&avila_npeb_device);
-+	platform_device_register(&avila_npec_device);
-+}
-+
-+static void __init avila_gw2353_setup(void)
-+{
-+	platform_device_register(&avila_npeb_device);
-+}
-+
-+static void __init avila_gw2355_setup(void)
-+{
-+	avila_npeb_data.phy = IXP4XX_ETH_PHY_MAX_ADDR;
-+	avila_npeb_data.phy_mask = 0x1e; /* ports 1-4 of the KS8995 switch */
-+	platform_device_register(&avila_npeb_device);
-+
-+	avila_npec_data.phy = 16;
-+	platform_device_register(&avila_npec_device);
-+}
-+
-+static void __init avila_gw2357_setup(void)
-+{
-+	platform_device_register(&avila_npeb_device);
-+}
-+
-+static struct avila_board_info avila_boards[] __initdata = {
-+	{
-+		.model		= "GW2342",
-+		.setup		= avila_gw2342_setup,
-+	}, {
-+		.model		= "GW2345",
-+		.setup		= avila_gw2345_setup,
-+	}, {
-+		.model		= "GW2347",
-+		.setup		= avila_gw2347_setup,
-+	}, {
-+		.model		= "GW2348",
-+		.setup		= avila_gw2348_setup,
-+	}, {
-+		.model		= "GW2353",
-+		.setup		= avila_gw2353_setup,
-+	}, {
-+		.model		= "GW2355",
-+		.setup		= avila_gw2355_setup,
-+	}, {
-+		.model		= "GW2357",
-+		.setup		= avila_gw2357_setup,
-+	}
-+};
-+
-+static struct avila_board_info * __init avila_find_board_info(char *model)
-+{
-+	int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(avila_boards); i++) {
-+		struct avila_board_info *info = &avila_boards[i];
-+		if (strcmp(info->model, model) == 0)
-+			return info;
-+	}
-+
-+	return NULL;
-+}
-+
-+static struct at24_iface *at24_if;
-+
-+static int at24_setup(struct at24_iface *iface, void *context)
-+{
-+	char mac_addr[ETH_ALEN];
-+	char model[6];
-+
-+	at24_if = iface;
-+
-+	/* Read MAC addresses */
-+	if (at24_if->read(at24_if, mac_addr, 0x0, 6) == 6) {
-+		memcpy(&avila_npeb_data.hwaddr, mac_addr, ETH_ALEN);
-+	}
-+	if (at24_if->read(at24_if, mac_addr, 0x6, 6) == 6) {
-+		memcpy(&avila_npec_data.hwaddr, mac_addr, ETH_ALEN);
-+	}
-+
-+	/* Read the first 6 bytes of the model number */
-+	if (at24_if->read(at24_if, model, 0x20, 6) == 6) {
-+		avila_info = avila_find_board_info(model);
-+	}
-+
-+	return 0;
-+}
-+
-+static struct at24_platform_data avila_eeprom_info = {
-+	.byte_len	= 1024,
-+	.page_size	= 16,
-+	.flags		= AT24_FLAG_READONLY,
-+	.setup		= at24_setup,
-+};
-+
-+static struct i2c_board_info __initdata avila_i2c_board_info[] = {
-+	{
-+		I2C_BOARD_INFO("ds1672", 0x68),
-+	},
-+	{
-+		I2C_BOARD_INFO("ad7418", 0x28),
-+	},
-+	{
-+		I2C_BOARD_INFO("24c08", 0x51),
-+		.platform_data	= &avila_eeprom_info
-+	},
-+};
-+
- static void __init avila_init(void)
- {
- 	ixp4xx_sys_init();
- 
-+	/*
-+	 * These devices are present on all Avila models and don't need any
-+	 * model specific setup.
-+	 */
- 	avila_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
- 	avila_flash_resource.end =
- 		IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
-@@ -159,7 +337,28 @@ static void __init avila_init(void)
- 
- 	platform_device_register(&avila_pata);
- 
-+		i2c_register_board_info(0, avila_i2c_board_info,
-+				ARRAY_SIZE(avila_i2c_board_info));
-+}
-+
-+static int __init avila_model_setup(void)
-+{
-+	if (!machine_is_avila())
-+		return 0;
-+
-+	if (avila_info) {
-+		printk(KERN_DEBUG "Running on Gateworks Avila %s\n",
-+							avila_info->model);
-+		avila_info->setup();
-+	} else {
-+		printk(KERN_INFO "Unknown/missing Avila model number"
-+						" -- defaults will be used\n");
-+		avila_gw23xx_setup();
-+	}
-+
-+	return 0;
- }
-+late_initcall(avila_model_setup);
- 
- MACHINE_START(AVILA, "Gateworks Avila Network Platform")
- 	/* Maintainer: Deepak Saxena <dsaxena@plexity.net> */
diff --git a/target/linux/ixp4xx/patches-2.6.27/301-avila_led.patch b/target/linux/ixp4xx/patches-2.6.27/301-avila_led.patch
deleted file mode 100644
index 2bd0e16..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/301-avila_led.patch
+++ /dev/null
@@ -1,171 +0,0 @@
---- a/arch/arm/mach-ixp4xx/avila-setup.c
-+++ b/arch/arm/mach-ixp4xx/avila-setup.c
-@@ -24,6 +24,7 @@
- #include <linux/i2c.h>
- #include <linux/i2c/at24.h>
- 
-+#include <linux/leds.h>
- #include <linux/i2c-gpio.h>
- 
- #include <asm/types.h>
-@@ -170,6 +171,72 @@ static struct platform_device avila_npec
- 	.dev.platform_data	= &avila_npec_data,
- };
- 
-+static struct gpio_led avila_gpio_leds[] = {
-+	{
-+		.name		= "user",  /* green led */
-+		.gpio		= AVILA_GW23XX_LED_USER_GPIO,
-+		.active_low	= 1,
-+	}
-+};
-+
-+static struct gpio_led_platform_data avila_gpio_leds_data = {
-+	.num_leds		= 1,
-+	.leds			= avila_gpio_leds,
-+};
-+
-+static struct platform_device avila_gpio_leds_device = {
-+	.name			= "leds-gpio",
-+	.id			= -1,
-+	.dev.platform_data	= &avila_gpio_leds_data,
-+};
-+
-+static struct latch_led avila_latch_leds[] = {
-+	{
-+		.name	= "led0",  /* green led */
-+		.bit	= 0,
-+	},
-+	{
-+		.name	= "led1",  /* green led */
-+		.bit	= 1,
-+	},
-+	{
-+		.name	= "led2",  /* green led */
-+		.bit	= 2,
-+	},
-+	{
-+		.name	= "led3",  /* green led */
-+		.bit	= 3,
-+	},
-+	{
-+		.name	= "led4",  /* green led */
-+		.bit	= 4,
-+	},
-+	{
-+		.name	= "led5",  /* green led */
-+		.bit	= 5,
-+	},
-+	{
-+		.name	= "led6",  /* green led */
-+		.bit	= 6,
-+	},
-+	{
-+		.name	= "led7",  /* green led */
-+		.bit	= 7,
-+	}
-+};
-+
-+static struct latch_led_platform_data avila_latch_leds_data = {
-+	.num_leds	= 8,
-+	.leds		= avila_latch_leds,
-+	.mem		= 0x51000000,
-+};
-+
-+static struct platform_device avila_latch_leds_device = {
-+	.name			= "leds-latch",
-+	.id			= -1,
-+	.dev.platform_data	= &avila_latch_leds_data,
-+};
-+
- static struct platform_device *avila_devices[] __initdata = {
- 	&avila_i2c_gpio,
- 	&avila_flash,
-@@ -180,12 +247,16 @@ static void __init avila_gw23xx_setup(vo
- {
- 	platform_device_register(&avila_npeb_device);
- 	platform_device_register(&avila_npec_device);
-+
-+	platform_device_register(&avila_gpio_leds_device);
- }
- 
- static void __init avila_gw2342_setup(void)
- {
- 	platform_device_register(&avila_npeb_device);
- 	platform_device_register(&avila_npec_device);
-+
-+	platform_device_register(&avila_gpio_leds_device);
- }
- 
- static void __init avila_gw2345_setup(void)
-@@ -196,22 +267,30 @@ static void __init avila_gw2345_setup(vo
- 
- 	avila_npec_data.phy = 5; /* port 5 of the KS8995 switch */
- 	platform_device_register(&avila_npec_device);
-+
-+	platform_device_register(&avila_gpio_leds_device);
- }
- 
- static void __init avila_gw2347_setup(void)
- {
- 	platform_device_register(&avila_npeb_device);
-+
-+	avila_gpio_leds[0].gpio = AVILA_GW23X7_LED_USER_GPIO;
-+	platform_device_register(&avila_gpio_leds_device);
- }
- 
- static void __init avila_gw2348_setup(void)
- {
- 	platform_device_register(&avila_npeb_device);
- 	platform_device_register(&avila_npec_device);
-+
-+	platform_device_register(&avila_gpio_leds_device);
- }
- 
- static void __init avila_gw2353_setup(void)
- {
- 	platform_device_register(&avila_npeb_device);
-+	platform_device_register(&avila_gpio_leds_device);
- }
- 
- static void __init avila_gw2355_setup(void)
-@@ -222,11 +301,29 @@ static void __init avila_gw2355_setup(vo
- 
- 	avila_npec_data.phy = 16;
- 	platform_device_register(&avila_npec_device);
-+
-+	platform_device_register(&avila_gpio_leds_device);
-+
-+	*IXP4XX_EXP_CS4 |= 0xbfff3c03;
-+	avila_latch_leds[0].name = "RXD";
-+	avila_latch_leds[1].name = "TXD";
-+	avila_latch_leds[2].name = "POL";
-+	avila_latch_leds[3].name = "LNK";
-+	avila_latch_leds[4].name = "ERR";
-+	avila_latch_leds_data.num_leds = 5;
-+	avila_latch_leds_data.mem = 0x54000000;
-+	platform_device_register(&avila_latch_leds_device);
- }
- 
- static void __init avila_gw2357_setup(void)
- {
- 	platform_device_register(&avila_npeb_device);
-+
-+	avila_gpio_leds[0].gpio = AVILA_GW23X7_LED_USER_GPIO;
-+	platform_device_register(&avila_gpio_leds_device);
-+
-+	*IXP4XX_EXP_CS1 |= 0xbfff3c03;
-+	platform_device_register(&avila_latch_leds_device);
- }
- 
- static struct avila_board_info avila_boards[] __initdata = {
---- a/arch/arm/mach-ixp4xx/include/mach/avila.h
-+++ b/arch/arm/mach-ixp4xx/include/mach/avila.h
-@@ -36,4 +36,6 @@
- #define AVILA_PCI_INTC_PIN	9
- #define AVILA_PCI_INTD_PIN	8
- 
--
-+/* User LEDs */
-+#define AVILA_GW23XX_LED_USER_GPIO	3
-+#define AVILA_GW23X7_LED_USER_GPIO	4
diff --git a/target/linux/ixp4xx/patches-2.6.27/302-avila_gpio_device.patch b/target/linux/ixp4xx/patches-2.6.27/302-avila_gpio_device.patch
deleted file mode 100644
index 3b75a59..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/302-avila_gpio_device.patch
+++ /dev/null
@@ -1,41 +0,0 @@
---- a/arch/arm/mach-ixp4xx/avila-setup.c
-+++ b/arch/arm/mach-ixp4xx/avila-setup.c
-@@ -237,10 +237,28 @@ static struct platform_device avila_latc
- 	.dev.platform_data	= &avila_latch_leds_data,
- };
- 
-+static struct resource avila_gpio_resources[] = {
-+	{
-+		.name	= "gpio",
-+		/* FIXME: gpio mask should be model specific */
-+		.start	= AVILA_GPIO_MASK,
-+		.end	= AVILA_GPIO_MASK,
-+		.flags	= 0,
-+	},
-+};
-+
-+static struct platform_device avila_gpio = {
-+	.name			= "GPIODEV",
-+	.id			= -1,
-+	.num_resources		= ARRAY_SIZE(avila_gpio_resources),
-+	.resource		= avila_gpio_resources,
-+};
-+
- static struct platform_device *avila_devices[] __initdata = {
- 	&avila_i2c_gpio,
- 	&avila_flash,
--	&avila_uart
-+	&avila_uart,
-+	&avila_gpio,
- };
- 
- static void __init avila_gw23xx_setup(void)
---- a/arch/arm/mach-ixp4xx/include/mach/avila.h
-+++ b/arch/arm/mach-ixp4xx/include/mach/avila.h
-@@ -39,3 +39,6 @@
- /* User LEDs */
- #define AVILA_GW23XX_LED_USER_GPIO	3
- #define AVILA_GW23X7_LED_USER_GPIO	4
-+
-+/* gpio mask used by platform device */
-+#define AVILA_GPIO_MASK	(1 << 1) | (1 << 3) | (1 << 5) | (1 << 7) | (1 << 9)
diff --git a/target/linux/ixp4xx/patches-2.6.27/303-avila_gw23x7_phy_quirk.patch b/target/linux/ixp4xx/patches-2.6.27/303-avila_gw23x7_phy_quirk.patch
deleted file mode 100644
index 5810d68..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/303-avila_gw23x7_phy_quirk.patch
+++ /dev/null
@@ -1,46 +0,0 @@
---- a/arch/arm/mach-ixp4xx/avila-setup.c
-+++ b/arch/arm/mach-ixp4xx/avila-setup.c
-@@ -291,6 +291,7 @@ static void __init avila_gw2345_setup(vo
- 
- static void __init avila_gw2347_setup(void)
- {
-+	avila_npeb_data.quirks |= IXP4XX_ETH_QUIRK_GW23X7;
- 	platform_device_register(&avila_npeb_device);
- 
- 	avila_gpio_leds[0].gpio = AVILA_GW23X7_LED_USER_GPIO;
-@@ -335,6 +336,7 @@ static void __init avila_gw2355_setup(vo
- 
- static void __init avila_gw2357_setup(void)
- {
-+	avila_npeb_data.quirks |= IXP4XX_ETH_QUIRK_GW23X7;
- 	platform_device_register(&avila_npeb_device);
- 
- 	avila_gpio_leds[0].gpio = AVILA_GW23X7_LED_USER_GPIO;
---- a/drivers/net/arm/ixp4xx_eth.c
-+++ b/drivers/net/arm/ixp4xx_eth.c
-@@ -348,6 +348,14 @@ static void phy_reset(struct net_device 
- 		return;
- 	}
- 
-+	if (port->plat->quirks & IXP4XX_ETH_QUIRK_GW23X7) {
-+		mdio_write(dev, 1, 0x19,
-+				(mdio_read(dev, 1, 0x19) & 0xfffe) | 0x8000);
-+
-+		printk(KERN_DEBUG "%s: phy_id of the DP83848 changed to 0\n",
-+								dev->name);
-+	}
-+
- 	/* restart auto negotiation */
- 	bmcr = mdio_read(dev, phy_id, MII_BMCR);
- 	bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
---- a/arch/arm/mach-ixp4xx/include/mach/platform.h
-+++ b/arch/arm/mach-ixp4xx/include/mach/platform.h
-@@ -104,6 +104,8 @@ struct eth_plat_info {
- 	u8 txreadyq;
- 	u8 hwaddr[6];
- 	u32 phy_mask;
-+	u32 quirks;
-+#define IXP4XX_ETH_QUIRK_GW23X7		0x00000001
- };
- 
- /* Information about built-in HSS (synchronous serial) interfaces */
diff --git a/target/linux/ixp4xx/patches-2.6.27/310-gtwx5717_spi_bus.patch b/target/linux/ixp4xx/patches-2.6.27/310-gtwx5717_spi_bus.patch
deleted file mode 100644
index 550b54f..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/310-gtwx5717_spi_bus.patch
+++ /dev/null
@@ -1,53 +0,0 @@
---- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c
-+++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
-@@ -29,6 +29,8 @@
- #include <linux/serial_8250.h>
- #include <linux/slab.h>
- 
-+#include <linux/spi/spi_gpio.h>
-+
- #include <asm/types.h>
- #include <asm/setup.h>
- #include <asm/memory.h>
-@@ -121,9 +123,41 @@ static struct platform_device gtwx5715_f
- 	.resource	= &gtwx5715_flash_resource,
- };
- 
-+static int gtwx5715_spi_boardinfo_setup(struct spi_board_info *bi,
-+		struct spi_master *master, void *data)
-+{
-+
-+	strlcpy(bi->modalias, "spi-ks8995", sizeof(bi->modalias));
-+
-+	bi->max_speed_hz = 5000000 /* Hz */;
-+	bi->bus_num = master->bus_num;
-+	bi->mode = SPI_MODE_0;
-+
-+	return 0;
-+}
-+
-+static struct spi_gpio_platform_data gtwx5715_spi_bus_data = {
-+	.pin_cs			= GTWX5715_KSSPI_SELECT,
-+	.pin_clk		= GTWX5715_KSSPI_CLOCK,
-+	.pin_miso		= GTWX5715_KSSPI_RXD,
-+	.pin_mosi		= GTWX5715_KSSPI_TXD,
-+	.cs_activelow		= 1,
-+	.no_spi_delay		= 1,
-+	.boardinfo_setup	= gtwx5715_spi_boardinfo_setup,
-+};
-+
-+static struct platform_device gtwx5715_spi_bus = {
-+	.name		= "spi-gpio",
-+	.id		= 0,
-+	.dev		= {
-+		.platform_data = &gtwx5715_spi_bus_data,
-+	},
-+};
-+
- static struct platform_device *gtwx5715_devices[] __initdata = {
- 	&gtwx5715_uart_device,
- 	&gtwx5715_flash,
-+	&gtwx5715_spi_bus,
- };
- 
- static void __init gtwx5715_init(void)
diff --git a/target/linux/ixp4xx/patches-2.6.27/311-gtwx5717_mac_plat_info.patch b/target/linux/ixp4xx/patches-2.6.27/311-gtwx5717_mac_plat_info.patch
deleted file mode 100644
index 29f3290..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/311-gtwx5717_mac_plat_info.patch
+++ /dev/null
@@ -1,40 +0,0 @@
---- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c
-+++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
-@@ -154,10 +154,37 @@ static struct platform_device gtwx5715_s
- 	},
- };
- 
-+static struct eth_plat_info gtwx5715_npeb_data = {
-+	.phy		= IXP4XX_ETH_PHY_MAX_ADDR,
-+	.phy_mask	= 0x1e, /* ports 1-4 of the KS8995 switch */
-+	.rxq		= 3,
-+	.txreadyq	= 20,
-+};
-+
-+static struct eth_plat_info gtwx5715_npec_data = {
-+	.phy		= 5,	/* port 5 of the KS8995 switch */
-+	.rxq		= 4,
-+	.txreadyq	= 21,
-+};
-+
-+static struct platform_device gtwx5715_npeb_device = {
-+	.name			= "ixp4xx_eth",
-+	.id			= IXP4XX_ETH_NPEB,
-+	.dev.platform_data	= &gtwx5715_npeb_data,
-+};
-+
-+static struct platform_device gtwx5715_npec_device = {
-+	.name			= "ixp4xx_eth",
-+	.id			= IXP4XX_ETH_NPEC,
-+	.dev.platform_data	= &gtwx5715_npec_data,
-+};
-+
- static struct platform_device *gtwx5715_devices[] __initdata = {
- 	&gtwx5715_uart_device,
- 	&gtwx5715_flash,
- 	&gtwx5715_spi_bus,
-+	&gtwx5715_npeb_device,
-+	&gtwx5715_npec_device,
- };
- 
- static void __init gtwx5715_init(void)
diff --git a/target/linux/ixp4xx/patches-2.6.27/312-ixp4xx_pata_optimization.patch b/target/linux/ixp4xx/patches-2.6.27/312-ixp4xx_pata_optimization.patch
deleted file mode 100644
index d6489a7..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/312-ixp4xx_pata_optimization.patch
+++ /dev/null
@@ -1,137 +0,0 @@
---- a/drivers/ata/pata_ixp4xx_cf.c
-+++ b/drivers/ata/pata_ixp4xx_cf.c
-@@ -24,17 +24,58 @@
- #include <scsi/scsi_host.h>
- 
- #define DRV_NAME	"pata_ixp4xx_cf"
--#define DRV_VERSION	"0.2"
-+#define DRV_VERSION	"0.3"
- 
- static int ixp4xx_set_mode(struct ata_link *link, struct ata_device **error)
- {
- 	struct ata_device *dev;
-+	struct ixp4xx_pata_data *data = link->ap->host->dev->platform_data;
-+	unsigned int pio_mask;
- 
- 	ata_link_for_each_dev(dev, link) {
-+    if (dev->id[ATA_ID_FIELD_VALID] & (1 << 1)){
-+      pio_mask = dev->id[ATA_ID_PIO_MODES] & 0x03;
-+      if (pio_mask & (1 << 1)){
-+        pio_mask = 4;
-+      }else{
-+        pio_mask = 3;
-+      }
-+    }else{
-+      pio_mask = (dev->id[ATA_ID_OLD_PIO_MODES] >> 8);
-+    }
-+		switch (pio_mask){
-+			case 0:
-+				ata_dev_printk(dev, KERN_INFO, "configured for PIO0\n");
-+				dev->pio_mode = XFER_PIO_0;
-+				dev->xfer_mode = XFER_PIO_0;
-+				*data->cs0_cfg = 0x8a473c03;
-+			break;
-+			case 1:
-+				ata_dev_printk(dev, KERN_INFO, "configured for PIO1\n");
-+				dev->pio_mode = XFER_PIO_1;
-+				dev->xfer_mode = XFER_PIO_1;
-+				*data->cs0_cfg = 0x86433c03;
-+			break;
-+			case 2:
-+				ata_dev_printk(dev, KERN_INFO, "configured for PIO2\n");
-+				dev->pio_mode = XFER_PIO_2;
-+				dev->xfer_mode = XFER_PIO_2;
-+				*data->cs0_cfg = 0x82413c03;
-+			break;
-+			case 3:
-+				ata_dev_printk(dev, KERN_INFO, "configured for PIO3\n");
-+				dev->pio_mode = XFER_PIO_3;
-+				dev->xfer_mode = XFER_PIO_3;
-+				*data->cs0_cfg = 0x80823c03;
-+			break;
-+			case 4:
-+				ata_dev_printk(dev, KERN_INFO, "configured for PIO4\n");
-+				dev->pio_mode = XFER_PIO_4;
-+				dev->xfer_mode = XFER_PIO_4;
-+				*data->cs0_cfg = 0x80403c03;
-+			break;
-+		}
- 		if (ata_dev_enabled(dev)) {
--			ata_dev_printk(dev, KERN_INFO, "configured for PIO0\n");
--			dev->pio_mode = XFER_PIO_0;
--			dev->xfer_mode = XFER_PIO_0;
- 			dev->xfer_shift = ATA_SHIFT_PIO;
- 			dev->flags |= ATA_DFLAG_PIO;
- 		}
-@@ -48,6 +89,7 @@ static unsigned int ixp4xx_mmio_data_xfe
- 	unsigned int i;
- 	unsigned int words = buflen >> 1;
- 	u16 *buf16 = (u16 *) buf;
-+	unsigned int pio_mask;
- 	struct ata_port *ap = dev->link->ap;
- 	void __iomem *mmio = ap->ioaddr.data_addr;
- 	struct ixp4xx_pata_data *data = ap->host->dev->platform_data;
-@@ -55,8 +97,34 @@ static unsigned int ixp4xx_mmio_data_xfe
- 	/* set the expansion bus in 16bit mode and restore
- 	 * 8 bit mode after the transaction.
- 	 */
--	*data->cs0_cfg &= ~(0x01);
--	udelay(100);
-+	if (dev->id[ATA_ID_FIELD_VALID] & (1 << 1)){
-+		pio_mask = dev->id[ATA_ID_PIO_MODES] & 0x03;
-+		if (pio_mask & (1 << 1)){
-+			pio_mask = 4;
-+		}else{
-+			pio_mask = 3;
-+		}
-+	}else{
-+		pio_mask = (dev->id[ATA_ID_OLD_PIO_MODES] >> 8);
-+	}
-+	switch (pio_mask){
-+		case 0:
-+			*data->cs0_cfg = 0xa9643c42;
-+		break;
-+		case 1:
-+			*data->cs0_cfg = 0x85033c42;
-+		break;
-+		case 2:
-+			*data->cs0_cfg = 0x80b23c42;
-+		break;
-+		case 3:
-+			*data->cs0_cfg = 0x80823c42;
-+		break;
-+		case 4:
-+			*data->cs0_cfg = 0x80403c42;
-+		break;
-+	}
-+	udelay(5);
- 
- 	/* Transfer multiple of 2 bytes */
- 	if (rw == READ)
-@@ -81,8 +149,24 @@ static unsigned int ixp4xx_mmio_data_xfe
- 		words++;
- 	}
- 
--	udelay(100);
--	*data->cs0_cfg |= 0x01;
-+	udelay(5);
-+	switch (pio_mask){
-+		case 0:
-+			*data->cs0_cfg = 0x8a473c03;
-+		break;
-+		case 1:
-+			*data->cs0_cfg = 0x86433c03;
-+		break;
-+		case 2:
-+			*data->cs0_cfg = 0x82413c03;
-+		break;
-+		case 3:
-+			*data->cs0_cfg = 0x80823c03;
-+		break;
-+		case 4:
-+			*data->cs0_cfg = 0x80403c03;
-+		break;
-+	}
- 
- 	return words << 1;
- }
diff --git a/target/linux/ixp4xx/patches-2.6.27/400-dmabounce.patch b/target/linux/ixp4xx/patches-2.6.27/400-dmabounce.patch
deleted file mode 100644
index e88dc93..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/400-dmabounce.patch
+++ /dev/null
@@ -1,27 +0,0 @@
---- a/arch/arm/common/dmabounce.c
-+++ b/arch/arm/common/dmabounce.c
-@@ -117,6 +117,10 @@ alloc_safe_buffer(struct dmabounce_devic
- 	} else if (size <= device_info->large.size) {
- 		pool = &device_info->large;
- 	} else {
-+#ifdef CONFIG_DMABOUNCE_DEBUG
-+		printk(KERN_INFO "A dma bounce buffer outside the pool size was requested. Requested size was 0x%08X\nThe calling code was :\n", size);
-+		dump_stack();
-+#endif
- 		pool = NULL;
- 	}
- 
---- a/arch/arm/mach-ixp4xx/Kconfig
-+++ b/arch/arm/mach-ixp4xx/Kconfig
-@@ -251,6 +251,11 @@ config DMABOUNCE
- 	default y
- 	depends on PCI
- 
-+config DMABOUNCE_DEBUG
-+	bool "Enable DMABounce debuging"
-+	default n
-+	depends on DMABOUNCE
-+
- config IXP4XX_INDIRECT_PCI
- 	bool "Use indirect PCI memory access"
- 	depends on PCI
diff --git a/target/linux/ixp4xx/patches-2.6.27/401-avila_pci_dev.patch b/target/linux/ixp4xx/patches-2.6.27/401-avila_pci_dev.patch
deleted file mode 100644
index 3e5087f..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/401-avila_pci_dev.patch
+++ /dev/null
@@ -1,11 +0,0 @@
---- a/arch/arm/mach-ixp4xx/include/mach/avila.h
-+++ b/arch/arm/mach-ixp4xx/include/mach/avila.h
-@@ -25,7 +25,7 @@
- /*
-  * AVILA PCI IRQs
-  */
--#define AVILA_PCI_MAX_DEV	4
-+#define AVILA_PCI_MAX_DEV	6
- #define LOFT_PCI_MAX_DEV    6
- #define AVILA_PCI_IRQ_LINES	4
- 
diff --git a/target/linux/ixp4xx/patches-2.6.27/500-usr8200_support.patch b/target/linux/ixp4xx/patches-2.6.27/500-usr8200_support.patch
deleted file mode 100644
index 6c23e6b..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/500-usr8200_support.patch
+++ /dev/null
@@ -1,342 +0,0 @@
---- a/arch/arm/mach-ixp4xx/Kconfig
-+++ b/arch/arm/mach-ixp4xx/Kconfig
-@@ -97,6 +97,14 @@ config MACH_SIDEWINDER
- 	  Engineering Sidewinder board. For more information on this
- 	  platform, see http://www.adiengineering.com
- 
-+config MACH_USR8200
-+	bool "USRobotics USR8200"
-+	select PCI
-+	help
-+	  Say 'Y' here if you want your kernel to support the USRobotics
-+	  USR8200 router board. For more information on this platform, see
-+	  http://openwrt.org
-+
- config MACH_COMPEX
- 	bool "Compex WP18 / NP18A"
- 	select PCI
---- a/arch/arm/mach-ixp4xx/Makefile
-+++ b/arch/arm/mach-ixp4xx/Makefile
-@@ -25,6 +25,7 @@ obj-pci-$(CONFIG_MACH_WRT300NV2)		+= wrt
- obj-pci-$(CONFIG_MACH_AP1000)		+= ixdp425-pci.o
- obj-pci-$(CONFIG_MACH_TW5334)		+= tw5334-pci.o
- obj-pci-$(CONFIG_MACH_MI424WR)		+= mi424wr-pci.o
-+obj-pci-$(CONFIG_MACH_USR8200)		+= usr8200-pci.o
- 
- obj-y	+= common.o
- 
-@@ -48,6 +49,7 @@ obj-$(CONFIG_MACH_WRT300NV2)	+= wrt300nv
- obj-$(CONFIG_MACH_AP1000)	+= ap1000-setup.o
- obj-$(CONFIG_MACH_TW5334)	+= tw5334-setup.o
- obj-$(CONFIG_MACH_MI424WR)	+= mi424wr-setup.o
-+obj-$(CONFIG_MACH_USR8200)	+= usr8200-setup.o
- 
- obj-$(CONFIG_PCI)		+= $(obj-pci-$(CONFIG_PCI)) common-pci.o
- obj-$(CONFIG_IXP4XX_QMGR)	+= ixp4xx_qmgr.o
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/usr8200-pci.c
-@@ -0,0 +1,78 @@
-+/*
-+ * arch/arch/mach-ixp4xx/usr8200-pci.c
-+ *
-+ * PCI setup routines for USRobotics USR8200
-+ *
-+ * Copyright (C) 2008 Peter Denison <openwrt@marshadder.org>
-+ *
-+ * based on pronghorn-pci.c
-+ * 	Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ * based on coyote-pci.c:
-+ *	Copyright (C) 2002 Jungo Software Technologies.
-+ *	Copyright (C) 2003 MontaVista Softwrae, Inc.
-+ *
-+ * Maintainer: Peter Denison <openwrt@marshadder.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/pci.h>
-+#include <linux/init.h>
-+#include <linux/irq.h>
-+
-+#include <asm/mach-types.h>
-+#include <mach/hardware.h>
-+
-+#include <asm/mach/pci.h>
-+
-+void __init usr8200_pci_preinit(void)
-+{
-+	set_irq_type(IRQ_IXP4XX_GPIO7, IRQ_TYPE_LEVEL_LOW);
-+	set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW);
-+	set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW);
-+	set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW);
-+	set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW);
-+
-+	ixp4xx_pci_preinit();
-+}
-+
-+static int __init usr8200_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-+{
-+	if (slot == 14)
-+		return IRQ_IXP4XX_GPIO7;
-+	else if (slot == 15)
-+		return IRQ_IXP4XX_GPIO8;
-+	else if (slot == 16) {
-+		if (pin == 1)
-+			return IRQ_IXP4XX_GPIO11;
-+		else if (pin == 2)
-+			return IRQ_IXP4XX_GPIO10;
-+		else if (pin == 3)
-+			return IRQ_IXP4XX_GPIO9;
-+		else
-+			return -1;
-+	} else
-+		return -1;
-+}
-+
-+struct hw_pci usr8200_pci __initdata = {
-+	.nr_controllers	= 1,
-+	.preinit	= usr8200_pci_preinit,
-+	.swizzle	= pci_std_swizzle,
-+	.setup		= ixp4xx_setup,
-+	.scan		= ixp4xx_scan_bus,
-+	.map_irq	= usr8200_map_irq,
-+};
-+
-+int __init usr8200_pci_init(void)
-+{
-+	if (machine_is_usr8200())
-+		pci_common_init(&usr8200_pci);
-+	return 0;
-+}
-+
-+subsys_initcall(usr8200_pci_init);
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/usr8200-setup.c
-@@ -0,0 +1,212 @@
-+/*
-+ * arch/arm/mach-ixp4xx/usr8200-setup.c
-+ *
-+ * Board setup for the USRobotics USR8200
-+ *
-+ * Copyright (C) 2008 Peter Denison <openwrt@marshadder.org>
-+ *
-+ * based on pronghorn-setup.c:
-+ * 	Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ * based on coyote-setup.c:
-+ *      Copyright (C) 2003-2005 MontaVista Software, Inc.
-+ *
-+ * Author: Peter Denison <openwrt@marshadder.org>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/device.h>
-+#include <linux/serial.h>
-+#include <linux/tty.h>
-+#include <linux/serial_8250.h>
-+#include <linux/slab.h>
-+#include <linux/types.h>
-+#include <linux/memory.h>
-+#include <linux/i2c-gpio.h>
-+#include <linux/leds.h>
-+
-+#include <asm/setup.h>
-+#include <mach/hardware.h>
-+#include <asm/irq.h>
-+#include <asm/mach-types.h>
-+#include <asm/mach/arch.h>
-+#include <asm/mach/flash.h>
-+
-+static struct flash_platform_data usr8200_flash_data = {
-+	.map_name	= "cfi_probe",
-+	.width		= 2,
-+};
-+
-+static struct resource usr8200_flash_resource = {
-+	.flags		= IORESOURCE_MEM,
-+};
-+
-+static struct platform_device usr8200_flash = {
-+	.name		= "IXP4XX-Flash",
-+	.id		= 0,
-+	.dev		= {
-+		.platform_data	= &usr8200_flash_data,
-+	},
-+	.num_resources	= 1,
-+	.resource	= &usr8200_flash_resource,
-+};
-+
-+static struct resource usr8200_uart_resources [] = {
-+	{
-+		.start		= IXP4XX_UART2_BASE_PHYS,
-+		.end		= IXP4XX_UART2_BASE_PHYS + 0x0fff,
-+		.flags		= IORESOURCE_MEM
-+	},
-+	{
-+		.start		= IXP4XX_UART1_BASE_PHYS,
-+		.end		= IXP4XX_UART1_BASE_PHYS + 0x0fff,
-+		.flags		= IORESOURCE_MEM
-+	}
-+};
-+
-+static struct plat_serial8250_port usr8200_uart_data[] = {
-+	{
-+		.mapbase	= IXP4XX_UART2_BASE_PHYS,
-+		.membase	= (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
-+		.irq		= IRQ_IXP4XX_UART2,
-+		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+		.iotype		= UPIO_MEM,
-+		.regshift	= 2,
-+		.uartclk	= IXP4XX_UART_XTAL,
-+	},
-+	{
-+		.mapbase	= IXP4XX_UART1_BASE_PHYS,
-+		.membase	= (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
-+		.irq		= IRQ_IXP4XX_UART1,
-+		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+		.iotype		= UPIO_MEM,
-+		.regshift	= 2,
-+		.uartclk	= IXP4XX_UART_XTAL,
-+	},
-+	{ },
-+};
-+
-+static struct platform_device usr8200_uart = {
-+	.name		= "serial8250",
-+	.id		= PLAT8250_DEV_PLATFORM,
-+	.dev		= {
-+		.platform_data	= usr8200_uart_data,
-+	},
-+	.num_resources	= 2,
-+	.resource	= usr8200_uart_resources,
-+};
-+
-+static struct gpio_led usr8200_led_pin[] = {
-+	{
-+		.name		= "usr8200:usb1",
-+		.gpio		= 0,
-+		.active_low	= 1,
-+	},
-+	{
-+		.name		= "usr8200:usb2",
-+		.gpio		= 1,
-+		.active_low	= 1,
-+	},
-+	{
-+		.name		= "usr8200:ieee1394",
-+		.gpio		= 2,
-+		.active_low	= 1,
-+	},
-+	{
-+		.name		= "usr8200:internal",
-+		.gpio		= 3,
-+		.active_low	= 1,
-+	},
-+	{
-+		.name		= "usr8200:power",
-+		.gpio		= 14,
-+	}
-+};
-+
-+static struct gpio_led_platform_data usr8200_led_data = {
-+	.num_leds		= ARRAY_SIZE(usr8200_led_pin),
-+	.leds			= usr8200_led_pin,
-+};
-+
-+static struct platform_device usr8200_led = {
-+	.name			= "leds-gpio",
-+	.id			= -1,
-+	.dev.platform_data	= &usr8200_led_data,
-+};
-+
-+static struct eth_plat_info usr8200_plat_eth[] = {
-+	{ /* NPEC - LAN with Marvell 88E6060 switch */
-+		.phy		= IXP4XX_ETH_PHY_MAX_ADDR,
-+		.phy_mask	= 0x0F0000,
-+		.rxq		= 4,
-+		.txreadyq	= 21,
-+	}, { /* NPEB - WAN */
-+		.phy		= 9,
-+		.rxq		= 3,
-+		.txreadyq	= 20,
-+	}
-+};
-+
-+static struct platform_device usr8200_eth[] = {
-+	{
-+		.name			= "ixp4xx_eth",
-+		.id			= IXP4XX_ETH_NPEC,
-+		.dev.platform_data	= usr8200_plat_eth,
-+	}, {
-+		.name			= "ixp4xx_eth",
-+		.id			= IXP4XX_ETH_NPEB,
-+		.dev.platform_data	= usr8200_plat_eth + 1,
-+	}
-+};
-+
-+static struct resource usr8200_rtc_resources = {
-+	.flags		= IORESOURCE_MEM
-+};
-+
-+static struct platform_device usr8200_rtc = {
-+	.name		= "rtc7301",
-+	.id		= 0,
-+	.num_resources	= 1,
-+	.resource	= &usr8200_rtc_resources,
-+};
-+
-+static struct platform_device *usr8200_devices[] __initdata = {
-+	&usr8200_flash,
-+	&usr8200_uart,
-+	&usr8200_led,
-+	&usr8200_eth[0],
-+	&usr8200_eth[1],
-+	&usr8200_rtc,
-+};
-+
-+static void __init usr8200_init(void)
-+{
-+	ixp4xx_sys_init();
-+
-+	usr8200_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
-+	usr8200_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_16M - 1;
-+
-+	usr8200_rtc_resources.start = IXP4XX_EXP_BUS_BASE(2);
-+	usr8200_rtc_resources.end = IXP4XX_EXP_BUS_BASE(2) + 0x01ff;
-+
-+	*IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
-+	*IXP4XX_EXP_CS2 = IXP4XX_EXP_BUS_SIZE(0) | IXP4XX_EXP_BUS_WR_EN |
-+	                  IXP4XX_EXP_BUS_CS_EN | IXP4XX_EXP_BUS_BYTE_EN;
-+	*IXP4XX_GPIO_GPCLKR = 0x01100000;
-+
-+	/* configure button as input */
-+	gpio_line_config(12, IXP4XX_GPIO_IN);
-+
-+	platform_add_devices(usr8200_devices, ARRAY_SIZE(usr8200_devices));
-+}
-+
-+MACHINE_START(USR8200, "USRobotics USR8200")
-+	/* Maintainer: Peter Denison <openwrt@marshadder.org> */
-+	.phys_io	= IXP4XX_PERIPHERAL_BASE_PHYS,
-+	.io_pg_offst	= ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-+	.map_io		= ixp4xx_map_io,
-+	.init_irq	= ixp4xx_init_irq,
-+	.timer		= &ixp4xx_timer,
-+	.boot_params	= 0x0100,
-+	.init_machine	= usr8200_init,
-+MACHINE_END
---- a/arch/arm/mach-ixp4xx/include/mach/uncompress.h
-+++ b/arch/arm/mach-ixp4xx/include/mach/uncompress.h
-@@ -43,7 +43,7 @@ static __inline__ void __arch_decomp_set
- 	if (machine_is_adi_coyote() || machine_is_gtwx5715() ||
- 			 machine_is_gateway7001() || machine_is_wg302v2() ||
- 			 machine_is_pronghorn() || machine_is_pronghorn_metro() || machine_is_wrt300nv2() ||
--			 machine_is_tw5334())
-+			 machine_is_tw5334() || machine_is_usr8200())
- 		uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS;
- 	else
- 		uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS;
diff --git a/target/linux/ixp4xx/patches-2.6.27/501-cachetypes.patch b/target/linux/ixp4xx/patches-2.6.27/501-cachetypes.patch
deleted file mode 100644
index cc9c89e..0000000
--- a/target/linux/ixp4xx/patches-2.6.27/501-cachetypes.patch
+++ /dev/null
@@ -1,20 +0,0 @@
---- a/arch/arm/kernel/setup.c
-+++ b/arch/arm/kernel/setup.c
-@@ -184,7 +184,7 @@ static const char *cache_types[16] = {
- 	"write-back",
- 	"undefined 3",
- 	"undefined 4",
--	"undefined 5",
-+	"write-back",
- 	"write-back",
- 	"write-back",
- 	"undefined 8",
-@@ -203,7 +203,7 @@ static const char *cache_clean[16] = {
- 	"cp15 c7 ops",
- 	"undefined 3",
- 	"undefined 4",
--	"undefined 5",
-+	"cp15 c7 ops",
- 	"cp15 c7 ops",
- 	"cp15 c7 ops",
- 	"undefined 8",