diff options
author | John Crispin <john@openwrt.org> | 2012-08-03 08:53:02 +0000 |
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committer | John Crispin <john@openwrt.org> | 2012-08-03 08:53:02 +0000 |
commit | 060b161ca6f18e0e022da1483723ad2e9335bca7 (patch) | |
tree | dc652c26bed4d4b79395a6daafaa5da59000e940 /target/linux/lantiq/patches-3.3/0025-svip-cp1.patch | |
parent | 162e272b4b2b770cd5eb97006bb4ff99b09bd8de (diff) | |
download | mtk-20170518-060b161ca6f18e0e022da1483723ad2e9335bca7.zip mtk-20170518-060b161ca6f18e0e022da1483723ad2e9335bca7.tar.gz mtk-20170518-060b161ca6f18e0e022da1483723ad2e9335bca7.tar.bz2 |
cleanup patches
SVN-Revision: 32953
Diffstat (limited to 'target/linux/lantiq/patches-3.3/0025-svip-cp1.patch')
-rw-r--r-- | target/linux/lantiq/patches-3.3/0025-svip-cp1.patch | 95 |
1 files changed, 95 insertions, 0 deletions
diff --git a/target/linux/lantiq/patches-3.3/0025-svip-cp1.patch b/target/linux/lantiq/patches-3.3/0025-svip-cp1.patch new file mode 100644 index 0000000..50f2221 --- /dev/null +++ b/target/linux/lantiq/patches-3.3/0025-svip-cp1.patch @@ -0,0 +1,95 @@ +From fcecdbe52ca3f17c798a080454d67df92d1e71f8 Mon Sep 17 00:00:00 2001 +From: John Crispin <blogic@openwrt.org> +Date: Fri, 3 Aug 2012 10:30:28 +0200 +Subject: [PATCH 25/25] svip cp1 + +--- + arch/mips/lantiq/devices.c | 10 ++++++++++ + arch/mips/lantiq/prom.c | 1 + + arch/mips/lantiq/setup.c | 15 +++++++++++++++ + 3 files changed, 26 insertions(+), 0 deletions(-) + +diff --git a/arch/mips/lantiq/devices.c b/arch/mips/lantiq/devices.c +index 2d7c46a..7128115 100644 +--- a/arch/mips/lantiq/devices.c ++++ b/arch/mips/lantiq/devices.c +@@ -102,19 +102,29 @@ void __init ltq_register_pci(struct ltq_pci_data *data) + } + #endif + ++#ifdef CONFIG_SOC_SVIP ++extern unsigned int *prom_cp1_base; ++#else + static unsigned int *cp1_base = 0; ++#endif + unsigned int* + ltq_get_cp1_base(void) + { ++#ifdef CONFIG_SOC_SVIP ++ return prom_cp1_base; ++#else + return cp1_base; ++#endif + } + EXPORT_SYMBOL(ltq_get_cp1_base); + + void __init + ltq_register_tapi(void) + { ++#ifndef CONFIG_SOC_SVIP + #define CP1_SIZE (1 << 20) + dma_addr_t dma; + cp1_base = + (void*)CPHYSADDR(dma_alloc_coherent(NULL, CP1_SIZE, &dma, GFP_ATOMIC)); ++#endif + } +diff --git a/arch/mips/lantiq/prom.c b/arch/mips/lantiq/prom.c +index 0fdef27..cab608b 100644 +--- a/arch/mips/lantiq/prom.c ++++ b/arch/mips/lantiq/prom.c +@@ -129,6 +129,7 @@ err_res: + } + EXPORT_SYMBOL(ltq_remap_resource); + ++ + void __init prom_init(void) + { + ltq_soc_detect(&soc_info); +diff --git a/arch/mips/lantiq/setup.c b/arch/mips/lantiq/setup.c +index 114989d..9aa0310 100644 +--- a/arch/mips/lantiq/setup.c ++++ b/arch/mips/lantiq/setup.c +@@ -21,8 +21,15 @@ + /* set to 1 if the bootloader is BRN-BOOT instead of u-boot */ + unsigned long ltq_brn_boot = 0; + ++#ifdef CONFIG_SOC_SVIP ++unsigned int *prom_cp1_base; ++#endif ++ + void __init plat_mem_setup(void) + { ++#ifdef CONFIG_SOC_SVIP ++ int prom_cp1_size = 0x800000; ++#endif + /* assume 16M as default incase uboot fails to pass proper ramsize */ + unsigned long memsize = 16; + char **envp = (char **) KSEG1ADDR(fw_arg2); +@@ -54,6 +61,14 @@ void __init plat_mem_setup(void) + envp++; + } + memsize *= 1024 * 1024; ++ ++#ifdef CONFIG_SOC_SVIP ++ memsize -= prom_cp1_size; ++ prom_cp1_base = (unsigned int *)KSEG1ADDR(memsize); ++ ++ printk("Using %ldMB Ram and reserving %dMB for cp1\n", ++ memsize>>20, prom_cp1_size>>20); ++#endif + add_memory_region(0x00000000, memsize, BOOT_MEM_RAM); + } + +-- +1.7.9.1 + |