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authorFelix Fietkau <nbd@nbd.name>2017-11-03 09:53:54 +0100
committerFelix Fietkau <nbd@nbd.name>2017-11-06 16:38:25 +0100
commitc08293893aadca182b52ef96d3c2b1700282f0f2 (patch)
treeb7cd8f1ea172201bb358c920437952dc53cf6c95 /target/linux/layerscape
parent94491a15712732c56dccbf4593000376ae275134 (diff)
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kernel: add support for limiting 4K erase sector support based on flash chip size
Some targets need 4K sectors for small flash chips (e.g. some routerboards, where the entire chip is just one "erase block"), whereas on other devices 4K sectors lead to horrible flash erase/write performance. Set the default limit in the generic kernel configuration to 4 MiB to ensure that all new platforms don't use 4K sectors for bigger flash chips. On all existing targets use 16 MiB for now to avoid regressions. They will be changed individually in follow-up commits. Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'target/linux/layerscape')
-rw-r--r--target/linux/layerscape/armv8_32b/config-4.91
-rw-r--r--target/linux/layerscape/armv8_64b/config-4.91
2 files changed, 2 insertions, 0 deletions
diff --git a/target/linux/layerscape/armv8_32b/config-4.9 b/target/linux/layerscape/armv8_32b/config-4.9
index bb45901..565cb5d 100644
--- a/target/linux/layerscape/armv8_32b/config-4.9
+++ b/target/linux/layerscape/armv8_32b/config-4.9
@@ -841,6 +841,7 @@ CONFIG_MTD_NAND_DENALI_DT=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
+CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=16384
CONFIG_MTD_SST25L=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
diff --git a/target/linux/layerscape/armv8_64b/config-4.9 b/target/linux/layerscape/armv8_64b/config-4.9
index ea4dba6..4432919 100644
--- a/target/linux/layerscape/armv8_64b/config-4.9
+++ b/target/linux/layerscape/armv8_64b/config-4.9
@@ -824,6 +824,7 @@ CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_FSL_IFC=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
+CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=16384
CONFIG_MTD_SST25L=y
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_MV_XOR_V2=y