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| author | Gabor Juhos <juhosg@openwrt.org> | 2012-04-29 15:55:28 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2012-04-29 15:55:28 +0000 |
| commit | c59b60fa0b3bc9527a38a37d6b04f821a2e1a9ec (patch) | |
| tree | d6a371e83284cd40481dea6a067b55c7bc99d092 /target/linux/mpc85xx/patches-3.3/110-fix_mpc8548_cds.patch | |
| parent | f687ca229657435bfa22531e75113c6a7dce0419 (diff) | |
| download | mtk-20170518-c59b60fa0b3bc9527a38a37d6b04f821a2e1a9ec.zip mtk-20170518-c59b60fa0b3bc9527a38a37d6b04f821a2e1a9ec.tar.gz mtk-20170518-c59b60fa0b3bc9527a38a37d6b04f821a2e1a9ec.tar.bz2 | |
mpc85xx: add support for 3.3
Based on a patch by Wojciech Dubowik <Wojciech.Dubowik@neratec.com>
SVN-Revision: 31529
Diffstat (limited to 'target/linux/mpc85xx/patches-3.3/110-fix_mpc8548_cds.patch')
| -rw-r--r-- | target/linux/mpc85xx/patches-3.3/110-fix_mpc8548_cds.patch | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/target/linux/mpc85xx/patches-3.3/110-fix_mpc8548_cds.patch b/target/linux/mpc85xx/patches-3.3/110-fix_mpc8548_cds.patch new file mode 100644 index 0000000..291a843 --- /dev/null +++ b/target/linux/mpc85xx/patches-3.3/110-fix_mpc8548_cds.patch @@ -0,0 +1,40 @@ +--- a/arch/powerpc/boot/dts/mpc8548cds.dts ++++ b/arch/powerpc/boot/dts/mpc8548cds.dts +@@ -301,6 +301,9 @@ + 0x0 0x100000>; + }; + }; ++ chosen { ++ linux,stdout-path = "/soc8548@e0000000/serial@4600"; ++ }; + }; + + /include/ "fsl/mpc8548si-post.dtsi" +--- a/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi ++++ b/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi +@@ -116,7 +116,24 @@ + + /include/ "pq3-i2c-0.dtsi" + /include/ "pq3-i2c-1.dtsi" +-/include/ "pq3-duart-0.dtsi" ++ ++ serial0: serial@4600 { ++ cell-index = <1>; ++ device_type = "serial"; ++ compatible = "fsl,ns16550", "ns16550"; ++ reg = <0x4600 0x100>; ++ clock-frequency = <0>; ++ interrupts = <42 2 0 0>; ++ }; ++ ++ serial1: serial@4500 { ++ cell-index = <0>; ++ device_type = "serial"; ++ compatible = "fsl,ns16550", "ns16550"; ++ reg = <0x4500 0x100>; ++ clock-frequency = <0>; ++ interrupts = <42 2 0 0>; ++ }; + + L2: l2-cache-controller@20000 { + compatible = "fsl,mpc8548-l2-cache-controller"; |