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authorGabor Juhos <juhosg@openwrt.org>2011-01-26 20:48:35 +0000
committerGabor Juhos <juhosg@openwrt.org>2011-01-26 20:48:35 +0000
commitb0ffa7024830f9aba9e0f71708d596b6a4b43d08 (patch)
tree4a76be628ae61606bec0479f8e42817b7f310eca /target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c
parentf9e74383a9a9e4769e3c3fb9bac6fada0445d3c4 (diff)
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ramips: implement clock API for RT305X
SVN-Revision: 25124
Diffstat (limited to 'target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c')
-rw-r--r--target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c27
1 files changed, 1 insertions, 26 deletions
diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c b/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c
index 002aaeb..0beeaa0 100644
--- a/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c
+++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c
@@ -1,7 +1,7 @@
/*
* Ralink RT305x SoC specific setup
*
- * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* Parts of this file are based on Ralink's 2.6.21 BSP
@@ -20,12 +20,6 @@
#include <asm/mach-ralink/rt305x.h>
#include <asm/mach-ralink/rt305x_regs.h>
-unsigned long rt305x_cpu_freq;
-EXPORT_SYMBOL_GPL(rt305x_cpu_freq);
-
-unsigned long rt305x_sys_freq;
-EXPORT_SYMBOL_GPL(rt305x_sys_freq);
-
void __iomem * rt305x_sysc_base;
void __iomem * rt305x_memc_base;
@@ -49,25 +43,6 @@ void __init rt305x_detect_sys_type(void)
(id & CHIP_ID_REV_MASK));
}
-void __init rt305x_detect_sys_freq(void)
-{
- u32 t;
-
- t = rt305x_sysc_rr(SYSC_REG_SYSTEM_CONFIG);
- t = ((t >> SYSTEM_CONFIG_CPUCLK_SHIFT) & SYSTEM_CONFIG_CPUCLK_MASK);
-
- switch (t) {
- case SYSTEM_CONFIG_CPUCLK_320:
- rt305x_cpu_freq = 320000000;
- break;
- case SYSTEM_CONFIG_CPUCLK_384:
- rt305x_cpu_freq = 384000000;
- break;
- }
-
- rt305x_sys_freq = rt305x_cpu_freq / 3;
-}
-
static void rt305x_gpio_reserve(int first, int last)
{
for (; first <= last; first++)